if_gm.c revision 1.3
1 /* $NetBSD: if_gm.c,v 1.3 2000/03/23 06:40:34 thorpej Exp $ */ 2 3 /*- 4 * Copyright (c) 2000 Tsubai Masanari. All rights reserved. 5 * 6 * Redistribution and use in source and binary forms, with or without 7 * modification, are permitted provided that the following conditions 8 * are met: 9 * 1. Redistributions of source code must retain the above copyright 10 * notice, this list of conditions and the following disclaimer. 11 * 2. Redistributions in binary form must reproduce the above copyright 12 * notice, this list of conditions and the following disclaimer in the 13 * documentation and/or other materials provided with the distribution. 14 * 3. The name of the author may not be used to endorse or promote products 15 * derived from this software without specific prior written permission. 16 * 17 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 18 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 19 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 20 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 21 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 22 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 26 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 27 */ 28 29 #include "opt_inet.h" 30 #include "opt_ns.h" 31 #include "bpfilter.h" 32 33 #include <sys/param.h> 34 #include <sys/device.h> 35 #include <sys/ioctl.h> 36 #include <sys/kernel.h> 37 #include <sys/mbuf.h> 38 #include <sys/socket.h> 39 #include <sys/systm.h> 40 #include <sys/callout.h> 41 42 #include <vm/vm.h> 43 44 #include <net/if.h> 45 #include <net/if_ether.h> 46 #include <net/if_media.h> 47 48 #if NBPFILTER > 0 49 #include <net/bpf.h> 50 #endif 51 52 #ifdef INET 53 #include <netinet/in.h> 54 #include <netinet/if_inarp.h> 55 #endif 56 57 #include <dev/mii/mii.h> 58 #include <dev/mii/miivar.h> 59 60 #include <dev/pci/pcivar.h> 61 #include <dev/pci/pcireg.h> 62 #include <dev/pci/pcidevs.h> 63 64 #include <dev/ofw/openfirm.h> 65 #include <macppc/dev/if_gmreg.h> 66 #include <machine/pio.h> 67 68 #define NTXBUF 4 69 #define NRXBUF 32 70 71 struct gmac_softc { 72 struct device sc_dev; 73 struct ethercom sc_ethercom; 74 vaddr_t sc_reg; 75 struct gmac_dma *sc_txlist; 76 struct gmac_dma *sc_rxlist; 77 int sc_txnext; 78 int sc_rxlast; 79 caddr_t sc_txbuf[NTXBUF]; 80 caddr_t sc_rxbuf[NRXBUF]; 81 struct mii_data sc_mii; 82 struct callout sc_tick_ch; 83 char sc_laddr[6]; 84 }; 85 86 #define sc_if sc_ethercom.ec_if 87 88 int gmac_match __P((struct device *, struct cfdata *, void *)); 89 void gmac_attach __P((struct device *, struct device *, void *)); 90 91 static __inline u_int gmac_read_reg __P((struct gmac_softc *, int)); 92 static __inline void gmac_write_reg __P((struct gmac_softc *, int, u_int)); 93 94 static __inline void gmac_start_txdma __P((struct gmac_softc *)); 95 static __inline void gmac_start_rxdma __P((struct gmac_softc *)); 96 static __inline void gmac_stop_txdma __P((struct gmac_softc *)); 97 static __inline void gmac_stop_rxdma __P((struct gmac_softc *)); 98 99 int gmac_intr __P((void *)); 100 void gmac_tint __P((struct gmac_softc *)); 101 void gmac_rint __P((struct gmac_softc *)); 102 struct mbuf * gmac_get __P((struct gmac_softc *, caddr_t, int)); 103 void gmac_start __P((struct ifnet *)); 104 int gmac_put __P((struct gmac_softc *, caddr_t, struct mbuf *)); 105 106 void gmac_stop __P((struct gmac_softc *)); 107 void gmac_reset __P((struct gmac_softc *)); 108 void gmac_init __P((struct gmac_softc *)); 109 void gmac_init_mac __P((struct gmac_softc *)); 110 111 int gmac_ioctl __P((struct ifnet *, u_long, caddr_t)); 112 void gmac_watchdog __P((struct ifnet *)); 113 114 int gmac_mediachange __P((struct ifnet *)); 115 void gmac_mediastatus __P((struct ifnet *, struct ifmediareq *)); 116 int gmac_mii_readreg __P((struct device *, int, int)); 117 void gmac_mii_writereg __P((struct device *, int, int, int)); 118 void gmac_mii_statchg __P((struct device *)); 119 void gmac_mii_tick __P((void *)); 120 121 struct cfattach gm_ca = { 122 sizeof(struct gmac_softc), gmac_match, gmac_attach 123 }; 124 125 int 126 gmac_match(parent, match, aux) 127 struct device *parent; 128 struct cfdata *match; 129 void *aux; 130 { 131 struct pci_attach_args *pa = aux; 132 133 if (PCI_VENDOR(pa->pa_id) == PCI_VENDOR_APPLE && 134 PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_APPLE_GMAC) 135 return 1; 136 137 return 0; 138 } 139 140 void 141 gmac_attach(parent, self, aux) 142 struct device *parent, *self; 143 void *aux; 144 { 145 struct gmac_softc *sc = (void *)self; 146 struct pci_attach_args *pa = aux; 147 struct ifnet *ifp = &sc->sc_if; 148 struct mii_data *mii = &sc->sc_mii; 149 pci_intr_handle_t ih; 150 const char *intrstr = NULL; 151 int node, i; 152 char *p; 153 struct gmac_dma *dp; 154 u_int32_t reg[10]; 155 u_char laddr[6]; 156 157 node = pcidev_to_ofdev(pa->pa_pc, pa->pa_tag); 158 if (node == 0) { 159 printf(": cannot find gmac node\n"); 160 return; 161 } 162 163 OF_getprop(node, "local-mac-address", laddr, sizeof laddr); 164 OF_getprop(node, "assigned-addresses", reg, sizeof reg); 165 166 bcopy(laddr, sc->sc_laddr, sizeof laddr); 167 sc->sc_reg = reg[2]; 168 169 if (pci_intr_map(pa->pa_pc, pa->pa_intrtag, pa->pa_intrpin, 170 pa->pa_intrline, &ih)) { 171 printf(": unable to map interrupt\n"); 172 return; 173 } 174 intrstr = pci_intr_string(pa->pa_pc, ih); 175 176 if (pci_intr_establish(pa->pa_pc, ih, IPL_NET, gmac_intr, sc) == NULL) { 177 printf(": unable to establish interrupt"); 178 if (intrstr) 179 printf(" at %s", intrstr); 180 printf("\n"); 181 return; 182 } 183 184 /* Setup packet buffers and dma descriptors. */ 185 p = malloc((NRXBUF + NTXBUF) * 2048 + 3 * 0x800, M_DEVBUF, M_NOWAIT); 186 if (p == NULL) { 187 printf(": cannot malloc buffers\n"); 188 return; 189 } 190 p = (void *)roundup((vaddr_t)p, 0x800); 191 bzero(p, 2048 * (NRXBUF + NTXBUF) + 2 * 0x800); 192 193 sc->sc_rxlist = (void *)p; 194 p += 0x800; 195 sc->sc_txlist = (void *)p; 196 p += 0x800; 197 198 dp = sc->sc_rxlist; 199 for (i = 0; i < NRXBUF; i++) { 200 sc->sc_rxbuf[i] = p; 201 dp->address = htole32(vtophys(p)); 202 dp->cmd = htole32(GMAC_OWN); 203 dp++; 204 p += 2048; 205 } 206 207 dp = sc->sc_txlist; 208 for (i = 0; i < NTXBUF; i++) { 209 sc->sc_txbuf[i] = p; 210 dp->address = htole32(vtophys(p)); 211 dp++; 212 p += 2048; 213 } 214 215 printf(": Ethernet address %s\n", ether_sprintf(laddr)); 216 printf("%s: interrupting at %s\n", sc->sc_dev.dv_xname, intrstr); 217 218 callout_init(&sc->sc_tick_ch); 219 220 gmac_reset(sc); 221 gmac_init_mac(sc); 222 223 bcopy(sc->sc_dev.dv_xname, ifp->if_xname, IFNAMSIZ); 224 ifp->if_softc = sc; 225 ifp->if_ioctl = gmac_ioctl; 226 ifp->if_start = gmac_start; 227 ifp->if_watchdog = gmac_watchdog; 228 ifp->if_flags = 229 IFF_BROADCAST | IFF_SIMPLEX | IFF_NOTRAILERS | IFF_MULTICAST; 230 ifp->if_flags |= IFF_ALLMULTI; 231 232 mii->mii_ifp = ifp; 233 mii->mii_readreg = gmac_mii_readreg; 234 mii->mii_writereg = gmac_mii_writereg; 235 mii->mii_statchg = gmac_mii_statchg; 236 237 ifmedia_init(&mii->mii_media, 0, gmac_mediachange, gmac_mediastatus); 238 mii_attach(self, mii, 0xffffffff, MII_PHY_ANY, MII_OFFSET_ANY, 0); 239 240 /* Choose a default media. */ 241 if (LIST_FIRST(&mii->mii_phys) == NULL) { 242 ifmedia_add(&mii->mii_media, IFM_ETHER|IFM_NONE, 0, NULL); 243 ifmedia_set(&mii->mii_media, IFM_ETHER|IFM_NONE); 244 } else 245 ifmedia_set(&mii->mii_media, IFM_ETHER|IFM_AUTO); 246 247 if_attach(ifp); 248 ether_ifattach(ifp, laddr); 249 250 #if NBPFILTER > 0 251 bpfattach(&ifp->if_bpf, ifp, DLT_EN10MB, sizeof(struct ether_header)); 252 #endif 253 } 254 255 u_int 256 gmac_read_reg(sc, reg) 257 struct gmac_softc *sc; 258 int reg; 259 { 260 return in32rb(sc->sc_reg + reg); 261 } 262 263 void 264 gmac_write_reg(sc, reg, val) 265 struct gmac_softc *sc; 266 int reg; 267 u_int val; 268 { 269 out32rb(sc->sc_reg + reg, val); 270 } 271 272 void 273 gmac_start_txdma(sc) 274 struct gmac_softc *sc; 275 { 276 u_int x; 277 278 x = gmac_read_reg(sc, GMAC_TXDMACONFIG); 279 x |= 1; 280 gmac_write_reg(sc, GMAC_TXDMACONFIG, x); 281 x = gmac_read_reg(sc, GMAC_TXMACCONFIG); 282 x |= 1; 283 gmac_write_reg(sc, GMAC_TXMACCONFIG, x); 284 } 285 286 void 287 gmac_start_rxdma(sc) 288 struct gmac_softc *sc; 289 { 290 u_int x; 291 292 x = gmac_read_reg(sc, GMAC_RXDMACONFIG); 293 x |= 1; 294 gmac_write_reg(sc, GMAC_RXDMACONFIG, x); 295 x = gmac_read_reg(sc, GMAC_RXMACCONFIG); 296 x |= 1; 297 gmac_write_reg(sc, GMAC_RXMACCONFIG, x); 298 } 299 300 void 301 gmac_stop_txdma(sc) 302 struct gmac_softc *sc; 303 { 304 u_int x; 305 306 x = gmac_read_reg(sc, GMAC_TXDMACONFIG); 307 x &= ~1; 308 gmac_write_reg(sc, GMAC_TXDMACONFIG, x); 309 x = gmac_read_reg(sc, GMAC_TXMACCONFIG); 310 x &= ~1; 311 gmac_write_reg(sc, GMAC_TXMACCONFIG, x); 312 } 313 314 void 315 gmac_stop_rxdma(sc) 316 struct gmac_softc *sc; 317 { 318 u_int x; 319 320 x = gmac_read_reg(sc, GMAC_RXDMACONFIG); 321 x &= ~1; 322 gmac_write_reg(sc, GMAC_RXDMACONFIG, x); 323 x = gmac_read_reg(sc, GMAC_RXMACCONFIG); 324 x &= ~1; 325 gmac_write_reg(sc, GMAC_RXMACCONFIG, x); 326 } 327 328 int 329 gmac_intr(v) 330 void *v; 331 { 332 struct gmac_softc *sc = v; 333 u_int status; 334 335 status = gmac_read_reg(sc, GMAC_STATUS) & 0xff; 336 if (status == 0) 337 return 0; 338 339 if (status & GMAC_INT_RXDONE) 340 gmac_rint(sc); 341 342 if (status & GMAC_INT_TXDONE) 343 gmac_tint(sc); 344 345 return 1; 346 } 347 348 void 349 gmac_tint(sc) 350 struct gmac_softc *sc; 351 { 352 struct ifnet *ifp = &sc->sc_if; 353 volatile struct gmac_dma *dp; 354 int i; 355 356 i = gmac_read_reg(sc, GMAC_TXDMACOMPLETE); 357 dp = &sc->sc_txlist[i]; 358 dp->cmd = 0; /* to be safe */ 359 __asm __volatile ("sync"); 360 361 ifp->if_flags &= ~IFF_OACTIVE; 362 ifp->if_timer = 0; 363 ifp->if_opackets++; 364 gmac_start(ifp); 365 } 366 367 void 368 gmac_rint(sc) 369 struct gmac_softc *sc; 370 { 371 struct ifnet *ifp = &sc->sc_if; 372 volatile struct gmac_dma *dp; 373 struct mbuf *m; 374 int i, len; 375 u_int cmd; 376 377 for (i = sc->sc_rxlast;; i++) { 378 if (i == NRXBUF) 379 i = 0; 380 381 dp = &sc->sc_rxlist[i]; 382 cmd = le32toh(dp->cmd); 383 if (cmd & GMAC_OWN) 384 break; 385 len = (cmd >> 16) & GMAC_LEN_MASK; 386 len -= 4; /* CRC */ 387 388 if (le32toh(dp->cmd_hi) & 0x40000000) { 389 ifp->if_ierrors++; 390 goto next; 391 } 392 393 m = gmac_get(sc, sc->sc_rxbuf[i], len); 394 if (m == NULL) { 395 ifp->if_ierrors++; 396 goto next; 397 } 398 399 #if NBPFILTER > 0 400 /* 401 * Check if there's a BPF listener on this interface. 402 * If so, hand off the raw packet to BPF. 403 */ 404 if (ifp->if_bpf) 405 bpf_tap(ifp->if_bpf, sc->sc_rxbuf[i], len); 406 #endif 407 (*ifp->if_input)(ifp, m); 408 ifp->if_ipackets++; 409 410 next: 411 dp->cmd_hi = 0; 412 __asm __volatile ("sync"); 413 dp->cmd = htole32(GMAC_OWN); 414 } 415 sc->sc_rxlast = i; 416 } 417 418 struct mbuf * 419 gmac_get(sc, pkt, totlen) 420 struct gmac_softc *sc; 421 caddr_t pkt; 422 int totlen; 423 { 424 struct mbuf *m; 425 struct mbuf *top, **mp; 426 int len; 427 428 MGETHDR(m, M_DONTWAIT, MT_DATA); 429 if (m == 0) 430 return 0; 431 m->m_pkthdr.rcvif = &sc->sc_if; 432 m->m_pkthdr.len = totlen; 433 len = MHLEN; 434 top = 0; 435 mp = ⊤ 436 437 while (totlen > 0) { 438 if (top) { 439 MGET(m, M_DONTWAIT, MT_DATA); 440 if (m == 0) { 441 m_freem(top); 442 return 0; 443 } 444 len = MLEN; 445 } 446 if (totlen >= MINCLSIZE) { 447 MCLGET(m, M_DONTWAIT); 448 if ((m->m_flags & M_EXT) == 0) { 449 m_free(m); 450 m_freem(top); 451 return 0; 452 } 453 len = MCLBYTES; 454 } 455 m->m_len = len = min(totlen, len); 456 bcopy(pkt, mtod(m, caddr_t), len); 457 pkt += len; 458 totlen -= len; 459 *mp = m; 460 mp = &m->m_next; 461 } 462 463 return top; 464 } 465 466 void 467 gmac_start(ifp) 468 struct ifnet *ifp; 469 { 470 struct gmac_softc *sc = ifp->if_softc; 471 struct mbuf *m; 472 caddr_t buff; 473 int i, tlen; 474 volatile struct gmac_dma *dp; 475 476 if ((ifp->if_flags & (IFF_RUNNING | IFF_OACTIVE)) != IFF_RUNNING) 477 return; 478 479 for (;;) { 480 if (ifp->if_flags & IFF_OACTIVE) 481 break; 482 483 IF_DEQUEUE(&ifp->if_snd, m); 484 if (m == 0) 485 break; 486 487 ifp->if_flags |= IFF_OACTIVE; 488 489 /* 5 seconds to watch for failing to transmit */ 490 ifp->if_timer = 5; 491 ifp->if_opackets++; /* # of pkts */ 492 493 i = sc->sc_txnext; 494 buff = sc->sc_txbuf[i]; 495 tlen = gmac_put(sc, buff, m); 496 497 dp = &sc->sc_txlist[i]; 498 dp->cmd_hi = 0; 499 dp->address_hi = 0; 500 dp->cmd = htole32(tlen | GMAC_OWN | GMAC_SOP); 501 502 i++; 503 if (i == NTXBUF) 504 i = 0; 505 __asm __volatile ("sync"); 506 507 gmac_write_reg(sc, GMAC_TXDMAKICK, i); 508 sc->sc_txnext = i; 509 510 #if NBPFILTER > 0 511 /* 512 * If BPF is listening on this interface, let it see the 513 * packet before we commit it to the wire. 514 */ 515 if (ifp->if_bpf) 516 bpf_tap(ifp->if_bpf, buff, tlen); 517 #endif 518 } 519 } 520 521 int 522 gmac_put(sc, buff, m) 523 struct gmac_softc *sc; 524 caddr_t buff; 525 struct mbuf *m; 526 { 527 struct mbuf *n; 528 int len, tlen = 0; 529 530 for (; m; m = n) { 531 len = m->m_len; 532 if (len == 0) { 533 MFREE(m, n); 534 continue; 535 } 536 bcopy(mtod(m, caddr_t), buff, len); 537 buff += len; 538 tlen += len; 539 MFREE(m, n); 540 } 541 if (tlen > 2048) 542 panic("%s: gmac_put packet overflow", sc->sc_dev.dv_xname); 543 544 return tlen; 545 } 546 547 void 548 gmac_reset(sc) 549 struct gmac_softc *sc; 550 { 551 int i, s; 552 553 s = splnet(); 554 555 gmac_stop_txdma(sc); 556 gmac_stop_rxdma(sc); 557 558 gmac_write_reg(sc, GMAC_SOFTWARERESET, 3); 559 for (i = 10; i > 0; i--) { 560 delay(300000); /* XXX long delay */ 561 if ((gmac_read_reg(sc, GMAC_SOFTWARERESET) & 3) == 0) 562 break; 563 } 564 if (i == 0) 565 printf("%s: reset timeout\n", sc->sc_dev.dv_xname); 566 567 sc->sc_txnext = 0; 568 sc->sc_rxlast = 0; 569 for (i = 0; i < NRXBUF; i++) 570 sc->sc_rxlist[i].cmd = htole32(GMAC_OWN); 571 __asm __volatile ("sync"); 572 573 gmac_write_reg(sc, GMAC_TXDMADESCBASEHI, 0); 574 gmac_write_reg(sc, GMAC_TXDMADESCBASELO, vtophys(sc->sc_txlist)); 575 gmac_write_reg(sc, GMAC_RXDMADESCBASEHI, 0); 576 gmac_write_reg(sc, GMAC_RXDMADESCBASELO, vtophys(sc->sc_rxlist)); 577 gmac_write_reg(sc, GMAC_RXDMAKICK, NRXBUF); 578 579 splx(s); 580 } 581 582 void 583 gmac_stop(sc) 584 struct gmac_softc *sc; 585 { 586 struct ifnet *ifp = &sc->sc_if; 587 int s; 588 589 s = splnet(); 590 591 callout_stop(&sc->sc_tick_ch); 592 mii_down(&sc->sc_mii); 593 594 gmac_stop_txdma(sc); 595 gmac_stop_rxdma(sc); 596 597 gmac_write_reg(sc, GMAC_INTMASK, 0xffffffff); 598 599 ifp->if_flags &= ~(IFF_UP | IFF_RUNNING); 600 ifp->if_timer = 0; 601 602 splx(s); 603 } 604 605 void 606 gmac_init_mac(sc) 607 struct gmac_softc *sc; 608 { 609 int i, tb; 610 char *laddr = sc->sc_laddr; 611 612 __asm ("mftb %0" : "=r"(tb)); 613 gmac_write_reg(sc, GMAC_RANDOMSEED, tb); 614 615 /* init-mii */ 616 gmac_write_reg(sc, GMAC_DATAPATHMODE, 4); 617 gmac_mii_writereg(&sc->sc_dev, 0, 0, 0x1000); 618 619 gmac_write_reg(sc, GMAC_TXDMACONFIG, 0xffc00); 620 gmac_write_reg(sc, GMAC_RXDMACONFIG, 0); 621 gmac_write_reg(sc, GMAC_MACPAUSE, 0x1bf0); 622 gmac_write_reg(sc, GMAC_INTERPACKETGAP0, 0); 623 gmac_write_reg(sc, GMAC_INTERPACKETGAP1, 8); 624 gmac_write_reg(sc, GMAC_INTERPACKETGAP2, 4); 625 gmac_write_reg(sc, GMAC_MINFRAMESIZE, ETHER_MIN_LEN); 626 gmac_write_reg(sc, GMAC_MAXFRAMESIZE, ETHER_MAX_LEN); 627 gmac_write_reg(sc, GMAC_PASIZE, 7); 628 gmac_write_reg(sc, GMAC_JAMSIZE, 4); 629 gmac_write_reg(sc, GMAC_ATTEMPTLIMIT,0x10); 630 gmac_write_reg(sc, GMAC_MACCNTLTYPE, 0x8808); 631 632 gmac_write_reg(sc, GMAC_MACADDRESS0, (laddr[4] << 8) | laddr[5]); 633 gmac_write_reg(sc, GMAC_MACADDRESS1, (laddr[2] << 8) | laddr[3]); 634 gmac_write_reg(sc, GMAC_MACADDRESS2, (laddr[0] << 8) | laddr[1]); 635 gmac_write_reg(sc, GMAC_MACADDRESS3, 0); 636 gmac_write_reg(sc, GMAC_MACADDRESS4, 0); 637 gmac_write_reg(sc, GMAC_MACADDRESS5, 0); 638 gmac_write_reg(sc, GMAC_MACADDRESS6, 1); 639 gmac_write_reg(sc, GMAC_MACADDRESS7, 0xc200); 640 gmac_write_reg(sc, GMAC_MACADDRESS8, 0x0180); 641 gmac_write_reg(sc, GMAC_MACADDRFILT0, 0); 642 gmac_write_reg(sc, GMAC_MACADDRFILT1, 0); 643 gmac_write_reg(sc, GMAC_MACADDRFILT2, 0); 644 gmac_write_reg(sc, GMAC_MACADDRFILT2_1MASK, 0); 645 gmac_write_reg(sc, GMAC_MACADDRFILT0MASK, 0); 646 647 for (i = 0; i < 0x6c; i+= 4) 648 gmac_write_reg(sc, GMAC_HASHTABLE0 + i, 0); 649 650 gmac_write_reg(sc, GMAC_SLOTTIME, 0x40); 651 652 /* XXX */ 653 gmac_write_reg(sc, GMAC_TXMACCONFIG, 0); 654 gmac_write_reg(sc, GMAC_XIFCONFIG, 5); 655 gmac_write_reg(sc, GMAC_MACCTRLCONFIG, 0); 656 } 657 658 void 659 gmac_init(sc) 660 struct gmac_softc *sc; 661 { 662 struct ifnet *ifp = &sc->sc_if; 663 u_int x; 664 int i; 665 666 gmac_stop_txdma(sc); 667 gmac_stop_rxdma(sc); 668 669 gmac_init_mac(sc); 670 671 x = gmac_read_reg(sc, GMAC_RXMACCONFIG); 672 if (ifp->if_flags & IFF_PROMISC) 673 x |= GMAC_RXMAC_PR; 674 else 675 x &= ~GMAC_RXMAC_PR; 676 gmac_write_reg(sc, GMAC_RXMACCONFIG, x); 677 678 gmac_start_txdma(sc); 679 gmac_start_rxdma(sc); 680 681 gmac_write_reg(sc, GMAC_INTMASK, ~(GMAC_INT_TXDONE | GMAC_INT_RXDONE)); 682 683 ifp->if_flags |= IFF_RUNNING; 684 ifp->if_flags &= ~IFF_OACTIVE; 685 ifp->if_timer = 0; 686 687 callout_reset(&sc->sc_tick_ch, 1, gmac_mii_tick, sc); 688 689 gmac_start(ifp); 690 } 691 692 int 693 gmac_ioctl(ifp, cmd, data) 694 struct ifnet *ifp; 695 u_long cmd; 696 caddr_t data; 697 { 698 struct gmac_softc *sc = ifp->if_softc; 699 struct ifaddr *ifa = (struct ifaddr *)data; 700 struct ifreq *ifr = (struct ifreq *)data; 701 int s, error = 0; 702 703 s = splnet(); 704 705 switch (cmd) { 706 707 case SIOCSIFADDR: 708 ifp->if_flags |= IFF_UP; 709 710 switch (ifa->ifa_addr->sa_family) { 711 #ifdef INET 712 case AF_INET: 713 gmac_init(sc); 714 arp_ifinit(ifp, ifa); 715 break; 716 #endif 717 #ifdef NS 718 case AF_NS: 719 { 720 struct ns_addr *ina = &IA_SNS(ifa)->sns_addr; 721 722 if (ns_nullhost(*ina)) 723 ina->x_host = 724 *(union ns_host *)LLADDR(ifp->if_sadl); 725 else { 726 bcopy(ina->x_host.c_host, 727 LLADDR(ifp->if_sadl), 728 sizeof(sc->sc_enaddr)); 729 } 730 /* Set new address. */ 731 gmac_init(sc); 732 break; 733 } 734 #endif 735 default: 736 gmac_init(sc); 737 break; 738 } 739 break; 740 741 case SIOCSIFFLAGS: 742 if ((ifp->if_flags & IFF_UP) == 0 && 743 (ifp->if_flags & IFF_RUNNING) != 0) { 744 /* 745 * If interface is marked down and it is running, then 746 * stop it. 747 */ 748 gmac_stop(sc); 749 ifp->if_flags &= ~IFF_RUNNING; 750 } else if ((ifp->if_flags & IFF_UP) != 0 && 751 (ifp->if_flags & IFF_RUNNING) == 0) { 752 /* 753 * If interface is marked up and it is stopped, then 754 * start it. 755 */ 756 gmac_init(sc); 757 } else { 758 /* 759 * Reset the interface to pick up changes in any other 760 * flags that affect hardware registers. 761 */ 762 gmac_reset(sc); 763 gmac_init(sc); 764 } 765 #ifdef GMAC_DEBUG 766 if (ifp->if_flags & IFF_DEBUG) 767 sc->sc_flags |= GMAC_DEBUGFLAG; 768 #endif 769 break; 770 771 case SIOCADDMULTI: 772 case SIOCDELMULTI: 773 error = (cmd == SIOCADDMULTI) ? 774 ether_addmulti(ifr, &sc->sc_ethercom) : 775 ether_delmulti(ifr, &sc->sc_ethercom); 776 777 if (error == ENETRESET) { 778 /* 779 * Multicast list has changed; set the hardware filter 780 * accordingly. 781 */ 782 gmac_init(sc); 783 /* gmac_setladrf(sc); */ 784 error = 0; 785 } 786 break; 787 788 case SIOCGIFMEDIA: 789 case SIOCSIFMEDIA: 790 error = ifmedia_ioctl(ifp, ifr, &sc->sc_mii.mii_media, cmd); 791 break; 792 793 default: 794 error = EINVAL; 795 } 796 797 splx(s); 798 return error; 799 } 800 801 void 802 gmac_watchdog(ifp) 803 struct ifnet *ifp; 804 { 805 struct gmac_softc *sc = ifp->if_softc; 806 807 printf("%s: device timeout\n", ifp->if_xname); 808 ifp->if_oerrors++; 809 810 gmac_reset(sc); 811 gmac_init(sc); 812 } 813 814 int 815 gmac_mediachange(ifp) 816 struct ifnet *ifp; 817 { 818 struct gmac_softc *sc = ifp->if_softc; 819 820 return mii_mediachg(&sc->sc_mii); 821 } 822 823 void 824 gmac_mediastatus(ifp, ifmr) 825 struct ifnet *ifp; 826 struct ifmediareq *ifmr; 827 { 828 struct gmac_softc *sc = ifp->if_softc; 829 830 mii_pollstat(&sc->sc_mii); 831 832 ifmr->ifm_status = sc->sc_mii.mii_media_status; 833 ifmr->ifm_active = sc->sc_mii.mii_media_active; 834 } 835 836 int 837 gmac_mii_readreg(dev, phy, reg) 838 struct device *dev; 839 int phy, reg; 840 { 841 struct gmac_softc *sc = (void *)dev; 842 int i; 843 844 gmac_write_reg(sc, GMAC_MIFFRAMEOUTPUT, 845 0x60020000 | (phy << 23) | (reg << 18)); 846 847 for (i = 1000; i >= 0; i -= 10) { 848 if (gmac_read_reg(sc, GMAC_MIFFRAMEOUTPUT) & 0x10000) 849 break; 850 delay(10); 851 } 852 if (i < 0) { 853 printf("%s: gmac_mii_readreg: timeout\n", sc->sc_dev.dv_xname); 854 return 0; 855 } 856 857 return gmac_read_reg(sc, GMAC_MIFFRAMEOUTPUT) & 0xffff; 858 } 859 860 void 861 gmac_mii_writereg(dev, phy, reg, val) 862 struct device *dev; 863 int phy, reg, val; 864 { 865 struct gmac_softc *sc = (void *)dev; 866 int i; 867 868 gmac_write_reg(sc, GMAC_MIFFRAMEOUTPUT, 869 0x50020000 | (phy << 23) | (reg << 18) | (val & 0xffff)); 870 871 for (i = 1000; i >= 0; i -= 10) { 872 if (gmac_read_reg(sc, GMAC_MIFFRAMEOUTPUT) & 0x10000) 873 break; 874 delay(10); 875 } 876 if (i < 0) 877 printf("%s: gmac_mii_writereg: timeout\n", sc->sc_dev.dv_xname); 878 } 879 880 void 881 gmac_mii_statchg(dev) 882 struct device *dev; 883 { 884 struct gmac_softc *sc = (void *)dev; 885 886 gmac_stop_txdma(sc); 887 gmac_stop_rxdma(sc); 888 889 if (IFM_OPTIONS(sc->sc_mii.mii_media_active) & IFM_FDX) { 890 gmac_write_reg(sc, GMAC_TXMACCONFIG, 6); 891 gmac_write_reg(sc, GMAC_XIFCONFIG, 1); 892 } else { 893 gmac_write_reg(sc, GMAC_TXMACCONFIG, 0); 894 gmac_write_reg(sc, GMAC_XIFCONFIG, 5); 895 } 896 897 if (0) /* g-bit? */ 898 gmac_write_reg(sc, GMAC_MACCTRLCONFIG, 3); 899 else 900 gmac_write_reg(sc, GMAC_MACCTRLCONFIG, 0); 901 902 gmac_start_txdma(sc); 903 gmac_start_rxdma(sc); 904 } 905 906 void 907 gmac_mii_tick(v) 908 void *v; 909 { 910 struct gmac_softc *sc = v; 911 int s; 912 913 s = splnet(); 914 mii_tick(&sc->sc_mii); 915 splx(s); 916 917 callout_reset(&sc->sc_tick_ch, hz, gmac_mii_tick, sc); 918 } 919
Indexes created Tue Sep 30 20:09:53 GMT 2025