if_gm.c revision 1.4
1 /* $NetBSD: if_gm.c,v 1.4 2000/03/26 09:15:17 tsubai Exp $ */ 2 3 /*- 4 * Copyright (c) 2000 Tsubai Masanari. All rights reserved. 5 * 6 * Redistribution and use in source and binary forms, with or without 7 * modification, are permitted provided that the following conditions 8 * are met: 9 * 1. Redistributions of source code must retain the above copyright 10 * notice, this list of conditions and the following disclaimer. 11 * 2. Redistributions in binary form must reproduce the above copyright 12 * notice, this list of conditions and the following disclaimer in the 13 * documentation and/or other materials provided with the distribution. 14 * 3. The name of the author may not be used to endorse or promote products 15 * derived from this software without specific prior written permission. 16 * 17 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 18 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 19 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 20 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 21 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 22 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 26 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 27 */ 28 29 #include "opt_inet.h" 30 #include "opt_ns.h" 31 #include "bpfilter.h" 32 33 #include <sys/param.h> 34 #include <sys/device.h> 35 #include <sys/ioctl.h> 36 #include <sys/kernel.h> 37 #include <sys/mbuf.h> 38 #include <sys/socket.h> 39 #include <sys/systm.h> 40 #include <sys/callout.h> 41 42 #include <vm/vm.h> 43 44 #include <net/if.h> 45 #include <net/if_ether.h> 46 #include <net/if_media.h> 47 48 #if NBPFILTER > 0 49 #include <net/bpf.h> 50 #endif 51 52 #ifdef INET 53 #include <netinet/in.h> 54 #include <netinet/if_inarp.h> 55 #endif 56 57 #include <dev/mii/mii.h> 58 #include <dev/mii/miivar.h> 59 60 #include <dev/pci/pcivar.h> 61 #include <dev/pci/pcireg.h> 62 #include <dev/pci/pcidevs.h> 63 64 #include <dev/ofw/openfirm.h> 65 #include <macppc/dev/if_gmreg.h> 66 #include <machine/pio.h> 67 68 #define NTXBUF 4 69 #define NRXBUF 32 70 71 struct gmac_softc { 72 struct device sc_dev; 73 struct ethercom sc_ethercom; 74 vaddr_t sc_reg; 75 struct gmac_dma *sc_txlist; 76 struct gmac_dma *sc_rxlist; 77 int sc_txnext; 78 int sc_rxlast; 79 caddr_t sc_txbuf[NTXBUF]; 80 caddr_t sc_rxbuf[NRXBUF]; 81 struct mii_data sc_mii; 82 struct callout sc_tick_ch; 83 char sc_laddr[6]; 84 }; 85 86 #define sc_if sc_ethercom.ec_if 87 88 int gmac_match __P((struct device *, struct cfdata *, void *)); 89 void gmac_attach __P((struct device *, struct device *, void *)); 90 91 static __inline u_int gmac_read_reg __P((struct gmac_softc *, int)); 92 static __inline void gmac_write_reg __P((struct gmac_softc *, int, u_int)); 93 94 static __inline void gmac_start_txdma __P((struct gmac_softc *)); 95 static __inline void gmac_start_rxdma __P((struct gmac_softc *)); 96 static __inline void gmac_stop_txdma __P((struct gmac_softc *)); 97 static __inline void gmac_stop_rxdma __P((struct gmac_softc *)); 98 99 int gmac_intr __P((void *)); 100 void gmac_tint __P((struct gmac_softc *)); 101 void gmac_rint __P((struct gmac_softc *)); 102 struct mbuf * gmac_get __P((struct gmac_softc *, caddr_t, int)); 103 void gmac_start __P((struct ifnet *)); 104 int gmac_put __P((struct gmac_softc *, caddr_t, struct mbuf *)); 105 106 void gmac_stop __P((struct gmac_softc *)); 107 void gmac_reset __P((struct gmac_softc *)); 108 void gmac_init __P((struct gmac_softc *)); 109 void gmac_init_mac __P((struct gmac_softc *)); 110 111 int gmac_ioctl __P((struct ifnet *, u_long, caddr_t)); 112 void gmac_watchdog __P((struct ifnet *)); 113 114 int gmac_mediachange __P((struct ifnet *)); 115 void gmac_mediastatus __P((struct ifnet *, struct ifmediareq *)); 116 int gmac_mii_readreg __P((struct device *, int, int)); 117 void gmac_mii_writereg __P((struct device *, int, int, int)); 118 void gmac_mii_statchg __P((struct device *)); 119 void gmac_mii_tick __P((void *)); 120 121 struct cfattach gm_ca = { 122 sizeof(struct gmac_softc), gmac_match, gmac_attach 123 }; 124 125 int 126 gmac_match(parent, match, aux) 127 struct device *parent; 128 struct cfdata *match; 129 void *aux; 130 { 131 struct pci_attach_args *pa = aux; 132 133 if (PCI_VENDOR(pa->pa_id) == PCI_VENDOR_APPLE && 134 PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_APPLE_GMAC) 135 return 1; 136 137 return 0; 138 } 139 140 void 141 gmac_attach(parent, self, aux) 142 struct device *parent, *self; 143 void *aux; 144 { 145 struct gmac_softc *sc = (void *)self; 146 struct pci_attach_args *pa = aux; 147 struct ifnet *ifp = &sc->sc_if; 148 struct mii_data *mii = &sc->sc_mii; 149 pci_intr_handle_t ih; 150 const char *intrstr = NULL; 151 int node, i; 152 char *p; 153 struct gmac_dma *dp; 154 u_int32_t reg[10]; 155 u_char laddr[6]; 156 157 node = pcidev_to_ofdev(pa->pa_pc, pa->pa_tag); 158 if (node == 0) { 159 printf(": cannot find gmac node\n"); 160 return; 161 } 162 163 OF_getprop(node, "local-mac-address", laddr, sizeof laddr); 164 OF_getprop(node, "assigned-addresses", reg, sizeof reg); 165 166 bcopy(laddr, sc->sc_laddr, sizeof laddr); 167 sc->sc_reg = reg[2]; 168 169 if (pci_intr_map(pa->pa_pc, pa->pa_intrtag, pa->pa_intrpin, 170 pa->pa_intrline, &ih)) { 171 printf(": unable to map interrupt\n"); 172 return; 173 } 174 intrstr = pci_intr_string(pa->pa_pc, ih); 175 176 if (pci_intr_establish(pa->pa_pc, ih, IPL_NET, gmac_intr, sc) == NULL) { 177 printf(": unable to establish interrupt"); 178 if (intrstr) 179 printf(" at %s", intrstr); 180 printf("\n"); 181 return; 182 } 183 184 /* Setup packet buffers and dma descriptors. */ 185 p = malloc((NRXBUF + NTXBUF) * 2048 + 3 * 0x800, M_DEVBUF, M_NOWAIT); 186 if (p == NULL) { 187 printf(": cannot malloc buffers\n"); 188 return; 189 } 190 p = (void *)roundup((vaddr_t)p, 0x800); 191 bzero(p, 2048 * (NRXBUF + NTXBUF) + 2 * 0x800); 192 193 sc->sc_rxlist = (void *)p; 194 p += 0x800; 195 sc->sc_txlist = (void *)p; 196 p += 0x800; 197 198 dp = sc->sc_rxlist; 199 for (i = 0; i < NRXBUF; i++) { 200 sc->sc_rxbuf[i] = p; 201 dp->address = htole32(vtophys(p)); 202 dp->cmd = htole32(GMAC_OWN); 203 dp++; 204 p += 2048; 205 } 206 207 dp = sc->sc_txlist; 208 for (i = 0; i < NTXBUF; i++) { 209 sc->sc_txbuf[i] = p; 210 dp->address = htole32(vtophys(p)); 211 dp++; 212 p += 2048; 213 } 214 215 printf(": Ethernet address %s\n", ether_sprintf(laddr)); 216 printf("%s: interrupting at %s\n", sc->sc_dev.dv_xname, intrstr); 217 218 callout_init(&sc->sc_tick_ch); 219 220 gmac_reset(sc); 221 gmac_init_mac(sc); 222 223 bcopy(sc->sc_dev.dv_xname, ifp->if_xname, IFNAMSIZ); 224 ifp->if_softc = sc; 225 ifp->if_ioctl = gmac_ioctl; 226 ifp->if_start = gmac_start; 227 ifp->if_watchdog = gmac_watchdog; 228 ifp->if_flags = 229 IFF_BROADCAST | IFF_SIMPLEX | IFF_NOTRAILERS | IFF_MULTICAST; 230 ifp->if_flags |= IFF_ALLMULTI; 231 232 mii->mii_ifp = ifp; 233 mii->mii_readreg = gmac_mii_readreg; 234 mii->mii_writereg = gmac_mii_writereg; 235 mii->mii_statchg = gmac_mii_statchg; 236 237 ifmedia_init(&mii->mii_media, 0, gmac_mediachange, gmac_mediastatus); 238 mii_attach(self, mii, 0xffffffff, MII_PHY_ANY, MII_OFFSET_ANY, 0); 239 240 /* Choose a default media. */ 241 if (LIST_FIRST(&mii->mii_phys) == NULL) { 242 ifmedia_add(&mii->mii_media, IFM_ETHER|IFM_NONE, 0, NULL); 243 ifmedia_set(&mii->mii_media, IFM_ETHER|IFM_NONE); 244 } else 245 ifmedia_set(&mii->mii_media, IFM_ETHER|IFM_AUTO); 246 247 if_attach(ifp); 248 ether_ifattach(ifp, laddr); 249 250 #if NBPFILTER > 0 251 bpfattach(&ifp->if_bpf, ifp, DLT_EN10MB, sizeof(struct ether_header)); 252 #endif 253 } 254 255 u_int 256 gmac_read_reg(sc, reg) 257 struct gmac_softc *sc; 258 int reg; 259 { 260 return in32rb(sc->sc_reg + reg); 261 } 262 263 void 264 gmac_write_reg(sc, reg, val) 265 struct gmac_softc *sc; 266 int reg; 267 u_int val; 268 { 269 out32rb(sc->sc_reg + reg, val); 270 } 271 272 void 273 gmac_start_txdma(sc) 274 struct gmac_softc *sc; 275 { 276 u_int x; 277 278 x = gmac_read_reg(sc, GMAC_TXDMACONFIG); 279 x |= 1; 280 gmac_write_reg(sc, GMAC_TXDMACONFIG, x); 281 x = gmac_read_reg(sc, GMAC_TXMACCONFIG); 282 x |= 1; 283 gmac_write_reg(sc, GMAC_TXMACCONFIG, x); 284 } 285 286 void 287 gmac_start_rxdma(sc) 288 struct gmac_softc *sc; 289 { 290 u_int x; 291 292 x = gmac_read_reg(sc, GMAC_RXDMACONFIG); 293 x |= 1; 294 gmac_write_reg(sc, GMAC_RXDMACONFIG, x); 295 x = gmac_read_reg(sc, GMAC_RXMACCONFIG); 296 x |= 1; 297 gmac_write_reg(sc, GMAC_RXMACCONFIG, x); 298 } 299 300 void 301 gmac_stop_txdma(sc) 302 struct gmac_softc *sc; 303 { 304 u_int x; 305 306 x = gmac_read_reg(sc, GMAC_TXDMACONFIG); 307 x &= ~1; 308 gmac_write_reg(sc, GMAC_TXDMACONFIG, x); 309 x = gmac_read_reg(sc, GMAC_TXMACCONFIG); 310 x &= ~1; 311 gmac_write_reg(sc, GMAC_TXMACCONFIG, x); 312 } 313 314 void 315 gmac_stop_rxdma(sc) 316 struct gmac_softc *sc; 317 { 318 u_int x; 319 320 x = gmac_read_reg(sc, GMAC_RXDMACONFIG); 321 x &= ~1; 322 gmac_write_reg(sc, GMAC_RXDMACONFIG, x); 323 x = gmac_read_reg(sc, GMAC_RXMACCONFIG); 324 x &= ~1; 325 gmac_write_reg(sc, GMAC_RXMACCONFIG, x); 326 } 327 328 int 329 gmac_intr(v) 330 void *v; 331 { 332 struct gmac_softc *sc = v; 333 u_int status; 334 335 status = gmac_read_reg(sc, GMAC_STATUS) & 0xff; 336 if (status == 0) 337 return 0; 338 339 if (status & GMAC_INT_RXDONE) 340 gmac_rint(sc); 341 342 if (status & GMAC_INT_TXEMPTY) 343 gmac_tint(sc); 344 345 return 1; 346 } 347 348 void 349 gmac_tint(sc) 350 struct gmac_softc *sc; 351 { 352 struct ifnet *ifp = &sc->sc_if; 353 354 ifp->if_flags &= ~IFF_OACTIVE; 355 ifp->if_timer = 0; 356 gmac_start(ifp); 357 } 358 359 void 360 gmac_rint(sc) 361 struct gmac_softc *sc; 362 { 363 struct ifnet *ifp = &sc->sc_if; 364 volatile struct gmac_dma *dp; 365 struct mbuf *m; 366 int i, len; 367 u_int cmd; 368 369 for (i = sc->sc_rxlast;; i++) { 370 if (i == NRXBUF) 371 i = 0; 372 373 dp = &sc->sc_rxlist[i]; 374 cmd = le32toh(dp->cmd); 375 if (cmd & GMAC_OWN) 376 break; 377 len = (cmd >> 16) & GMAC_LEN_MASK; 378 len -= 4; /* CRC */ 379 380 if (le32toh(dp->cmd_hi) & 0x40000000) { 381 ifp->if_ierrors++; 382 goto next; 383 } 384 385 m = gmac_get(sc, sc->sc_rxbuf[i], len); 386 if (m == NULL) { 387 ifp->if_ierrors++; 388 goto next; 389 } 390 391 #if NBPFILTER > 0 392 /* 393 * Check if there's a BPF listener on this interface. 394 * If so, hand off the raw packet to BPF. 395 */ 396 if (ifp->if_bpf) 397 bpf_tap(ifp->if_bpf, sc->sc_rxbuf[i], len); 398 #endif 399 (*ifp->if_input)(ifp, m); 400 ifp->if_ipackets++; 401 402 next: 403 dp->cmd_hi = 0; 404 __asm __volatile ("sync"); 405 dp->cmd = htole32(GMAC_OWN); 406 } 407 sc->sc_rxlast = i; 408 } 409 410 struct mbuf * 411 gmac_get(sc, pkt, totlen) 412 struct gmac_softc *sc; 413 caddr_t pkt; 414 int totlen; 415 { 416 struct mbuf *m; 417 struct mbuf *top, **mp; 418 int len; 419 420 MGETHDR(m, M_DONTWAIT, MT_DATA); 421 if (m == 0) 422 return 0; 423 m->m_pkthdr.rcvif = &sc->sc_if; 424 m->m_pkthdr.len = totlen; 425 len = MHLEN; 426 top = 0; 427 mp = ⊤ 428 429 while (totlen > 0) { 430 if (top) { 431 MGET(m, M_DONTWAIT, MT_DATA); 432 if (m == 0) { 433 m_freem(top); 434 return 0; 435 } 436 len = MLEN; 437 } 438 if (totlen >= MINCLSIZE) { 439 MCLGET(m, M_DONTWAIT); 440 if ((m->m_flags & M_EXT) == 0) { 441 m_free(m); 442 m_freem(top); 443 return 0; 444 } 445 len = MCLBYTES; 446 } 447 m->m_len = len = min(totlen, len); 448 bcopy(pkt, mtod(m, caddr_t), len); 449 pkt += len; 450 totlen -= len; 451 *mp = m; 452 mp = &m->m_next; 453 } 454 455 return top; 456 } 457 458 void 459 gmac_start(ifp) 460 struct ifnet *ifp; 461 { 462 struct gmac_softc *sc = ifp->if_softc; 463 struct mbuf *m; 464 caddr_t buff; 465 int i, tlen; 466 volatile struct gmac_dma *dp; 467 468 if ((ifp->if_flags & (IFF_RUNNING | IFF_OACTIVE)) != IFF_RUNNING) 469 return; 470 471 for (;;) { 472 if (ifp->if_flags & IFF_OACTIVE) 473 break; 474 475 IF_DEQUEUE(&ifp->if_snd, m); 476 if (m == 0) 477 break; 478 479 /* 5 seconds to watch for failing to transmit */ 480 ifp->if_timer = 5; 481 ifp->if_opackets++; /* # of pkts */ 482 483 i = sc->sc_txnext; 484 buff = sc->sc_txbuf[i]; 485 tlen = gmac_put(sc, buff, m); 486 487 dp = &sc->sc_txlist[i]; 488 dp->cmd_hi = 0; 489 dp->address_hi = 0; 490 dp->cmd = htole32(tlen | GMAC_OWN | GMAC_SOP); 491 492 i++; 493 if (i == NTXBUF) 494 i = 0; 495 __asm __volatile ("sync"); 496 497 gmac_write_reg(sc, GMAC_TXDMAKICK, i); 498 sc->sc_txnext = i; 499 500 #if NBPFILTER > 0 501 /* 502 * If BPF is listening on this interface, let it see the 503 * packet before we commit it to the wire. 504 */ 505 if (ifp->if_bpf) 506 bpf_tap(ifp->if_bpf, buff, tlen); 507 #endif 508 509 i++; 510 if (i == NTXBUF) 511 i = 0; 512 if (i == gmac_read_reg(sc, GMAC_TXDMACOMPLETE)) { 513 ifp->if_flags |= IFF_OACTIVE; 514 break; 515 } 516 } 517 } 518 519 int 520 gmac_put(sc, buff, m) 521 struct gmac_softc *sc; 522 caddr_t buff; 523 struct mbuf *m; 524 { 525 struct mbuf *n; 526 int len, tlen = 0; 527 528 for (; m; m = n) { 529 len = m->m_len; 530 if (len == 0) { 531 MFREE(m, n); 532 continue; 533 } 534 bcopy(mtod(m, caddr_t), buff, len); 535 buff += len; 536 tlen += len; 537 MFREE(m, n); 538 } 539 if (tlen > 2048) 540 panic("%s: gmac_put packet overflow", sc->sc_dev.dv_xname); 541 542 return tlen; 543 } 544 545 void 546 gmac_reset(sc) 547 struct gmac_softc *sc; 548 { 549 int i, s; 550 551 s = splnet(); 552 553 gmac_stop_txdma(sc); 554 gmac_stop_rxdma(sc); 555 556 gmac_write_reg(sc, GMAC_SOFTWARERESET, 3); 557 for (i = 10; i > 0; i--) { 558 delay(300000); /* XXX long delay */ 559 if ((gmac_read_reg(sc, GMAC_SOFTWARERESET) & 3) == 0) 560 break; 561 } 562 if (i == 0) 563 printf("%s: reset timeout\n", sc->sc_dev.dv_xname); 564 565 sc->sc_txnext = 0; 566 sc->sc_rxlast = 0; 567 for (i = 0; i < NRXBUF; i++) 568 sc->sc_rxlist[i].cmd = htole32(GMAC_OWN); 569 __asm __volatile ("sync"); 570 571 gmac_write_reg(sc, GMAC_TXDMADESCBASEHI, 0); 572 gmac_write_reg(sc, GMAC_TXDMADESCBASELO, vtophys(sc->sc_txlist)); 573 gmac_write_reg(sc, GMAC_RXDMADESCBASEHI, 0); 574 gmac_write_reg(sc, GMAC_RXDMADESCBASELO, vtophys(sc->sc_rxlist)); 575 gmac_write_reg(sc, GMAC_RXDMAKICK, NRXBUF); 576 577 splx(s); 578 } 579 580 void 581 gmac_stop(sc) 582 struct gmac_softc *sc; 583 { 584 struct ifnet *ifp = &sc->sc_if; 585 int s; 586 587 s = splnet(); 588 589 callout_stop(&sc->sc_tick_ch); 590 mii_down(&sc->sc_mii); 591 592 gmac_stop_txdma(sc); 593 gmac_stop_rxdma(sc); 594 595 gmac_write_reg(sc, GMAC_INTMASK, 0xffffffff); 596 597 ifp->if_flags &= ~(IFF_UP | IFF_RUNNING); 598 ifp->if_timer = 0; 599 600 splx(s); 601 } 602 603 void 604 gmac_init_mac(sc) 605 struct gmac_softc *sc; 606 { 607 int i, tb; 608 char *laddr = sc->sc_laddr; 609 610 __asm ("mftb %0" : "=r"(tb)); 611 gmac_write_reg(sc, GMAC_RANDOMSEED, tb); 612 613 /* init-mii */ 614 gmac_write_reg(sc, GMAC_DATAPATHMODE, 4); 615 gmac_mii_writereg(&sc->sc_dev, 0, 0, 0x1000); 616 617 gmac_write_reg(sc, GMAC_TXDMACONFIG, 0xffc00); 618 gmac_write_reg(sc, GMAC_RXDMACONFIG, 0); 619 gmac_write_reg(sc, GMAC_MACPAUSE, 0x1bf0); 620 gmac_write_reg(sc, GMAC_INTERPACKETGAP0, 0); 621 gmac_write_reg(sc, GMAC_INTERPACKETGAP1, 8); 622 gmac_write_reg(sc, GMAC_INTERPACKETGAP2, 4); 623 gmac_write_reg(sc, GMAC_MINFRAMESIZE, ETHER_MIN_LEN); 624 gmac_write_reg(sc, GMAC_MAXFRAMESIZE, ETHER_MAX_LEN); 625 gmac_write_reg(sc, GMAC_PASIZE, 7); 626 gmac_write_reg(sc, GMAC_JAMSIZE, 4); 627 gmac_write_reg(sc, GMAC_ATTEMPTLIMIT,0x10); 628 gmac_write_reg(sc, GMAC_MACCNTLTYPE, 0x8808); 629 630 gmac_write_reg(sc, GMAC_MACADDRESS0, (laddr[4] << 8) | laddr[5]); 631 gmac_write_reg(sc, GMAC_MACADDRESS1, (laddr[2] << 8) | laddr[3]); 632 gmac_write_reg(sc, GMAC_MACADDRESS2, (laddr[0] << 8) | laddr[1]); 633 gmac_write_reg(sc, GMAC_MACADDRESS3, 0); 634 gmac_write_reg(sc, GMAC_MACADDRESS4, 0); 635 gmac_write_reg(sc, GMAC_MACADDRESS5, 0); 636 gmac_write_reg(sc, GMAC_MACADDRESS6, 1); 637 gmac_write_reg(sc, GMAC_MACADDRESS7, 0xc200); 638 gmac_write_reg(sc, GMAC_MACADDRESS8, 0x0180); 639 gmac_write_reg(sc, GMAC_MACADDRFILT0, 0); 640 gmac_write_reg(sc, GMAC_MACADDRFILT1, 0); 641 gmac_write_reg(sc, GMAC_MACADDRFILT2, 0); 642 gmac_write_reg(sc, GMAC_MACADDRFILT2_1MASK, 0); 643 gmac_write_reg(sc, GMAC_MACADDRFILT0MASK, 0); 644 645 for (i = 0; i < 0x6c; i+= 4) 646 gmac_write_reg(sc, GMAC_HASHTABLE0 + i, 0); 647 648 gmac_write_reg(sc, GMAC_SLOTTIME, 0x40); 649 650 if (IFM_OPTIONS(sc->sc_mii.mii_media_active) & IFM_FDX) { 651 gmac_write_reg(sc, GMAC_TXMACCONFIG, 6); 652 gmac_write_reg(sc, GMAC_XIFCONFIG, 1); 653 } else { 654 gmac_write_reg(sc, GMAC_TXMACCONFIG, 0); 655 gmac_write_reg(sc, GMAC_XIFCONFIG, 5); 656 } 657 658 if (0) /* g-bit? */ 659 gmac_write_reg(sc, GMAC_MACCTRLCONFIG, 3); 660 else 661 gmac_write_reg(sc, GMAC_MACCTRLCONFIG, 0); 662 } 663 664 void 665 gmac_init(sc) 666 struct gmac_softc *sc; 667 { 668 struct ifnet *ifp = &sc->sc_if; 669 u_int x; 670 int i; 671 672 gmac_stop_txdma(sc); 673 gmac_stop_rxdma(sc); 674 675 gmac_init_mac(sc); 676 677 x = gmac_read_reg(sc, GMAC_RXMACCONFIG); 678 if (ifp->if_flags & IFF_PROMISC) 679 x |= GMAC_RXMAC_PR; 680 else 681 x &= ~GMAC_RXMAC_PR; 682 gmac_write_reg(sc, GMAC_RXMACCONFIG, x); 683 684 gmac_start_txdma(sc); 685 gmac_start_rxdma(sc); 686 687 gmac_write_reg(sc, GMAC_INTMASK, ~(GMAC_INT_TXEMPTY | GMAC_INT_RXDONE)); 688 689 ifp->if_flags |= IFF_RUNNING; 690 ifp->if_flags &= ~IFF_OACTIVE; 691 ifp->if_timer = 0; 692 693 callout_reset(&sc->sc_tick_ch, 1, gmac_mii_tick, sc); 694 695 gmac_start(ifp); 696 } 697 698 int 699 gmac_ioctl(ifp, cmd, data) 700 struct ifnet *ifp; 701 u_long cmd; 702 caddr_t data; 703 { 704 struct gmac_softc *sc = ifp->if_softc; 705 struct ifaddr *ifa = (struct ifaddr *)data; 706 struct ifreq *ifr = (struct ifreq *)data; 707 int s, error = 0; 708 709 s = splnet(); 710 711 switch (cmd) { 712 713 case SIOCSIFADDR: 714 ifp->if_flags |= IFF_UP; 715 716 switch (ifa->ifa_addr->sa_family) { 717 #ifdef INET 718 case AF_INET: 719 gmac_init(sc); 720 arp_ifinit(ifp, ifa); 721 break; 722 #endif 723 #ifdef NS 724 case AF_NS: 725 { 726 struct ns_addr *ina = &IA_SNS(ifa)->sns_addr; 727 728 if (ns_nullhost(*ina)) 729 ina->x_host = 730 *(union ns_host *)LLADDR(ifp->if_sadl); 731 else { 732 bcopy(ina->x_host.c_host, 733 LLADDR(ifp->if_sadl), 734 sizeof(sc->sc_enaddr)); 735 } 736 /* Set new address. */ 737 gmac_init(sc); 738 break; 739 } 740 #endif 741 default: 742 gmac_init(sc); 743 break; 744 } 745 break; 746 747 case SIOCSIFFLAGS: 748 if ((ifp->if_flags & IFF_UP) == 0 && 749 (ifp->if_flags & IFF_RUNNING) != 0) { 750 /* 751 * If interface is marked down and it is running, then 752 * stop it. 753 */ 754 gmac_stop(sc); 755 ifp->if_flags &= ~IFF_RUNNING; 756 } else if ((ifp->if_flags & IFF_UP) != 0 && 757 (ifp->if_flags & IFF_RUNNING) == 0) { 758 /* 759 * If interface is marked up and it is stopped, then 760 * start it. 761 */ 762 gmac_init(sc); 763 } else { 764 /* 765 * Reset the interface to pick up changes in any other 766 * flags that affect hardware registers. 767 */ 768 gmac_reset(sc); 769 gmac_init(sc); 770 } 771 #ifdef GMAC_DEBUG 772 if (ifp->if_flags & IFF_DEBUG) 773 sc->sc_flags |= GMAC_DEBUGFLAG; 774 #endif 775 break; 776 777 case SIOCADDMULTI: 778 case SIOCDELMULTI: 779 error = (cmd == SIOCADDMULTI) ? 780 ether_addmulti(ifr, &sc->sc_ethercom) : 781 ether_delmulti(ifr, &sc->sc_ethercom); 782 783 if (error == ENETRESET) { 784 /* 785 * Multicast list has changed; set the hardware filter 786 * accordingly. 787 */ 788 gmac_init(sc); 789 /* gmac_setladrf(sc); */ 790 error = 0; 791 } 792 break; 793 794 case SIOCGIFMEDIA: 795 case SIOCSIFMEDIA: 796 error = ifmedia_ioctl(ifp, ifr, &sc->sc_mii.mii_media, cmd); 797 break; 798 799 default: 800 error = EINVAL; 801 } 802 803 splx(s); 804 return error; 805 } 806 807 void 808 gmac_watchdog(ifp) 809 struct ifnet *ifp; 810 { 811 struct gmac_softc *sc = ifp->if_softc; 812 813 printf("%s: device timeout\n", ifp->if_xname); 814 ifp->if_oerrors++; 815 816 gmac_reset(sc); 817 gmac_init(sc); 818 } 819 820 int 821 gmac_mediachange(ifp) 822 struct ifnet *ifp; 823 { 824 struct gmac_softc *sc = ifp->if_softc; 825 826 return mii_mediachg(&sc->sc_mii); 827 } 828 829 void 830 gmac_mediastatus(ifp, ifmr) 831 struct ifnet *ifp; 832 struct ifmediareq *ifmr; 833 { 834 struct gmac_softc *sc = ifp->if_softc; 835 836 mii_pollstat(&sc->sc_mii); 837 838 ifmr->ifm_status = sc->sc_mii.mii_media_status; 839 ifmr->ifm_active = sc->sc_mii.mii_media_active; 840 } 841 842 int 843 gmac_mii_readreg(dev, phy, reg) 844 struct device *dev; 845 int phy, reg; 846 { 847 struct gmac_softc *sc = (void *)dev; 848 int i; 849 850 gmac_write_reg(sc, GMAC_MIFFRAMEOUTPUT, 851 0x60020000 | (phy << 23) | (reg << 18)); 852 853 for (i = 1000; i >= 0; i -= 10) { 854 if (gmac_read_reg(sc, GMAC_MIFFRAMEOUTPUT) & 0x10000) 855 break; 856 delay(10); 857 } 858 if (i < 0) { 859 printf("%s: gmac_mii_readreg: timeout\n", sc->sc_dev.dv_xname); 860 return 0; 861 } 862 863 return gmac_read_reg(sc, GMAC_MIFFRAMEOUTPUT) & 0xffff; 864 } 865 866 void 867 gmac_mii_writereg(dev, phy, reg, val) 868 struct device *dev; 869 int phy, reg, val; 870 { 871 struct gmac_softc *sc = (void *)dev; 872 int i; 873 874 gmac_write_reg(sc, GMAC_MIFFRAMEOUTPUT, 875 0x50020000 | (phy << 23) | (reg << 18) | (val & 0xffff)); 876 877 for (i = 1000; i >= 0; i -= 10) { 878 if (gmac_read_reg(sc, GMAC_MIFFRAMEOUTPUT) & 0x10000) 879 break; 880 delay(10); 881 } 882 if (i < 0) 883 printf("%s: gmac_mii_writereg: timeout\n", sc->sc_dev.dv_xname); 884 } 885 886 void 887 gmac_mii_statchg(dev) 888 struct device *dev; 889 { 890 struct gmac_softc *sc = (void *)dev; 891 892 gmac_stop_txdma(sc); 893 gmac_stop_rxdma(sc); 894 895 if (IFM_OPTIONS(sc->sc_mii.mii_media_active) & IFM_FDX) { 896 gmac_write_reg(sc, GMAC_TXMACCONFIG, 6); 897 gmac_write_reg(sc, GMAC_XIFCONFIG, 1); 898 } else { 899 gmac_write_reg(sc, GMAC_TXMACCONFIG, 0); 900 gmac_write_reg(sc, GMAC_XIFCONFIG, 5); 901 } 902 903 if (0) /* g-bit? */ 904 gmac_write_reg(sc, GMAC_MACCTRLCONFIG, 3); 905 else 906 gmac_write_reg(sc, GMAC_MACCTRLCONFIG, 0); 907 908 gmac_start_txdma(sc); 909 gmac_start_rxdma(sc); 910 } 911 912 void 913 gmac_mii_tick(v) 914 void *v; 915 { 916 struct gmac_softc *sc = v; 917 int s; 918 919 s = splnet(); 920 mii_tick(&sc->sc_mii); 921 splx(s); 922 923 callout_reset(&sc->sc_tick_ch, hz, gmac_mii_tick, sc); 924 } 925
Indexes created Tue Sep 30 20:09:53 GMT 2025