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if_gm.c revision 1.7.2.1
      1 /*	$NetBSD: if_gm.c,v 1.7.2.1 2001/06/18 16:49:10 jhawk Exp $	*/
      2 
      3 /*-
      4  * Copyright (c) 2000 Tsubai Masanari.  All rights reserved.
      5  *
      6  * Redistribution and use in source and binary forms, with or without
      7  * modification, are permitted provided that the following conditions
      8  * are met:
      9  * 1. Redistributions of source code must retain the above copyright
     10  *    notice, this list of conditions and the following disclaimer.
     11  * 2. Redistributions in binary form must reproduce the above copyright
     12  *    notice, this list of conditions and the following disclaimer in the
     13  *    documentation and/or other materials provided with the distribution.
     14  * 3. The name of the author may not be used to endorse or promote products
     15  *    derived from this software without specific prior written permission.
     16  *
     17  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
     18  * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
     19  * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
     20  * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
     21  * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
     22  * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
     23  * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
     24  * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
     25  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
     26  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
     27  */
     28 
     29 #include "opt_inet.h"
     30 #include "opt_ns.h"
     31 #include "bpfilter.h"
     32 
     33 #include <sys/param.h>
     34 #include <sys/device.h>
     35 #include <sys/ioctl.h>
     36 #include <sys/kernel.h>
     37 #include <sys/mbuf.h>
     38 #include <sys/socket.h>
     39 #include <sys/systm.h>
     40 #include <sys/callout.h>
     41 
     42 #include <vm/vm.h>
     43 
     44 #include <net/if.h>
     45 #include <net/if_ether.h>
     46 #include <net/if_media.h>
     47 
     48 #if NBPFILTER > 0
     49 #include <net/bpf.h>
     50 #endif
     51 
     52 #ifdef INET
     53 #include <netinet/in.h>
     54 #include <netinet/if_inarp.h>
     55 #endif
     56 
     57 #include <dev/mii/mii.h>
     58 #include <dev/mii/miivar.h>
     59 
     60 #include <dev/pci/pcivar.h>
     61 #include <dev/pci/pcireg.h>
     62 #include <dev/pci/pcidevs.h>
     63 
     64 #include <dev/ofw/openfirm.h>
     65 #include <macppc/dev/if_gmreg.h>
     66 #include <machine/pio.h>
     67 
     68 #define NTXBUF 4
     69 #define NRXBUF 32
     70 
     71 struct gmac_softc {
     72 	struct device sc_dev;
     73 	struct ethercom sc_ethercom;
     74 	vaddr_t sc_reg;
     75 	struct gmac_dma *sc_txlist;
     76 	struct gmac_dma *sc_rxlist;
     77 	int sc_txnext;
     78 	int sc_rxlast;
     79 	caddr_t sc_txbuf[NTXBUF];
     80 	caddr_t sc_rxbuf[NRXBUF];
     81 	struct mii_data sc_mii;
     82 	struct callout sc_tick_ch;
     83 	char sc_laddr[6];
     84 };
     85 
     86 #define sc_if sc_ethercom.ec_if
     87 
     88 int gmac_match __P((struct device *, struct cfdata *, void *));
     89 void gmac_attach __P((struct device *, struct device *, void *));
     90 
     91 static __inline u_int gmac_read_reg __P((struct gmac_softc *, int));
     92 static __inline void gmac_write_reg __P((struct gmac_softc *, int, u_int));
     93 
     94 static __inline void gmac_start_txdma __P((struct gmac_softc *));
     95 static __inline void gmac_start_rxdma __P((struct gmac_softc *));
     96 static __inline void gmac_stop_txdma __P((struct gmac_softc *));
     97 static __inline void gmac_stop_rxdma __P((struct gmac_softc *));
     98 
     99 int gmac_intr __P((void *));
    100 void gmac_tint __P((struct gmac_softc *));
    101 void gmac_rint __P((struct gmac_softc *));
    102 struct mbuf * gmac_get __P((struct gmac_softc *, caddr_t, int));
    103 void gmac_start __P((struct ifnet *));
    104 int gmac_put __P((struct gmac_softc *, caddr_t, struct mbuf *));
    105 
    106 void gmac_stop __P((struct gmac_softc *));
    107 void gmac_reset __P((struct gmac_softc *));
    108 void gmac_init __P((struct gmac_softc *));
    109 void gmac_init_mac __P((struct gmac_softc *));
    110 void gmac_setladrf __P((struct gmac_softc *));
    111 
    112 int gmac_ioctl __P((struct ifnet *, u_long, caddr_t));
    113 void gmac_watchdog __P((struct ifnet *));
    114 
    115 int gmac_mediachange __P((struct ifnet *));
    116 void gmac_mediastatus __P((struct ifnet *, struct ifmediareq *));
    117 int gmac_mii_readreg __P((struct device *, int, int));
    118 void gmac_mii_writereg __P((struct device *, int, int, int));
    119 void gmac_mii_statchg __P((struct device *));
    120 void gmac_mii_tick __P((void *));
    121 
    122 struct cfattach gm_ca = {
    123 	sizeof(struct gmac_softc), gmac_match, gmac_attach
    124 };
    125 
    126 int
    127 gmac_match(parent, match, aux)
    128 	struct device *parent;
    129 	struct cfdata *match;
    130 	void *aux;
    131 {
    132 	struct pci_attach_args *pa = aux;
    133 
    134 	if (PCI_VENDOR(pa->pa_id) == PCI_VENDOR_APPLE &&
    135 	    (PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_APPLE_GMAC ||
    136 	     PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_APPLE_GMAC2))
    137 		return 1;
    138 
    139 	return 0;
    140 }
    141 
    142 void
    143 gmac_attach(parent, self, aux)
    144 	struct device *parent, *self;
    145 	void *aux;
    146 {
    147 	struct gmac_softc *sc = (void *)self;
    148 	struct pci_attach_args *pa = aux;
    149 	struct ifnet *ifp = &sc->sc_if;
    150 	struct mii_data *mii = &sc->sc_mii;
    151 	pci_intr_handle_t ih;
    152 	const char *intrstr = NULL;
    153 	int node, i;
    154 	char *p;
    155 	struct gmac_dma *dp;
    156 	u_int32_t reg[10];
    157 	u_char laddr[6];
    158 
    159 	node = pcidev_to_ofdev(pa->pa_pc, pa->pa_tag);
    160 	if (node == 0) {
    161 		printf(": cannot find gmac node\n");
    162 		return;
    163 	}
    164 
    165 	OF_getprop(node, "local-mac-address", laddr, sizeof laddr);
    166 	OF_getprop(node, "assigned-addresses", reg, sizeof reg);
    167 
    168 	bcopy(laddr, sc->sc_laddr, sizeof laddr);
    169 	sc->sc_reg = reg[2];
    170 
    171 	if (pci_intr_map(pa->pa_pc, pa->pa_intrtag, pa->pa_intrpin,
    172 	    pa->pa_intrline, &ih)) {
    173 		printf(": unable to map interrupt\n");
    174 		return;
    175 	}
    176 	intrstr = pci_intr_string(pa->pa_pc, ih);
    177 
    178 	if (pci_intr_establish(pa->pa_pc, ih, IPL_NET, gmac_intr, sc) == NULL) {
    179 		printf(": unable to establish interrupt");
    180 		if (intrstr)
    181 			printf(" at %s", intrstr);
    182 		printf("\n");
    183 		return;
    184 	}
    185 
    186 	/* Setup packet buffers and dma descriptors. */
    187 	p = malloc((NRXBUF + NTXBUF) * 2048 + 3 * 0x800, M_DEVBUF, M_NOWAIT);
    188 	if (p == NULL) {
    189 		printf(": cannot malloc buffers\n");
    190 		return;
    191 	}
    192 	p = (void *)roundup((vaddr_t)p, 0x800);
    193 	bzero(p, 2048 * (NRXBUF + NTXBUF) + 2 * 0x800);
    194 
    195 	sc->sc_rxlist = (void *)p;
    196 	p += 0x800;
    197 	sc->sc_txlist = (void *)p;
    198 	p += 0x800;
    199 
    200 	dp = sc->sc_rxlist;
    201 	for (i = 0; i < NRXBUF; i++) {
    202 		sc->sc_rxbuf[i] = p;
    203 		dp->address = htole32(vtophys((vaddr_t)p));
    204 		dp->cmd = htole32(GMAC_OWN);
    205 		dp++;
    206 		p += 2048;
    207 	}
    208 
    209 	dp = sc->sc_txlist;
    210 	for (i = 0; i < NTXBUF; i++) {
    211 		sc->sc_txbuf[i] = p;
    212 		dp->address = htole32(vtophys((vaddr_t)p));
    213 		dp++;
    214 		p += 2048;
    215 	}
    216 
    217 	printf(": Ethernet address %s\n", ether_sprintf(laddr));
    218 	printf("%s: interrupting at %s\n", sc->sc_dev.dv_xname, intrstr);
    219 
    220 	callout_init(&sc->sc_tick_ch);
    221 
    222 	gmac_reset(sc);
    223 	gmac_init_mac(sc);
    224 
    225 	bcopy(sc->sc_dev.dv_xname, ifp->if_xname, IFNAMSIZ);
    226 	ifp->if_softc = sc;
    227 	ifp->if_ioctl = gmac_ioctl;
    228 	ifp->if_start = gmac_start;
    229 	ifp->if_watchdog = gmac_watchdog;
    230 	ifp->if_flags =
    231 		IFF_BROADCAST | IFF_SIMPLEX | IFF_NOTRAILERS | IFF_MULTICAST;
    232 
    233 	mii->mii_ifp = ifp;
    234 	mii->mii_readreg = gmac_mii_readreg;
    235 	mii->mii_writereg = gmac_mii_writereg;
    236 	mii->mii_statchg = gmac_mii_statchg;
    237 
    238 	ifmedia_init(&mii->mii_media, 0, gmac_mediachange, gmac_mediastatus);
    239 	mii_attach(self, mii, 0xffffffff, MII_PHY_ANY, MII_OFFSET_ANY, 0);
    240 
    241 	/* Choose a default media. */
    242 	if (LIST_FIRST(&mii->mii_phys) == NULL) {
    243 		ifmedia_add(&mii->mii_media, IFM_ETHER|IFM_NONE, 0, NULL);
    244 		ifmedia_set(&mii->mii_media, IFM_ETHER|IFM_NONE);
    245 	} else
    246 		ifmedia_set(&mii->mii_media, IFM_ETHER|IFM_AUTO);
    247 
    248 	if_attach(ifp);
    249 	ether_ifattach(ifp, laddr);
    250 
    251 #if NBPFILTER > 0
    252 	bpfattach(&ifp->if_bpf, ifp, DLT_EN10MB, sizeof(struct ether_header));
    253 #endif
    254 }
    255 
    256 u_int
    257 gmac_read_reg(sc, reg)
    258 	struct gmac_softc *sc;
    259 	int reg;
    260 {
    261 	return in32rb(sc->sc_reg + reg);
    262 }
    263 
    264 void
    265 gmac_write_reg(sc, reg, val)
    266 	struct gmac_softc *sc;
    267 	int reg;
    268 	u_int val;
    269 {
    270 	out32rb(sc->sc_reg + reg, val);
    271 }
    272 
    273 void
    274 gmac_start_txdma(sc)
    275 	struct gmac_softc *sc;
    276 {
    277 	u_int x;
    278 
    279 	x = gmac_read_reg(sc, GMAC_TXDMACONFIG);
    280 	x |= 1;
    281 	gmac_write_reg(sc, GMAC_TXDMACONFIG, x);
    282 	x = gmac_read_reg(sc, GMAC_TXMACCONFIG);
    283 	x |= 1;
    284 	gmac_write_reg(sc, GMAC_TXMACCONFIG, x);
    285 }
    286 
    287 void
    288 gmac_start_rxdma(sc)
    289 	struct gmac_softc *sc;
    290 {
    291 	u_int x;
    292 
    293 	x = gmac_read_reg(sc, GMAC_RXDMACONFIG);
    294 	x |= 1;
    295 	gmac_write_reg(sc, GMAC_RXDMACONFIG, x);
    296 	x = gmac_read_reg(sc, GMAC_RXMACCONFIG);
    297 	x |= 1;
    298 	gmac_write_reg(sc, GMAC_RXMACCONFIG, x);
    299 }
    300 
    301 void
    302 gmac_stop_txdma(sc)
    303 	struct gmac_softc *sc;
    304 {
    305 	u_int x;
    306 
    307 	x = gmac_read_reg(sc, GMAC_TXDMACONFIG);
    308 	x &= ~1;
    309 	gmac_write_reg(sc, GMAC_TXDMACONFIG, x);
    310 	x = gmac_read_reg(sc, GMAC_TXMACCONFIG);
    311 	x &= ~1;
    312 	gmac_write_reg(sc, GMAC_TXMACCONFIG, x);
    313 }
    314 
    315 void
    316 gmac_stop_rxdma(sc)
    317 	struct gmac_softc *sc;
    318 {
    319 	u_int x;
    320 
    321 	x = gmac_read_reg(sc, GMAC_RXDMACONFIG);
    322 	x &= ~1;
    323 	gmac_write_reg(sc, GMAC_RXDMACONFIG, x);
    324 	x = gmac_read_reg(sc, GMAC_RXMACCONFIG);
    325 	x &= ~1;
    326 	gmac_write_reg(sc, GMAC_RXMACCONFIG, x);
    327 }
    328 
    329 int
    330 gmac_intr(v)
    331 	void *v;
    332 {
    333 	struct gmac_softc *sc = v;
    334 	u_int status;
    335 
    336 	status = gmac_read_reg(sc, GMAC_STATUS) & 0xff;
    337 	if (status == 0)
    338 		return 0;
    339 
    340 	if (status & GMAC_INT_RXDONE)
    341 		gmac_rint(sc);
    342 
    343 	if (status & GMAC_INT_TXEMPTY)
    344 		gmac_tint(sc);
    345 
    346 	return 1;
    347 }
    348 
    349 void
    350 gmac_tint(sc)
    351 	struct gmac_softc *sc;
    352 {
    353 	struct ifnet *ifp = &sc->sc_if;
    354 
    355 	ifp->if_flags &= ~IFF_OACTIVE;
    356 	ifp->if_timer = 0;
    357 	gmac_start(ifp);
    358 }
    359 
    360 void
    361 gmac_rint(sc)
    362 	struct gmac_softc *sc;
    363 {
    364 	struct ifnet *ifp = &sc->sc_if;
    365 	volatile struct gmac_dma *dp;
    366 	struct mbuf *m;
    367 	int i, len;
    368 	u_int cmd;
    369 
    370 	for (i = sc->sc_rxlast;; i++) {
    371 		if (i == NRXBUF)
    372 			i = 0;
    373 
    374 		dp = &sc->sc_rxlist[i];
    375 		cmd = le32toh(dp->cmd);
    376 		if (cmd & GMAC_OWN)
    377 			break;
    378 		len = (cmd >> 16) & GMAC_LEN_MASK;
    379 		len -= 4;	/* CRC */
    380 
    381 		if (le32toh(dp->cmd_hi) & 0x40000000) {
    382 			ifp->if_ierrors++;
    383 			goto next;
    384 		}
    385 
    386 		m = gmac_get(sc, sc->sc_rxbuf[i], len);
    387 		if (m == NULL) {
    388 			ifp->if_ierrors++;
    389 			goto next;
    390 		}
    391 
    392 #if NBPFILTER > 0
    393 		/*
    394 		 * Check if there's a BPF listener on this interface.
    395 		 * If so, hand off the raw packet to BPF.
    396 		 */
    397 		if (ifp->if_bpf)
    398 			bpf_tap(ifp->if_bpf, sc->sc_rxbuf[i], len);
    399 #endif
    400 		(*ifp->if_input)(ifp, m);
    401 		ifp->if_ipackets++;
    402 
    403 next:
    404 		dp->cmd_hi = 0;
    405 		__asm __volatile ("sync");
    406 		dp->cmd = htole32(GMAC_OWN);
    407 	}
    408 	sc->sc_rxlast = i;
    409 }
    410 
    411 struct mbuf *
    412 gmac_get(sc, pkt, totlen)
    413 	struct gmac_softc *sc;
    414 	caddr_t pkt;
    415 	int totlen;
    416 {
    417 	struct mbuf *m;
    418 	struct mbuf *top, **mp;
    419 	int len;
    420 
    421 	MGETHDR(m, M_DONTWAIT, MT_DATA);
    422 	if (m == 0)
    423 		return 0;
    424 	m->m_pkthdr.rcvif = &sc->sc_if;
    425 	m->m_pkthdr.len = totlen;
    426 	len = MHLEN;
    427 	top = 0;
    428 	mp = &top;
    429 
    430 	while (totlen > 0) {
    431 		if (top) {
    432 			MGET(m, M_DONTWAIT, MT_DATA);
    433 			if (m == 0) {
    434 				m_freem(top);
    435 				return 0;
    436 			}
    437 			len = MLEN;
    438 		}
    439 		if (totlen >= MINCLSIZE) {
    440 			MCLGET(m, M_DONTWAIT);
    441 			if ((m->m_flags & M_EXT) == 0) {
    442 				m_free(m);
    443 				m_freem(top);
    444 				return 0;
    445 			}
    446 			len = MCLBYTES;
    447 		}
    448 		m->m_len = len = min(totlen, len);
    449 		bcopy(pkt, mtod(m, caddr_t), len);
    450 		pkt += len;
    451 		totlen -= len;
    452 		*mp = m;
    453 		mp = &m->m_next;
    454 	}
    455 
    456 	return top;
    457 }
    458 
    459 void
    460 gmac_start(ifp)
    461 	struct ifnet *ifp;
    462 {
    463 	struct gmac_softc *sc = ifp->if_softc;
    464 	struct mbuf *m;
    465 	caddr_t buff;
    466 	int i, tlen;
    467 	volatile struct gmac_dma *dp;
    468 
    469 	if ((ifp->if_flags & (IFF_RUNNING | IFF_OACTIVE)) != IFF_RUNNING)
    470 		return;
    471 
    472 	for (;;) {
    473 		if (ifp->if_flags & IFF_OACTIVE)
    474 			break;
    475 
    476 		IF_DEQUEUE(&ifp->if_snd, m);
    477 		if (m == 0)
    478 			break;
    479 
    480 		/* 5 seconds to watch for failing to transmit */
    481 		ifp->if_timer = 5;
    482 		ifp->if_opackets++;		/* # of pkts */
    483 
    484 		i = sc->sc_txnext;
    485 		buff = sc->sc_txbuf[i];
    486 		tlen = gmac_put(sc, buff, m);
    487 
    488 		dp = &sc->sc_txlist[i];
    489 		dp->cmd_hi = 0;
    490 		dp->address_hi = 0;
    491 		dp->cmd = htole32(tlen | GMAC_OWN | GMAC_SOP);
    492 
    493 		i++;
    494 		if (i == NTXBUF)
    495 			i = 0;
    496 		__asm __volatile ("sync");
    497 
    498 		gmac_write_reg(sc, GMAC_TXDMAKICK, i);
    499 		sc->sc_txnext = i;
    500 
    501 #if NBPFILTER > 0
    502 		/*
    503 		 * If BPF is listening on this interface, let it see the
    504 		 * packet before we commit it to the wire.
    505 		 */
    506 		if (ifp->if_bpf)
    507 			bpf_tap(ifp->if_bpf, buff, tlen);
    508 #endif
    509 
    510 		i++;
    511 		if (i == NTXBUF)
    512 			i = 0;
    513 		if (i == gmac_read_reg(sc, GMAC_TXDMACOMPLETE)) {
    514 			ifp->if_flags |= IFF_OACTIVE;
    515 			break;
    516 		}
    517 	}
    518 }
    519 
    520 int
    521 gmac_put(sc, buff, m)
    522 	struct gmac_softc *sc;
    523 	caddr_t buff;
    524 	struct mbuf *m;
    525 {
    526 	struct mbuf *n;
    527 	int len, tlen = 0;
    528 
    529 	for (; m; m = n) {
    530 		len = m->m_len;
    531 		if (len == 0) {
    532 			MFREE(m, n);
    533 			continue;
    534 		}
    535 		bcopy(mtod(m, caddr_t), buff, len);
    536 		buff += len;
    537 		tlen += len;
    538 		MFREE(m, n);
    539 	}
    540 	if (tlen > 2048)
    541 		panic("%s: gmac_put packet overflow", sc->sc_dev.dv_xname);
    542 
    543 	return tlen;
    544 }
    545 
    546 void
    547 gmac_reset(sc)
    548 	struct gmac_softc *sc;
    549 {
    550 	int i, s;
    551 
    552 	s = splnet();
    553 
    554 	gmac_stop_txdma(sc);
    555 	gmac_stop_rxdma(sc);
    556 
    557 	gmac_write_reg(sc, GMAC_SOFTWARERESET, 3);
    558 	for (i = 10; i > 0; i--) {
    559 		delay(300000);				/* XXX long delay */
    560 		if ((gmac_read_reg(sc, GMAC_SOFTWARERESET) & 3) == 0)
    561 			break;
    562 	}
    563 	if (i == 0)
    564 		printf("%s: reset timeout\n", sc->sc_dev.dv_xname);
    565 
    566 	sc->sc_txnext = 0;
    567 	sc->sc_rxlast = 0;
    568 	for (i = 0; i < NRXBUF; i++)
    569 		sc->sc_rxlist[i].cmd = htole32(GMAC_OWN);
    570 	__asm __volatile ("sync");
    571 
    572 	gmac_write_reg(sc, GMAC_TXDMADESCBASEHI, 0);
    573 	gmac_write_reg(sc, GMAC_TXDMADESCBASELO,
    574 		       vtophys((vaddr_t)sc->sc_txlist));
    575 	gmac_write_reg(sc, GMAC_RXDMADESCBASEHI, 0);
    576 	gmac_write_reg(sc, GMAC_RXDMADESCBASELO,
    577 		       vtophys((vaddr_t)sc->sc_rxlist));
    578 	gmac_write_reg(sc, GMAC_RXDMAKICK, NRXBUF);
    579 
    580 	splx(s);
    581 }
    582 
    583 void
    584 gmac_stop(sc)
    585 	struct gmac_softc *sc;
    586 {
    587 	struct ifnet *ifp = &sc->sc_if;
    588 	int s;
    589 
    590 	s = splnet();
    591 
    592 	callout_stop(&sc->sc_tick_ch);
    593 	mii_down(&sc->sc_mii);
    594 
    595 	gmac_stop_txdma(sc);
    596 	gmac_stop_rxdma(sc);
    597 
    598 	gmac_write_reg(sc, GMAC_INTMASK, 0xffffffff);
    599 
    600 	ifp->if_flags &= ~(IFF_UP | IFF_RUNNING);
    601 	ifp->if_timer = 0;
    602 
    603 	splx(s);
    604 }
    605 
    606 void
    607 gmac_init_mac(sc)
    608 	struct gmac_softc *sc;
    609 {
    610 	int i, tb;
    611 	char *laddr = sc->sc_laddr;
    612 
    613 	__asm ("mftb %0" : "=r"(tb));
    614 	gmac_write_reg(sc, GMAC_RANDOMSEED, tb);
    615 
    616 	/* init-mii */
    617 	gmac_write_reg(sc, GMAC_DATAPATHMODE, 4);
    618 	gmac_mii_writereg(&sc->sc_dev, 0, 0, 0x1000);
    619 
    620 	gmac_write_reg(sc, GMAC_TXDMACONFIG, 0xffc00);
    621 	gmac_write_reg(sc, GMAC_RXDMACONFIG, 0);
    622 	gmac_write_reg(sc, GMAC_MACPAUSE, 0x1bf0);
    623 	gmac_write_reg(sc, GMAC_INTERPACKETGAP0, 0);
    624 	gmac_write_reg(sc, GMAC_INTERPACKETGAP1, 8);
    625 	gmac_write_reg(sc, GMAC_INTERPACKETGAP2, 4);
    626 	gmac_write_reg(sc, GMAC_MINFRAMESIZE, ETHER_MIN_LEN);
    627 	gmac_write_reg(sc, GMAC_MAXFRAMESIZE, ETHER_MAX_LEN);
    628 	gmac_write_reg(sc, GMAC_PASIZE, 7);
    629 	gmac_write_reg(sc, GMAC_JAMSIZE, 4);
    630 	gmac_write_reg(sc, GMAC_ATTEMPTLIMIT,0x10);
    631 	gmac_write_reg(sc, GMAC_MACCNTLTYPE, 0x8808);
    632 
    633 	gmac_write_reg(sc, GMAC_MACADDRESS0, (laddr[4] << 8) | laddr[5]);
    634 	gmac_write_reg(sc, GMAC_MACADDRESS1, (laddr[2] << 8) | laddr[3]);
    635 	gmac_write_reg(sc, GMAC_MACADDRESS2, (laddr[0] << 8) | laddr[1]);
    636 	gmac_write_reg(sc, GMAC_MACADDRESS3, 0);
    637 	gmac_write_reg(sc, GMAC_MACADDRESS4, 0);
    638 	gmac_write_reg(sc, GMAC_MACADDRESS5, 0);
    639 	gmac_write_reg(sc, GMAC_MACADDRESS6, 1);
    640 	gmac_write_reg(sc, GMAC_MACADDRESS7, 0xc200);
    641 	gmac_write_reg(sc, GMAC_MACADDRESS8, 0x0180);
    642 	gmac_write_reg(sc, GMAC_MACADDRFILT0, 0);
    643 	gmac_write_reg(sc, GMAC_MACADDRFILT1, 0);
    644 	gmac_write_reg(sc, GMAC_MACADDRFILT2, 0);
    645 	gmac_write_reg(sc, GMAC_MACADDRFILT2_1MASK, 0);
    646 	gmac_write_reg(sc, GMAC_MACADDRFILT0MASK, 0);
    647 
    648 	for (i = 0; i < 0x6c; i += 4)
    649 		gmac_write_reg(sc, GMAC_HASHTABLE0 + i, 0);
    650 
    651 	gmac_write_reg(sc, GMAC_SLOTTIME, 0x40);
    652 
    653 	if (IFM_OPTIONS(sc->sc_mii.mii_media_active) & IFM_FDX) {
    654 		gmac_write_reg(sc, GMAC_TXMACCONFIG, 6);
    655 		gmac_write_reg(sc, GMAC_XIFCONFIG, 1);
    656 	} else {
    657 		gmac_write_reg(sc, GMAC_TXMACCONFIG, 0);
    658 		gmac_write_reg(sc, GMAC_XIFCONFIG, 5);
    659 	}
    660 
    661 	if (0)	/* g-bit? */
    662 		gmac_write_reg(sc, GMAC_MACCTRLCONFIG, 3);
    663 	else
    664 		gmac_write_reg(sc, GMAC_MACCTRLCONFIG, 0);
    665 }
    666 
    667 void
    668 gmac_setladrf(sc)
    669 	struct gmac_softc *sc;
    670 {
    671 	struct ifnet *ifp = &sc->sc_if;
    672 	struct ether_multi *enm;
    673 	struct ether_multistep step;
    674 	struct ethercom *ec = &sc->sc_ethercom;
    675 	u_int32_t crc;
    676 	u_int32_t hash[16];
    677 	u_int v;
    678 	int i;
    679 
    680 	/* Clear hash table */
    681 	for (i = 0; i < 16; i++)
    682 		hash[i] = 0;
    683 
    684 	/* Get current RX configuration */
    685 	v = gmac_read_reg(sc, GMAC_RXMACCONFIG);
    686 
    687 	if ((ifp->if_flags & IFF_PROMISC) != 0) {
    688 		/* Turn on promiscuous mode; turn off the hash filter */
    689 		v |= GMAC_RXMAC_PR;
    690 		v &= ~GMAC_RXMAC_HEN;
    691 		ifp->if_flags |= IFF_ALLMULTI;
    692 		goto chipit;
    693 	}
    694 
    695 	/* Turn off promiscuous mode; turn on the hash filter */
    696 	v &= ~GMAC_RXMAC_PR;
    697 	v |= GMAC_RXMAC_HEN;
    698 
    699 	/*
    700 	 * Set up multicast address filter by passing all multicast addresses
    701 	 * through a crc generator, and then using the high order 8 bits as an
    702 	 * index into the 256 bit logical address filter.  The high order bit
    703 	 * selects the word, while the rest of the bits select the bit within
    704 	 * the word.
    705 	 */
    706 
    707 	ETHER_FIRST_MULTI(step, ec, enm);
    708 	while (enm != NULL) {
    709 		if (bcmp(enm->enm_addrlo, enm->enm_addrhi, 6)) {
    710 			/*
    711 			 * We must listen to a range of multicast addresses.
    712 			 * For now, just accept all multicasts, rather than
    713 			 * trying to set only those filter bits needed to match
    714 			 * the range.  (At this time, the only use of address
    715 			 * ranges is for IP multicast routing, for which the
    716 			 * range is big enough to require all bits set.)
    717 			 */
    718 			for (i = 0; i < 16; i++)
    719 				hash[i] = 0xffff;
    720 			ifp->if_flags |= IFF_ALLMULTI;
    721 			goto chipit;
    722 		}
    723 
    724 		crc = ether_crc32_le(enm->enm_addrlo, ETHER_ADDR_LEN);
    725 
    726 		/* Just want the 8 most significant bits. */
    727 		crc >>= 24;
    728 
    729 		/* Set the corresponding bit in the filter. */
    730 		hash[crc >> 4] |= 1 << (crc & 0xf);
    731 
    732 		ETHER_NEXT_MULTI(step, enm);
    733 	}
    734 
    735 	ifp->if_flags &= ~IFF_ALLMULTI;
    736 
    737 chipit:
    738 	/* Now load the hash table into the chip */
    739 	for (i = 0; i < 16; i++)
    740 		gmac_write_reg(sc, GMAC_HASHTABLE0 + i * 4, hash[i]);
    741 
    742 	gmac_write_reg(sc, GMAC_RXMACCONFIG, v);
    743 }
    744 
    745 void
    746 gmac_init(sc)
    747 	struct gmac_softc *sc;
    748 {
    749 	struct ifnet *ifp = &sc->sc_if;
    750 
    751 	gmac_stop_txdma(sc);
    752 	gmac_stop_rxdma(sc);
    753 
    754 	gmac_init_mac(sc);
    755 	gmac_setladrf(sc);
    756 
    757 	gmac_start_txdma(sc);
    758 	gmac_start_rxdma(sc);
    759 
    760 	gmac_write_reg(sc, GMAC_INTMASK, ~(GMAC_INT_TXEMPTY | GMAC_INT_RXDONE));
    761 
    762 	ifp->if_flags |= IFF_RUNNING;
    763 	ifp->if_flags &= ~IFF_OACTIVE;
    764 	ifp->if_timer = 0;
    765 
    766 	callout_reset(&sc->sc_tick_ch, 1, gmac_mii_tick, sc);
    767 
    768 	gmac_start(ifp);
    769 }
    770 
    771 int
    772 gmac_ioctl(ifp, cmd, data)
    773 	struct ifnet *ifp;
    774 	u_long cmd;
    775 	caddr_t data;
    776 {
    777 	struct gmac_softc *sc = ifp->if_softc;
    778 	struct ifaddr *ifa = (struct ifaddr *)data;
    779 	struct ifreq *ifr = (struct ifreq *)data;
    780 	int s, error = 0;
    781 
    782 	s = splnet();
    783 
    784 	switch (cmd) {
    785 
    786 	case SIOCSIFADDR:
    787 		ifp->if_flags |= IFF_UP;
    788 
    789 		switch (ifa->ifa_addr->sa_family) {
    790 #ifdef INET
    791 		case AF_INET:
    792 			gmac_init(sc);
    793 			arp_ifinit(ifp, ifa);
    794 			break;
    795 #endif
    796 #ifdef NS
    797 		case AF_NS:
    798 		    {
    799 			struct ns_addr *ina = &IA_SNS(ifa)->sns_addr;
    800 
    801 			if (ns_nullhost(*ina))
    802 				ina->x_host =
    803 				    *(union ns_host *)LLADDR(ifp->if_sadl);
    804 			else {
    805 				bcopy(ina->x_host.c_host,
    806 				    LLADDR(ifp->if_sadl),
    807 				    sizeof(sc->sc_enaddr));
    808 			}
    809 			/* Set new address. */
    810 			gmac_init(sc);
    811 			break;
    812 		    }
    813 #endif
    814 		default:
    815 			gmac_init(sc);
    816 			break;
    817 		}
    818 		break;
    819 
    820 	case SIOCSIFFLAGS:
    821 		if ((ifp->if_flags & IFF_UP) == 0 &&
    822 		    (ifp->if_flags & IFF_RUNNING) != 0) {
    823 			/*
    824 			 * If interface is marked down and it is running, then
    825 			 * stop it.
    826 			 */
    827 			gmac_stop(sc);
    828 			ifp->if_flags &= ~IFF_RUNNING;
    829 		} else if ((ifp->if_flags & IFF_UP) != 0 &&
    830 		    (ifp->if_flags & IFF_RUNNING) == 0) {
    831 			/*
    832 			 * If interface is marked up and it is stopped, then
    833 			 * start it.
    834 			 */
    835 			gmac_init(sc);
    836 		} else {
    837 			/*
    838 			 * Reset the interface to pick up changes in any other
    839 			 * flags that affect hardware registers.
    840 			 */
    841 			gmac_reset(sc);
    842 			gmac_init(sc);
    843 		}
    844 #ifdef GMAC_DEBUG
    845 		if (ifp->if_flags & IFF_DEBUG)
    846 			sc->sc_flags |= GMAC_DEBUGFLAG;
    847 #endif
    848 		break;
    849 
    850 	case SIOCADDMULTI:
    851 	case SIOCDELMULTI:
    852 		error = (cmd == SIOCADDMULTI) ?
    853 		    ether_addmulti(ifr, &sc->sc_ethercom) :
    854 		    ether_delmulti(ifr, &sc->sc_ethercom);
    855 
    856 		if (error == ENETRESET) {
    857 			/*
    858 			 * Multicast list has changed; set the hardware filter
    859 			 * accordingly.
    860 			 */
    861 			gmac_init(sc);
    862 			/* gmac_setladrf(sc); */
    863 			error = 0;
    864 		}
    865 		break;
    866 
    867 	case SIOCGIFMEDIA:
    868 	case SIOCSIFMEDIA:
    869 		error = ifmedia_ioctl(ifp, ifr, &sc->sc_mii.mii_media, cmd);
    870 		break;
    871 
    872 	default:
    873 		error = EINVAL;
    874 	}
    875 
    876 	splx(s);
    877 	return error;
    878 }
    879 
    880 void
    881 gmac_watchdog(ifp)
    882 	struct ifnet *ifp;
    883 {
    884 	struct gmac_softc *sc = ifp->if_softc;
    885 
    886 	printf("%s: device timeout\n", ifp->if_xname);
    887 	ifp->if_oerrors++;
    888 
    889 	gmac_reset(sc);
    890 	gmac_init(sc);
    891 }
    892 
    893 int
    894 gmac_mediachange(ifp)
    895 	struct ifnet *ifp;
    896 {
    897 	struct gmac_softc *sc = ifp->if_softc;
    898 
    899 	return mii_mediachg(&sc->sc_mii);
    900 }
    901 
    902 void
    903 gmac_mediastatus(ifp, ifmr)
    904 	struct ifnet *ifp;
    905 	struct ifmediareq *ifmr;
    906 {
    907 	struct gmac_softc *sc = ifp->if_softc;
    908 
    909 	mii_pollstat(&sc->sc_mii);
    910 
    911 	ifmr->ifm_status = sc->sc_mii.mii_media_status;
    912 	ifmr->ifm_active = sc->sc_mii.mii_media_active;
    913 }
    914 
    915 int
    916 gmac_mii_readreg(dev, phy, reg)
    917 	struct device *dev;
    918 	int phy, reg;
    919 {
    920 	struct gmac_softc *sc = (void *)dev;
    921 	int i;
    922 
    923 	gmac_write_reg(sc, GMAC_MIFFRAMEOUTPUT,
    924 		0x60020000 | (phy << 23) | (reg << 18));
    925 
    926 	for (i = 1000; i >= 0; i -= 10) {
    927 		if (gmac_read_reg(sc, GMAC_MIFFRAMEOUTPUT) & 0x10000)
    928 			break;
    929 		delay(10);
    930 	}
    931 	if (i < 0) {
    932 		printf("%s: gmac_mii_readreg: timeout\n", sc->sc_dev.dv_xname);
    933 		return 0;
    934 	}
    935 
    936 	return gmac_read_reg(sc, GMAC_MIFFRAMEOUTPUT) & 0xffff;
    937 }
    938 
    939 void
    940 gmac_mii_writereg(dev, phy, reg, val)
    941 	struct device *dev;
    942 	int phy, reg, val;
    943 {
    944 	struct gmac_softc *sc = (void *)dev;
    945 	int i;
    946 
    947 	gmac_write_reg(sc, GMAC_MIFFRAMEOUTPUT,
    948 		0x50020000 | (phy << 23) | (reg << 18) | (val & 0xffff));
    949 
    950 	for (i = 1000; i >= 0; i -= 10) {
    951 		if (gmac_read_reg(sc, GMAC_MIFFRAMEOUTPUT) & 0x10000)
    952 			break;
    953 		delay(10);
    954 	}
    955 	if (i < 0)
    956 		printf("%s: gmac_mii_writereg: timeout\n", sc->sc_dev.dv_xname);
    957 }
    958 
    959 void
    960 gmac_mii_statchg(dev)
    961 	struct device *dev;
    962 {
    963 	struct gmac_softc *sc = (void *)dev;
    964 
    965 	gmac_stop_txdma(sc);
    966 	gmac_stop_rxdma(sc);
    967 
    968 	if (IFM_OPTIONS(sc->sc_mii.mii_media_active) & IFM_FDX) {
    969 		gmac_write_reg(sc, GMAC_TXMACCONFIG, 6);
    970 		gmac_write_reg(sc, GMAC_XIFCONFIG, 1);
    971 	} else {
    972 		gmac_write_reg(sc, GMAC_TXMACCONFIG, 0);
    973 		gmac_write_reg(sc, GMAC_XIFCONFIG, 5);
    974 	}
    975 
    976 	if (0)	/* g-bit? */
    977 		gmac_write_reg(sc, GMAC_MACCTRLCONFIG, 3);
    978 	else
    979 		gmac_write_reg(sc, GMAC_MACCTRLCONFIG, 0);
    980 
    981 	gmac_start_txdma(sc);
    982 	gmac_start_rxdma(sc);
    983 }
    984 
    985 void
    986 gmac_mii_tick(v)
    987 	void *v;
    988 {
    989 	struct gmac_softc *sc = v;
    990 	int s;
    991 
    992 	s = splnet();
    993 	mii_tick(&sc->sc_mii);
    994 	splx(s);
    995 
    996 	callout_reset(&sc->sc_tick_ch, hz, gmac_mii_tick, sc);
    997 }
    998