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kauai.c revision 1.1.4.4
      1  1.1.4.4     skrll /*	$NetBSD: kauai.c,v 1.1.4.4 2004/09/21 13:18:19 skrll Exp $	*/
      2      1.1  hamajima 
      3      1.1  hamajima /*-
      4      1.1  hamajima  * Copyright (c) 2003 Tsubai Masanari.  All rights reserved.
      5      1.1  hamajima  *
      6      1.1  hamajima  * Redistribution and use in source and binary forms, with or without
      7      1.1  hamajima  * modification, are permitted provided that the following conditions
      8      1.1  hamajima  * are met:
      9      1.1  hamajima  * 1. Redistributions of source code must retain the above copyright
     10      1.1  hamajima  *    notice, this list of conditions and the following disclaimer.
     11      1.1  hamajima  * 2. Redistributions in binary form must reproduce the above copyright
     12      1.1  hamajima  *    notice, this list of conditions and the following disclaimer in the
     13      1.1  hamajima  *    documentation and/or other materials provided with the distribution.
     14      1.1  hamajima  * 3. The name of the author may not be used to endorse or promote products
     15      1.1  hamajima  *    derived from this software without specific prior written permission.
     16      1.1  hamajima  *
     17      1.1  hamajima  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
     18      1.1  hamajima  * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
     19      1.1  hamajima  * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
     20      1.1  hamajima  * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
     21      1.1  hamajima  * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
     22      1.1  hamajima  * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
     23      1.1  hamajima  * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
     24      1.1  hamajima  * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
     25      1.1  hamajima  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
     26      1.1  hamajima  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
     27      1.1  hamajima  */
     28      1.1  hamajima 
     29  1.1.4.1     skrll #include <sys/cdefs.h>
     30  1.1.4.4     skrll __KERNEL_RCSID(0, "$NetBSD: kauai.c,v 1.1.4.4 2004/09/21 13:18:19 skrll Exp $");
     31  1.1.4.1     skrll 
     32      1.1  hamajima #include <sys/param.h>
     33      1.1  hamajima #include <sys/systm.h>
     34      1.1  hamajima #include <sys/device.h>
     35      1.1  hamajima #include <sys/malloc.h>
     36      1.1  hamajima 
     37      1.1  hamajima #include <uvm/uvm_extern.h>
     38      1.1  hamajima 
     39      1.1  hamajima #include <machine/bus.h>
     40      1.1  hamajima 
     41      1.1  hamajima #include <dev/ata/atareg.h>
     42      1.1  hamajima #include <dev/ata/atavar.h>
     43      1.1  hamajima #include <dev/ic/wdcvar.h>
     44      1.1  hamajima 
     45      1.1  hamajima #include <dev/ofw/openfirm.h>
     46      1.1  hamajima 
     47      1.1  hamajima #include <dev/pci/pcivar.h>
     48      1.1  hamajima #include <dev/pci/pcireg.h>
     49      1.1  hamajima #include <dev/pci/pcidevs.h>
     50      1.1  hamajima 
     51      1.1  hamajima #include <macppc/dev/dbdma.h>
     52      1.1  hamajima 
     53      1.1  hamajima #define WDC_REG_NPORTS		8
     54      1.1  hamajima #define WDC_AUXREG_OFFSET	0x16
     55      1.1  hamajima 
     56      1.1  hamajima #define PIO_CONFIG_REG (0x200 >> 4)	/* PIO and DMA access timing */
     57      1.1  hamajima #define DMA_CONFIG_REG (0x210 >> 4)	/* UDMA access timing */
     58      1.1  hamajima 
     59      1.1  hamajima struct kauai_softc {
     60      1.1  hamajima 	struct wdc_softc sc_wdcdev;
     61  1.1.4.2     skrll 	struct ata_channel *sc_chanptr;
     62  1.1.4.2     skrll 	struct ata_channel sc_channel;
     63  1.1.4.2     skrll 	struct wdc_regs sc_wdc_regs;
     64  1.1.4.2     skrll 	struct ata_queue sc_queue;
     65      1.1  hamajima 	dbdma_regmap_t *sc_dmareg;
     66      1.1  hamajima 	dbdma_command_t	*sc_dmacmd;
     67      1.1  hamajima 	u_int sc_piotiming_r[2];
     68      1.1  hamajima 	u_int sc_piotiming_w[2];
     69      1.1  hamajima 	u_int sc_dmatiming_r[2];
     70      1.1  hamajima 	u_int sc_dmatiming_w[2];
     71      1.1  hamajima 	void (*sc_calc_timing)(struct kauai_softc *, int);
     72      1.1  hamajima };
     73      1.1  hamajima 
     74      1.1  hamajima int kauai_match __P((struct device *, struct cfdata *, void *));
     75      1.1  hamajima void kauai_attach __P((struct device *, struct device *, void *));
     76      1.1  hamajima int kauai_dma_init __P((void *, int, int, void *, size_t, int));
     77      1.1  hamajima void kauai_dma_start __P((void *, int, int));
     78      1.1  hamajima int kauai_dma_finish __P((void *, int, int, int));
     79  1.1.4.2     skrll void kauai_set_modes __P((struct ata_channel *));
     80      1.1  hamajima static void calc_timing_kauai __P((struct kauai_softc *, int));
     81      1.1  hamajima static int getnodebypci(pci_chipset_tag_t, pcitag_t);
     82      1.1  hamajima 
     83      1.1  hamajima CFATTACH_DECL(kauai, sizeof(struct kauai_softc),
     84      1.1  hamajima     kauai_match, kauai_attach, NULL, wdcactivate);
     85      1.1  hamajima 
     86      1.1  hamajima int
     87      1.1  hamajima kauai_match(parent, match, aux)
     88      1.1  hamajima 	struct device *parent;
     89      1.1  hamajima 	struct cfdata *match;
     90      1.1  hamajima 	void *aux;
     91      1.1  hamajima {
     92      1.1  hamajima 	struct pci_attach_args *pa = aux;
     93      1.1  hamajima 
     94      1.1  hamajima 	if (PCI_VENDOR(pa->pa_id) == PCI_VENDOR_APPLE &&
     95  1.1.4.1     skrll 	    (PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_APPLE_KAUAI ||
     96  1.1.4.1     skrll 	     PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_APPLE_UNINORTH_ATA))
     97      1.1  hamajima 		return 5;
     98      1.1  hamajima 
     99      1.1  hamajima 	return 0;
    100      1.1  hamajima }
    101      1.1  hamajima 
    102      1.1  hamajima void
    103      1.1  hamajima kauai_attach(parent, self, aux)
    104      1.1  hamajima 	struct device *parent, *self;
    105      1.1  hamajima 	void *aux;
    106      1.1  hamajima {
    107      1.1  hamajima 	struct kauai_softc *sc = (void *)self;
    108      1.1  hamajima 	struct pci_attach_args *pa = aux;
    109  1.1.4.2     skrll 	struct ata_channel *chp = &sc->sc_channel;
    110  1.1.4.2     skrll 	struct wdc_regs *wdr;
    111      1.1  hamajima 	pci_intr_handle_t ih;
    112      1.1  hamajima 	paddr_t regbase, dmabase;
    113  1.1.4.1     skrll 	int node, reg[5], i;
    114      1.1  hamajima 
    115      1.1  hamajima #ifdef DIAGNOSTIC
    116      1.1  hamajima 	if ((vaddr_t)sc->sc_dmacmd & 0x0f) {
    117      1.1  hamajima 		printf(": bad dbdma alignment\n");
    118      1.1  hamajima 		return;
    119      1.1  hamajima 	}
    120      1.1  hamajima #endif
    121      1.1  hamajima 
    122      1.1  hamajima 	node = getnodebypci(pa->pa_pc, pa->pa_tag);
    123      1.1  hamajima 	if (node == 0) {
    124      1.1  hamajima 		printf(": cannot find gmac node\n");
    125      1.1  hamajima 		return;
    126      1.1  hamajima 	}
    127      1.1  hamajima 
    128      1.1  hamajima 	if (OF_getprop(node, "assigned-addresses", reg, sizeof reg) < 12) {
    129      1.1  hamajima 		printf(": cannot get address property\n");
    130      1.1  hamajima 		return;
    131      1.1  hamajima 	}
    132      1.1  hamajima 	regbase = reg[2] + 0x2000;
    133      1.1  hamajima 	dmabase = reg[2] + 0x1000;
    134      1.1  hamajima 
    135      1.1  hamajima 	/*
    136      1.1  hamajima 	 * XXX PCI_INTERRUPT_REG seems to be wired to 0.
    137      1.1  hamajima 	 * XXX So use fixed intrpin and intrline values.
    138      1.1  hamajima 	 */
    139      1.1  hamajima 	if (pci_conf_read(pa->pa_pc, pa->pa_tag, PCI_INTERRUPT_REG) == 0) {
    140      1.1  hamajima 		pa->pa_intrpin = 1;
    141      1.1  hamajima 		pa->pa_intrline = 39;
    142      1.1  hamajima 	}
    143      1.1  hamajima 
    144      1.1  hamajima 	if (pci_intr_map(pa, &ih)) {
    145      1.1  hamajima 		printf(": unable to map interrupt\n");
    146      1.1  hamajima 		return;
    147      1.1  hamajima 	}
    148      1.1  hamajima 	printf(": interrupting at %s\n", pci_intr_string(pa->pa_pc, ih));
    149      1.1  hamajima 
    150  1.1.4.2     skrll 	sc->sc_wdcdev.regs = wdr = &sc->sc_wdc_regs;
    151      1.1  hamajima 
    152  1.1.4.2     skrll 	wdr->cmd_iot = wdr->ctl_iot = macppc_make_bus_space_tag(regbase, 4);
    153  1.1.4.2     skrll 
    154  1.1.4.2     skrll 	if (bus_space_map(wdr->cmd_iot, 0, WDC_REG_NPORTS, 0,
    155  1.1.4.2     skrll 	    &wdr->cmd_baseioh) ||
    156  1.1.4.2     skrll 	    bus_space_subregion(wdr->cmd_iot, wdr->cmd_baseioh,
    157  1.1.4.2     skrll 			WDC_AUXREG_OFFSET, 1, &wdr->ctl_ioh)) {
    158      1.1  hamajima 		printf("%s: couldn't map registers\n", self->dv_xname);
    159      1.1  hamajima 		return;
    160      1.1  hamajima 	}
    161  1.1.4.1     skrll 	for (i = 0; i < WDC_NREG; i++) {
    162  1.1.4.2     skrll 		if (bus_space_subregion(wdr->cmd_iot, wdr->cmd_baseioh, i,
    163  1.1.4.2     skrll 		    i == 0 ? 4 : 1, &wdr->cmd_iohs[i]) != 0) {
    164  1.1.4.2     skrll 			bus_space_unmap(wdr->cmd_iot, wdr->cmd_baseioh,
    165  1.1.4.1     skrll 			    WDC_REG_NPORTS);
    166  1.1.4.1     skrll 			printf("%s: couldn't subregion registers\n",
    167  1.1.4.2     skrll 			    sc->sc_wdcdev.sc_atac.atac_dev.dv_xname);
    168  1.1.4.1     skrll 			return;
    169  1.1.4.1     skrll 		}
    170  1.1.4.1     skrll 	}
    171  1.1.4.1     skrll 	wdc_init_shadow_regs(chp);
    172      1.1  hamajima 
    173      1.1  hamajima 	if (pci_intr_establish(pa->pa_pc, ih, IPL_BIO, wdcintr, chp) == NULL) {
    174      1.1  hamajima 		printf("%s: unable to establish interrupt\n", self->dv_xname);
    175      1.1  hamajima 		return;
    176      1.1  hamajima 	}
    177      1.1  hamajima 
    178      1.1  hamajima 
    179  1.1.4.2     skrll 	sc->sc_wdcdev.sc_atac.atac_pio_cap = 4;
    180  1.1.4.2     skrll 	sc->sc_wdcdev.sc_atac.atac_dma_cap = 2;
    181  1.1.4.2     skrll 	sc->sc_wdcdev.sc_atac.atac_udma_cap = 5;
    182  1.1.4.2     skrll 	sc->sc_wdcdev.sc_atac.atac_cap |= ATAC_CAP_DATA16;
    183  1.1.4.2     skrll 	sc->sc_wdcdev.sc_atac.atac_cap |= ATAC_CAP_DMA | ATAC_CAP_UDMA;
    184  1.1.4.2     skrll 	sc->sc_chanptr = chp;
    185  1.1.4.2     skrll 	sc->sc_wdcdev.sc_atac.atac_channels = &sc->sc_chanptr;
    186  1.1.4.2     skrll 	sc->sc_wdcdev.sc_atac.atac_nchannels = 1;
    187      1.1  hamajima 	sc->sc_wdcdev.dma_arg = sc;
    188      1.1  hamajima 	sc->sc_wdcdev.dma_init = kauai_dma_init;
    189      1.1  hamajima 	sc->sc_wdcdev.dma_start = kauai_dma_start;
    190      1.1  hamajima 	sc->sc_wdcdev.dma_finish = kauai_dma_finish;
    191  1.1.4.2     skrll 	sc->sc_wdcdev.sc_atac.atac_set_modes = kauai_set_modes;
    192      1.1  hamajima 	sc->sc_calc_timing = calc_timing_kauai;
    193      1.1  hamajima 	sc->sc_dmareg = (void *)dmabase;
    194      1.1  hamajima 
    195  1.1.4.1     skrll 	chp->ch_channel = 0;
    196  1.1.4.2     skrll 	chp->ch_atac = &sc->sc_wdcdev.sc_atac;
    197  1.1.4.2     skrll 	chp->ch_queue = &sc->sc_queue;
    198      1.1  hamajima 
    199      1.1  hamajima 	wdcattach(chp);
    200      1.1  hamajima }
    201      1.1  hamajima 
    202      1.1  hamajima void
    203      1.1  hamajima kauai_set_modes(chp)
    204  1.1.4.2     skrll 	struct ata_channel *chp;
    205      1.1  hamajima {
    206  1.1.4.2     skrll 	struct kauai_softc *sc = (void *)chp->ch_atac;
    207  1.1.4.2     skrll 	struct wdc_regs *wdr = CHAN_TO_WDC_REGS(chp);
    208      1.1  hamajima 	struct ata_drive_datas *drvp0 = &chp->ch_drive[0];
    209      1.1  hamajima 	struct ata_drive_datas *drvp1 = &chp->ch_drive[1];
    210      1.1  hamajima 	struct ata_drive_datas *drvp;
    211      1.1  hamajima 	int drive;
    212      1.1  hamajima 
    213      1.1  hamajima 	if ((drvp0->drive_flags & DRIVE) && (drvp1->drive_flags & DRIVE)) {
    214      1.1  hamajima 		drvp0->PIO_mode = drvp1->PIO_mode =
    215      1.1  hamajima 		    min(drvp0->PIO_mode, drvp1->PIO_mode);
    216      1.1  hamajima 	}
    217      1.1  hamajima 
    218      1.1  hamajima 	for (drive = 0; drive < 2; drive++) {
    219      1.1  hamajima 		drvp = &chp->ch_drive[drive];
    220      1.1  hamajima 		if (drvp->drive_flags & DRIVE) {
    221      1.1  hamajima 			(*sc->sc_calc_timing)(sc, drive);
    222  1.1.4.2     skrll 			bus_space_write_4(wdr->cmd_iot, wdr->cmd_baseioh,
    223      1.1  hamajima 			    PIO_CONFIG_REG, sc->sc_piotiming_r[drive]);
    224  1.1.4.2     skrll 			bus_space_write_4(wdr->cmd_iot, wdr->cmd_baseioh,
    225      1.1  hamajima 			    DMA_CONFIG_REG, sc->sc_dmatiming_r[drive]);
    226      1.1  hamajima 		}
    227      1.1  hamajima 	}
    228      1.1  hamajima }
    229      1.1  hamajima 
    230      1.1  hamajima /*
    231      1.1  hamajima  * IDE transfer timings
    232      1.1  hamajima  */
    233      1.1  hamajima static const u_int pio_timing_kauai[] = {	/* 0xff000fff */
    234      1.1  hamajima 	0x08000a92,	/* Mode 0 */
    235      1.1  hamajima 	0x0800060f,	/*      1 */
    236      1.1  hamajima 	0x0800038b,	/*      2 */
    237      1.1  hamajima 	0x05000249,	/*      3 */
    238      1.1  hamajima 	0x04000148	/*      4 */
    239      1.1  hamajima };
    240      1.1  hamajima static const u_int dma_timing_kauai[] = {	/* 0x00fff000 */
    241      1.1  hamajima 	0x00618000,	/* Mode 0 */
    242      1.1  hamajima 	0x00209000,	/*      1 */
    243      1.1  hamajima 	0x00148000	/*      2 */
    244      1.1  hamajima };
    245      1.1  hamajima static const u_int udma_timing_kauai[] = {	/* 0x0000ffff */
    246      1.1  hamajima 	0x000070c0,	/* Mode 0 */
    247      1.1  hamajima 	0x00005d80,	/*      1 */
    248      1.1  hamajima 	0x00004a60,	/*      2 */
    249      1.1  hamajima 	0x00003a50,	/*      3 */
    250      1.1  hamajima 	0x00002a30,	/*      4 */
    251      1.1  hamajima 	0x00002921	/*      5 */
    252      1.1  hamajima };
    253      1.1  hamajima 
    254      1.1  hamajima /*
    255      1.1  hamajima  * Timing calculation for Kauai.
    256      1.1  hamajima  */
    257      1.1  hamajima void
    258      1.1  hamajima calc_timing_kauai(sc, drive)
    259      1.1  hamajima 	struct kauai_softc *sc;
    260      1.1  hamajima 	int drive;
    261      1.1  hamajima {
    262  1.1.4.2     skrll 	struct ata_channel *chp = &sc->sc_channel;
    263      1.1  hamajima 	struct ata_drive_datas *drvp = &chp->ch_drive[drive];
    264      1.1  hamajima 	int piomode = drvp->PIO_mode;
    265      1.1  hamajima 	int dmamode = drvp->DMA_mode;
    266      1.1  hamajima 	int udmamode = drvp->UDMA_mode;
    267      1.1  hamajima 	u_int pioconf, dmaconf;
    268      1.1  hamajima 
    269      1.1  hamajima 	pioconf = pio_timing_kauai[piomode];
    270      1.1  hamajima 
    271      1.1  hamajima 	dmaconf = 0;
    272      1.1  hamajima 	if (drvp->drive_flags & DRIVE_DMA)
    273      1.1  hamajima 		dmaconf |= dma_timing_kauai[dmamode];
    274      1.1  hamajima 	if (drvp->drive_flags & DRIVE_UDMA)
    275      1.1  hamajima 		dmaconf |= udma_timing_kauai[udmamode];
    276      1.1  hamajima 
    277      1.1  hamajima 	if (drvp->drive_flags & DRIVE_UDMA)
    278      1.1  hamajima 		dmaconf |= 1;
    279      1.1  hamajima 
    280      1.1  hamajima 	sc->sc_piotiming_r[drive] = sc->sc_piotiming_w[drive] = pioconf;
    281      1.1  hamajima 	sc->sc_dmatiming_r[drive] = sc->sc_dmatiming_w[drive] = dmaconf;
    282      1.1  hamajima }
    283      1.1  hamajima 
    284      1.1  hamajima int
    285      1.1  hamajima kauai_dma_init(v, channel, drive, databuf, datalen, flags)
    286      1.1  hamajima 	void *v;
    287      1.1  hamajima 	void *databuf;
    288      1.1  hamajima 	size_t datalen;
    289      1.1  hamajima 	int flags;
    290      1.1  hamajima {
    291      1.1  hamajima 	struct kauai_softc *sc = v;
    292      1.1  hamajima 	dbdma_command_t *cmdp = sc->sc_dmacmd;
    293  1.1.4.2     skrll 	struct ata_channel *chp = &sc->sc_channel;
    294  1.1.4.2     skrll 	struct wdc_regs *wdr = CHAN_TO_WDC_REGS(chp);
    295      1.1  hamajima 	vaddr_t va = (vaddr_t)databuf;
    296      1.1  hamajima 	int read = flags & WDC_DMA_READ;
    297      1.1  hamajima 	int cmd = read ? DBDMA_CMD_IN_MORE : DBDMA_CMD_OUT_MORE;
    298      1.1  hamajima 	u_int offset;
    299      1.1  hamajima 
    300  1.1.4.2     skrll 	bus_space_write_4(wdr->cmd_iot, wdr->cmd_baseioh, DMA_CONFIG_REG,
    301      1.1  hamajima 	    read ? sc->sc_dmatiming_r[drive] : sc->sc_dmatiming_w[drive]);
    302  1.1.4.2     skrll 	bus_space_read_4(wdr->cmd_iot, wdr->cmd_baseioh, DMA_CONFIG_REG);
    303      1.1  hamajima 
    304      1.1  hamajima 	offset = va & PGOFSET;
    305      1.1  hamajima 
    306      1.1  hamajima 	/* if va is not page-aligned, setup the first page */
    307      1.1  hamajima 	if (offset != 0) {
    308      1.1  hamajima 		int rest = PAGE_SIZE - offset;	/* the rest of the page */
    309      1.1  hamajima 
    310      1.1  hamajima 		if (datalen > rest) {		/* if continues to next page */
    311      1.1  hamajima 			DBDMA_BUILD(cmdp, cmd, 0, rest, vtophys(va),
    312      1.1  hamajima 				DBDMA_INT_NEVER, DBDMA_WAIT_NEVER,
    313      1.1  hamajima 				DBDMA_BRANCH_NEVER);
    314      1.1  hamajima 			datalen -= rest;
    315      1.1  hamajima 			va += rest;
    316      1.1  hamajima 			cmdp++;
    317      1.1  hamajima 		}
    318      1.1  hamajima 	}
    319      1.1  hamajima 
    320      1.1  hamajima 	/* now va is page-aligned */
    321      1.1  hamajima 	while (datalen > PAGE_SIZE) {
    322      1.1  hamajima 		DBDMA_BUILD(cmdp, cmd, 0, PAGE_SIZE, vtophys(va),
    323      1.1  hamajima 			DBDMA_INT_NEVER, DBDMA_WAIT_NEVER, DBDMA_BRANCH_NEVER);
    324      1.1  hamajima 		datalen -= PAGE_SIZE;
    325      1.1  hamajima 		va += PAGE_SIZE;
    326      1.1  hamajima 		cmdp++;
    327      1.1  hamajima 	}
    328      1.1  hamajima 
    329      1.1  hamajima 	/* the last page (datalen <= PAGE_SIZE here) */
    330      1.1  hamajima 	cmd = read ? DBDMA_CMD_IN_LAST : DBDMA_CMD_OUT_LAST;
    331      1.1  hamajima 	DBDMA_BUILD(cmdp, cmd, 0, datalen, vtophys(va),
    332      1.1  hamajima 		DBDMA_INT_NEVER, DBDMA_WAIT_NEVER, DBDMA_BRANCH_NEVER);
    333      1.1  hamajima 	cmdp++;
    334      1.1  hamajima 
    335      1.1  hamajima 	DBDMA_BUILD(cmdp, DBDMA_CMD_STOP, 0, 0, 0,
    336      1.1  hamajima 		DBDMA_INT_NEVER, DBDMA_WAIT_NEVER, DBDMA_BRANCH_NEVER);
    337      1.1  hamajima 
    338      1.1  hamajima 	return 0;
    339      1.1  hamajima }
    340      1.1  hamajima 
    341      1.1  hamajima void
    342      1.1  hamajima kauai_dma_start(v, channel, drive)
    343      1.1  hamajima 	void *v;
    344      1.1  hamajima 	int channel, drive;
    345      1.1  hamajima {
    346      1.1  hamajima 	struct kauai_softc *sc = v;
    347      1.1  hamajima 
    348      1.1  hamajima 	dbdma_start(sc->sc_dmareg, sc->sc_dmacmd);
    349      1.1  hamajima }
    350      1.1  hamajima 
    351      1.1  hamajima int
    352      1.1  hamajima kauai_dma_finish(v, channel, drive, read)
    353      1.1  hamajima 	void *v;
    354      1.1  hamajima 	int channel, drive;
    355      1.1  hamajima 	int read;
    356      1.1  hamajima {
    357      1.1  hamajima 	struct kauai_softc *sc = v;
    358      1.1  hamajima 
    359      1.1  hamajima 	dbdma_stop(sc->sc_dmareg);
    360      1.1  hamajima 	return 0;
    361      1.1  hamajima }
    362      1.1  hamajima 
    363      1.1  hamajima /*
    364      1.1  hamajima  * Find OF-device corresponding to the PCI device.
    365      1.1  hamajima  */
    366      1.1  hamajima int
    367      1.1  hamajima getnodebypci(pc, tag)
    368      1.1  hamajima 	pci_chipset_tag_t pc;
    369      1.1  hamajima 	pcitag_t tag;
    370      1.1  hamajima {
    371      1.1  hamajima 	int bus, dev, func;
    372      1.1  hamajima 	u_int reg[5];
    373      1.1  hamajima 	int p, q;
    374      1.1  hamajima 	int l, b, d, f;
    375      1.1  hamajima 
    376      1.1  hamajima 	pci_decompose_tag(pc, tag, &bus, &dev, &func);
    377      1.1  hamajima 
    378      1.1  hamajima 	for (q = OF_peer(0); q; q = p) {
    379      1.1  hamajima 		l = OF_getprop(q, "assigned-addresses", reg, sizeof(reg));
    380      1.1  hamajima 		if (l > 4) {
    381      1.1  hamajima 			b = (reg[0] >> 16) & 0xff;
    382      1.1  hamajima 			d = (reg[0] >> 11) & 0x1f;
    383      1.1  hamajima 			f = (reg[0] >> 8) & 0x07;
    384      1.1  hamajima 
    385      1.1  hamajima 			if (b == bus && d == dev && f == func)
    386      1.1  hamajima 				return q;
    387      1.1  hamajima 		}
    388      1.1  hamajima 		if ((p = OF_child(q)))
    389      1.1  hamajima 			continue;
    390      1.1  hamajima 		while (q) {
    391      1.1  hamajima 			if ((p = OF_peer(q)))
    392      1.1  hamajima 				break;
    393      1.1  hamajima 			q = OF_parent(q);
    394      1.1  hamajima 		}
    395      1.1  hamajima 	}
    396      1.1  hamajima 	return 0;
    397      1.1  hamajima }
    398