kauai.c revision 1.2 1 1.2 lukem /* $NetBSD: kauai.c,v 1.2 2003/07/15 02:43:29 lukem Exp $ */
2 1.1 hamajima
3 1.1 hamajima /*-
4 1.1 hamajima * Copyright (c) 2003 Tsubai Masanari. All rights reserved.
5 1.1 hamajima *
6 1.1 hamajima * Redistribution and use in source and binary forms, with or without
7 1.1 hamajima * modification, are permitted provided that the following conditions
8 1.1 hamajima * are met:
9 1.1 hamajima * 1. Redistributions of source code must retain the above copyright
10 1.1 hamajima * notice, this list of conditions and the following disclaimer.
11 1.1 hamajima * 2. Redistributions in binary form must reproduce the above copyright
12 1.1 hamajima * notice, this list of conditions and the following disclaimer in the
13 1.1 hamajima * documentation and/or other materials provided with the distribution.
14 1.1 hamajima * 3. The name of the author may not be used to endorse or promote products
15 1.1 hamajima * derived from this software without specific prior written permission.
16 1.1 hamajima *
17 1.1 hamajima * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
18 1.1 hamajima * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
19 1.1 hamajima * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
20 1.1 hamajima * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
21 1.1 hamajima * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
22 1.1 hamajima * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23 1.1 hamajima * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24 1.1 hamajima * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25 1.1 hamajima * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
26 1.1 hamajima * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27 1.1 hamajima */
28 1.2 lukem
29 1.2 lukem #include <sys/cdefs.h>
30 1.2 lukem __KERNEL_RCSID(0, "$NetBSD: kauai.c,v 1.2 2003/07/15 02:43:29 lukem Exp $");
31 1.1 hamajima
32 1.1 hamajima #include <sys/param.h>
33 1.1 hamajima #include <sys/systm.h>
34 1.1 hamajima #include <sys/device.h>
35 1.1 hamajima #include <sys/malloc.h>
36 1.1 hamajima
37 1.1 hamajima #include <uvm/uvm_extern.h>
38 1.1 hamajima
39 1.1 hamajima #include <machine/bus.h>
40 1.1 hamajima
41 1.1 hamajima #include <dev/ata/atareg.h>
42 1.1 hamajima #include <dev/ata/atavar.h>
43 1.1 hamajima #include <dev/ic/wdcvar.h>
44 1.1 hamajima
45 1.1 hamajima #include <dev/ofw/openfirm.h>
46 1.1 hamajima
47 1.1 hamajima #include <dev/pci/pcivar.h>
48 1.1 hamajima #include <dev/pci/pcireg.h>
49 1.1 hamajima #include <dev/pci/pcidevs.h>
50 1.1 hamajima
51 1.1 hamajima #include <macppc/dev/dbdma.h>
52 1.1 hamajima
53 1.1 hamajima #define WDC_REG_NPORTS 8
54 1.1 hamajima #define WDC_AUXREG_OFFSET 0x16
55 1.1 hamajima
56 1.1 hamajima #define PIO_CONFIG_REG (0x200 >> 4) /* PIO and DMA access timing */
57 1.1 hamajima #define DMA_CONFIG_REG (0x210 >> 4) /* UDMA access timing */
58 1.1 hamajima
59 1.1 hamajima struct kauai_softc {
60 1.1 hamajima struct wdc_softc sc_wdcdev;
61 1.1 hamajima struct channel_softc *wdc_chanptr;
62 1.1 hamajima struct channel_softc wdc_channel;
63 1.1 hamajima struct channel_queue wdc_queue;
64 1.1 hamajima dbdma_regmap_t *sc_dmareg;
65 1.1 hamajima dbdma_command_t *sc_dmacmd;
66 1.1 hamajima u_int sc_piotiming_r[2];
67 1.1 hamajima u_int sc_piotiming_w[2];
68 1.1 hamajima u_int sc_dmatiming_r[2];
69 1.1 hamajima u_int sc_dmatiming_w[2];
70 1.1 hamajima void (*sc_calc_timing)(struct kauai_softc *, int);
71 1.1 hamajima };
72 1.1 hamajima
73 1.1 hamajima int kauai_match __P((struct device *, struct cfdata *, void *));
74 1.1 hamajima void kauai_attach __P((struct device *, struct device *, void *));
75 1.1 hamajima int kauai_dma_init __P((void *, int, int, void *, size_t, int));
76 1.1 hamajima void kauai_dma_start __P((void *, int, int));
77 1.1 hamajima int kauai_dma_finish __P((void *, int, int, int));
78 1.1 hamajima void kauai_set_modes __P((struct channel_softc *));
79 1.1 hamajima static void calc_timing_kauai __P((struct kauai_softc *, int));
80 1.1 hamajima static int getnodebypci(pci_chipset_tag_t, pcitag_t);
81 1.1 hamajima
82 1.1 hamajima CFATTACH_DECL(kauai, sizeof(struct kauai_softc),
83 1.1 hamajima kauai_match, kauai_attach, NULL, wdcactivate);
84 1.1 hamajima
85 1.1 hamajima int
86 1.1 hamajima kauai_match(parent, match, aux)
87 1.1 hamajima struct device *parent;
88 1.1 hamajima struct cfdata *match;
89 1.1 hamajima void *aux;
90 1.1 hamajima {
91 1.1 hamajima struct pci_attach_args *pa = aux;
92 1.1 hamajima
93 1.1 hamajima if (PCI_VENDOR(pa->pa_id) == PCI_VENDOR_APPLE &&
94 1.1 hamajima PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_APPLE_KAUAI)
95 1.1 hamajima return 5;
96 1.1 hamajima
97 1.1 hamajima return 0;
98 1.1 hamajima }
99 1.1 hamajima
100 1.1 hamajima void
101 1.1 hamajima kauai_attach(parent, self, aux)
102 1.1 hamajima struct device *parent, *self;
103 1.1 hamajima void *aux;
104 1.1 hamajima {
105 1.1 hamajima struct kauai_softc *sc = (void *)self;
106 1.1 hamajima struct pci_attach_args *pa = aux;
107 1.1 hamajima struct channel_softc *chp = &sc->wdc_channel;
108 1.1 hamajima pci_intr_handle_t ih;
109 1.1 hamajima paddr_t regbase, dmabase;
110 1.1 hamajima int node, reg[5];
111 1.1 hamajima
112 1.1 hamajima #ifdef DIAGNOSTIC
113 1.1 hamajima if ((vaddr_t)sc->sc_dmacmd & 0x0f) {
114 1.1 hamajima printf(": bad dbdma alignment\n");
115 1.1 hamajima return;
116 1.1 hamajima }
117 1.1 hamajima #endif
118 1.1 hamajima
119 1.1 hamajima node = getnodebypci(pa->pa_pc, pa->pa_tag);
120 1.1 hamajima if (node == 0) {
121 1.1 hamajima printf(": cannot find gmac node\n");
122 1.1 hamajima return;
123 1.1 hamajima }
124 1.1 hamajima
125 1.1 hamajima if (OF_getprop(node, "assigned-addresses", reg, sizeof reg) < 12) {
126 1.1 hamajima printf(": cannot get address property\n");
127 1.1 hamajima return;
128 1.1 hamajima }
129 1.1 hamajima regbase = reg[2] + 0x2000;
130 1.1 hamajima dmabase = reg[2] + 0x1000;
131 1.1 hamajima
132 1.1 hamajima /*
133 1.1 hamajima * XXX PCI_INTERRUPT_REG seems to be wired to 0.
134 1.1 hamajima * XXX So use fixed intrpin and intrline values.
135 1.1 hamajima */
136 1.1 hamajima if (pci_conf_read(pa->pa_pc, pa->pa_tag, PCI_INTERRUPT_REG) == 0) {
137 1.1 hamajima pa->pa_intrpin = 1;
138 1.1 hamajima pa->pa_intrline = 39;
139 1.1 hamajima }
140 1.1 hamajima
141 1.1 hamajima if (pci_intr_map(pa, &ih)) {
142 1.1 hamajima printf(": unable to map interrupt\n");
143 1.1 hamajima return;
144 1.1 hamajima }
145 1.1 hamajima printf(": interrupting at %s\n", pci_intr_string(pa->pa_pc, ih));
146 1.1 hamajima
147 1.1 hamajima chp->cmd_iot = chp->ctl_iot = macppc_make_bus_space_tag(regbase, 4);
148 1.1 hamajima
149 1.1 hamajima if (bus_space_map(chp->cmd_iot, 0, WDC_REG_NPORTS, 0, &chp->cmd_ioh) ||
150 1.1 hamajima bus_space_subregion(chp->cmd_iot, chp->cmd_ioh,
151 1.1 hamajima WDC_AUXREG_OFFSET, 1, &chp->ctl_ioh)) {
152 1.1 hamajima printf("%s: couldn't map registers\n", self->dv_xname);
153 1.1 hamajima return;
154 1.1 hamajima }
155 1.1 hamajima
156 1.1 hamajima if (pci_intr_establish(pa->pa_pc, ih, IPL_BIO, wdcintr, chp) == NULL) {
157 1.1 hamajima printf("%s: unable to establish interrupt\n", self->dv_xname);
158 1.1 hamajima return;
159 1.1 hamajima }
160 1.1 hamajima
161 1.1 hamajima
162 1.1 hamajima sc->sc_wdcdev.PIO_cap = 4;
163 1.1 hamajima sc->sc_wdcdev.DMA_cap = 2;
164 1.1 hamajima sc->sc_wdcdev.UDMA_cap = 5;
165 1.1 hamajima sc->sc_wdcdev.cap |= WDC_CAPABILITY_DATA16 | WDC_CAPABILITY_MODE;
166 1.1 hamajima sc->sc_wdcdev.cap |= WDC_CAPABILITY_DMA | WDC_CAPABILITY_UDMA;
167 1.1 hamajima sc->wdc_chanptr = chp;
168 1.1 hamajima sc->sc_wdcdev.channels = &sc->wdc_chanptr;
169 1.1 hamajima sc->sc_wdcdev.nchannels = 1;
170 1.1 hamajima sc->sc_wdcdev.dma_arg = sc;
171 1.1 hamajima sc->sc_wdcdev.dma_init = kauai_dma_init;
172 1.1 hamajima sc->sc_wdcdev.dma_start = kauai_dma_start;
173 1.1 hamajima sc->sc_wdcdev.dma_finish = kauai_dma_finish;
174 1.1 hamajima sc->sc_wdcdev.set_modes = kauai_set_modes;
175 1.1 hamajima sc->sc_calc_timing = calc_timing_kauai;
176 1.1 hamajima sc->sc_dmareg = (void *)dmabase;
177 1.1 hamajima
178 1.1 hamajima chp->channel = 0;
179 1.1 hamajima chp->wdc = &sc->sc_wdcdev;
180 1.1 hamajima chp->ch_queue = &sc->wdc_queue;
181 1.1 hamajima
182 1.1 hamajima wdcattach(chp);
183 1.1 hamajima
184 1.1 hamajima /* Modify access timings. */
185 1.1 hamajima kauai_set_modes(chp);
186 1.1 hamajima }
187 1.1 hamajima
188 1.1 hamajima void
189 1.1 hamajima kauai_set_modes(chp)
190 1.1 hamajima struct channel_softc *chp;
191 1.1 hamajima {
192 1.1 hamajima struct kauai_softc *sc = (void *)chp->wdc;
193 1.1 hamajima struct ata_drive_datas *drvp0 = &chp->ch_drive[0];
194 1.1 hamajima struct ata_drive_datas *drvp1 = &chp->ch_drive[1];
195 1.1 hamajima struct ata_drive_datas *drvp;
196 1.1 hamajima int drive;
197 1.1 hamajima
198 1.1 hamajima if ((drvp0->drive_flags & DRIVE) && (drvp1->drive_flags & DRIVE)) {
199 1.1 hamajima drvp0->PIO_mode = drvp1->PIO_mode =
200 1.1 hamajima min(drvp0->PIO_mode, drvp1->PIO_mode);
201 1.1 hamajima }
202 1.1 hamajima
203 1.1 hamajima for (drive = 0; drive < 2; drive++) {
204 1.1 hamajima drvp = &chp->ch_drive[drive];
205 1.1 hamajima if (drvp->drive_flags & DRIVE) {
206 1.1 hamajima (*sc->sc_calc_timing)(sc, drive);
207 1.1 hamajima bus_space_write_4(chp->cmd_iot, chp->cmd_ioh,
208 1.1 hamajima PIO_CONFIG_REG, sc->sc_piotiming_r[drive]);
209 1.1 hamajima bus_space_write_4(chp->cmd_iot, chp->cmd_ioh,
210 1.1 hamajima DMA_CONFIG_REG, sc->sc_dmatiming_r[drive]);
211 1.1 hamajima }
212 1.1 hamajima }
213 1.1 hamajima
214 1.1 hamajima wdc_print_modes(chp);
215 1.1 hamajima }
216 1.1 hamajima
217 1.1 hamajima /*
218 1.1 hamajima * IDE transfer timings
219 1.1 hamajima */
220 1.1 hamajima static const u_int pio_timing_kauai[] = { /* 0xff000fff */
221 1.1 hamajima 0x08000a92, /* Mode 0 */
222 1.1 hamajima 0x0800060f, /* 1 */
223 1.1 hamajima 0x0800038b, /* 2 */
224 1.1 hamajima 0x05000249, /* 3 */
225 1.1 hamajima 0x04000148 /* 4 */
226 1.1 hamajima };
227 1.1 hamajima static const u_int dma_timing_kauai[] = { /* 0x00fff000 */
228 1.1 hamajima 0x00618000, /* Mode 0 */
229 1.1 hamajima 0x00209000, /* 1 */
230 1.1 hamajima 0x00148000 /* 2 */
231 1.1 hamajima };
232 1.1 hamajima static const u_int udma_timing_kauai[] = { /* 0x0000ffff */
233 1.1 hamajima 0x000070c0, /* Mode 0 */
234 1.1 hamajima 0x00005d80, /* 1 */
235 1.1 hamajima 0x00004a60, /* 2 */
236 1.1 hamajima 0x00003a50, /* 3 */
237 1.1 hamajima 0x00002a30, /* 4 */
238 1.1 hamajima 0x00002921 /* 5 */
239 1.1 hamajima };
240 1.1 hamajima
241 1.1 hamajima /*
242 1.1 hamajima * Timing calculation for Kauai.
243 1.1 hamajima */
244 1.1 hamajima void
245 1.1 hamajima calc_timing_kauai(sc, drive)
246 1.1 hamajima struct kauai_softc *sc;
247 1.1 hamajima int drive;
248 1.1 hamajima {
249 1.1 hamajima struct channel_softc *chp = &sc->wdc_channel;
250 1.1 hamajima struct ata_drive_datas *drvp = &chp->ch_drive[drive];
251 1.1 hamajima int piomode = drvp->PIO_mode;
252 1.1 hamajima int dmamode = drvp->DMA_mode;
253 1.1 hamajima int udmamode = drvp->UDMA_mode;
254 1.1 hamajima u_int pioconf, dmaconf;
255 1.1 hamajima
256 1.1 hamajima pioconf = pio_timing_kauai[piomode];
257 1.1 hamajima
258 1.1 hamajima dmaconf = 0;
259 1.1 hamajima if (drvp->drive_flags & DRIVE_DMA)
260 1.1 hamajima dmaconf |= dma_timing_kauai[dmamode];
261 1.1 hamajima if (drvp->drive_flags & DRIVE_UDMA)
262 1.1 hamajima dmaconf |= udma_timing_kauai[udmamode];
263 1.1 hamajima
264 1.1 hamajima if (drvp->drive_flags & DRIVE_UDMA)
265 1.1 hamajima dmaconf |= 1;
266 1.1 hamajima
267 1.1 hamajima sc->sc_piotiming_r[drive] = sc->sc_piotiming_w[drive] = pioconf;
268 1.1 hamajima sc->sc_dmatiming_r[drive] = sc->sc_dmatiming_w[drive] = dmaconf;
269 1.1 hamajima }
270 1.1 hamajima
271 1.1 hamajima int
272 1.1 hamajima kauai_dma_init(v, channel, drive, databuf, datalen, flags)
273 1.1 hamajima void *v;
274 1.1 hamajima void *databuf;
275 1.1 hamajima size_t datalen;
276 1.1 hamajima int flags;
277 1.1 hamajima {
278 1.1 hamajima struct kauai_softc *sc = v;
279 1.1 hamajima dbdma_command_t *cmdp = sc->sc_dmacmd;
280 1.1 hamajima struct channel_softc *chp = &sc->wdc_channel;
281 1.1 hamajima vaddr_t va = (vaddr_t)databuf;
282 1.1 hamajima int read = flags & WDC_DMA_READ;
283 1.1 hamajima int cmd = read ? DBDMA_CMD_IN_MORE : DBDMA_CMD_OUT_MORE;
284 1.1 hamajima u_int offset;
285 1.1 hamajima
286 1.1 hamajima bus_space_write_4(chp->cmd_iot, chp->cmd_ioh, DMA_CONFIG_REG,
287 1.1 hamajima read ? sc->sc_dmatiming_r[drive] : sc->sc_dmatiming_w[drive]);
288 1.1 hamajima bus_space_read_4(chp->cmd_iot, chp->cmd_ioh, DMA_CONFIG_REG);
289 1.1 hamajima
290 1.1 hamajima offset = va & PGOFSET;
291 1.1 hamajima
292 1.1 hamajima /* if va is not page-aligned, setup the first page */
293 1.1 hamajima if (offset != 0) {
294 1.1 hamajima int rest = PAGE_SIZE - offset; /* the rest of the page */
295 1.1 hamajima
296 1.1 hamajima if (datalen > rest) { /* if continues to next page */
297 1.1 hamajima DBDMA_BUILD(cmdp, cmd, 0, rest, vtophys(va),
298 1.1 hamajima DBDMA_INT_NEVER, DBDMA_WAIT_NEVER,
299 1.1 hamajima DBDMA_BRANCH_NEVER);
300 1.1 hamajima datalen -= rest;
301 1.1 hamajima va += rest;
302 1.1 hamajima cmdp++;
303 1.1 hamajima }
304 1.1 hamajima }
305 1.1 hamajima
306 1.1 hamajima /* now va is page-aligned */
307 1.1 hamajima while (datalen > PAGE_SIZE) {
308 1.1 hamajima DBDMA_BUILD(cmdp, cmd, 0, PAGE_SIZE, vtophys(va),
309 1.1 hamajima DBDMA_INT_NEVER, DBDMA_WAIT_NEVER, DBDMA_BRANCH_NEVER);
310 1.1 hamajima datalen -= PAGE_SIZE;
311 1.1 hamajima va += PAGE_SIZE;
312 1.1 hamajima cmdp++;
313 1.1 hamajima }
314 1.1 hamajima
315 1.1 hamajima /* the last page (datalen <= PAGE_SIZE here) */
316 1.1 hamajima cmd = read ? DBDMA_CMD_IN_LAST : DBDMA_CMD_OUT_LAST;
317 1.1 hamajima DBDMA_BUILD(cmdp, cmd, 0, datalen, vtophys(va),
318 1.1 hamajima DBDMA_INT_NEVER, DBDMA_WAIT_NEVER, DBDMA_BRANCH_NEVER);
319 1.1 hamajima cmdp++;
320 1.1 hamajima
321 1.1 hamajima DBDMA_BUILD(cmdp, DBDMA_CMD_STOP, 0, 0, 0,
322 1.1 hamajima DBDMA_INT_NEVER, DBDMA_WAIT_NEVER, DBDMA_BRANCH_NEVER);
323 1.1 hamajima
324 1.1 hamajima return 0;
325 1.1 hamajima }
326 1.1 hamajima
327 1.1 hamajima void
328 1.1 hamajima kauai_dma_start(v, channel, drive)
329 1.1 hamajima void *v;
330 1.1 hamajima int channel, drive;
331 1.1 hamajima {
332 1.1 hamajima struct kauai_softc *sc = v;
333 1.1 hamajima
334 1.1 hamajima dbdma_start(sc->sc_dmareg, sc->sc_dmacmd);
335 1.1 hamajima }
336 1.1 hamajima
337 1.1 hamajima int
338 1.1 hamajima kauai_dma_finish(v, channel, drive, read)
339 1.1 hamajima void *v;
340 1.1 hamajima int channel, drive;
341 1.1 hamajima int read;
342 1.1 hamajima {
343 1.1 hamajima struct kauai_softc *sc = v;
344 1.1 hamajima
345 1.1 hamajima dbdma_stop(sc->sc_dmareg);
346 1.1 hamajima return 0;
347 1.1 hamajima }
348 1.1 hamajima
349 1.1 hamajima /*
350 1.1 hamajima * Find OF-device corresponding to the PCI device.
351 1.1 hamajima */
352 1.1 hamajima int
353 1.1 hamajima getnodebypci(pc, tag)
354 1.1 hamajima pci_chipset_tag_t pc;
355 1.1 hamajima pcitag_t tag;
356 1.1 hamajima {
357 1.1 hamajima int bus, dev, func;
358 1.1 hamajima u_int reg[5];
359 1.1 hamajima int p, q;
360 1.1 hamajima int l, b, d, f;
361 1.1 hamajima
362 1.1 hamajima pci_decompose_tag(pc, tag, &bus, &dev, &func);
363 1.1 hamajima
364 1.1 hamajima for (q = OF_peer(0); q; q = p) {
365 1.1 hamajima l = OF_getprop(q, "assigned-addresses", reg, sizeof(reg));
366 1.1 hamajima if (l > 4) {
367 1.1 hamajima b = (reg[0] >> 16) & 0xff;
368 1.1 hamajima d = (reg[0] >> 11) & 0x1f;
369 1.1 hamajima f = (reg[0] >> 8) & 0x07;
370 1.1 hamajima
371 1.1 hamajima if (b == bus && d == dev && f == func)
372 1.1 hamajima return q;
373 1.1 hamajima }
374 1.1 hamajima if ((p = OF_child(q)))
375 1.1 hamajima continue;
376 1.1 hamajima while (q) {
377 1.1 hamajima if ((p = OF_peer(q)))
378 1.1 hamajima break;
379 1.1 hamajima q = OF_parent(q);
380 1.1 hamajima }
381 1.1 hamajima }
382 1.1 hamajima return 0;
383 1.1 hamajima }
384