kauai.c revision 1.24 1 1.24 chs /* $NetBSD: kauai.c,v 1.24 2008/05/25 16:00:11 chs Exp $ */
2 1.1 hamajima
3 1.1 hamajima /*-
4 1.1 hamajima * Copyright (c) 2003 Tsubai Masanari. All rights reserved.
5 1.1 hamajima *
6 1.1 hamajima * Redistribution and use in source and binary forms, with or without
7 1.1 hamajima * modification, are permitted provided that the following conditions
8 1.1 hamajima * are met:
9 1.1 hamajima * 1. Redistributions of source code must retain the above copyright
10 1.1 hamajima * notice, this list of conditions and the following disclaimer.
11 1.1 hamajima * 2. Redistributions in binary form must reproduce the above copyright
12 1.1 hamajima * notice, this list of conditions and the following disclaimer in the
13 1.1 hamajima * documentation and/or other materials provided with the distribution.
14 1.1 hamajima * 3. The name of the author may not be used to endorse or promote products
15 1.1 hamajima * derived from this software without specific prior written permission.
16 1.1 hamajima *
17 1.1 hamajima * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
18 1.1 hamajima * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
19 1.1 hamajima * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
20 1.1 hamajima * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
21 1.1 hamajima * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
22 1.1 hamajima * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23 1.1 hamajima * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24 1.1 hamajima * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25 1.1 hamajima * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
26 1.1 hamajima * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27 1.1 hamajima */
28 1.2 lukem
29 1.2 lukem #include <sys/cdefs.h>
30 1.24 chs __KERNEL_RCSID(0, "$NetBSD: kauai.c,v 1.24 2008/05/25 16:00:11 chs Exp $");
31 1.1 hamajima
32 1.1 hamajima #include <sys/param.h>
33 1.1 hamajima #include <sys/systm.h>
34 1.1 hamajima #include <sys/device.h>
35 1.1 hamajima #include <sys/malloc.h>
36 1.1 hamajima
37 1.1 hamajima #include <uvm/uvm_extern.h>
38 1.1 hamajima
39 1.1 hamajima #include <machine/bus.h>
40 1.21 garbled #include <machine/pio.h>
41 1.1 hamajima
42 1.1 hamajima #include <dev/ata/atareg.h>
43 1.1 hamajima #include <dev/ata/atavar.h>
44 1.1 hamajima #include <dev/ic/wdcvar.h>
45 1.1 hamajima
46 1.1 hamajima #include <dev/ofw/openfirm.h>
47 1.1 hamajima
48 1.1 hamajima #include <dev/pci/pcivar.h>
49 1.1 hamajima #include <dev/pci/pcireg.h>
50 1.1 hamajima #include <dev/pci/pcidevs.h>
51 1.1 hamajima
52 1.1 hamajima #include <macppc/dev/dbdma.h>
53 1.1 hamajima
54 1.1 hamajima #define WDC_REG_NPORTS 8
55 1.1 hamajima #define WDC_AUXREG_OFFSET 0x16
56 1.21 garbled #define WDC_AUXREG_NPORTS 1
57 1.1 hamajima
58 1.1 hamajima #define PIO_CONFIG_REG (0x200 >> 4) /* PIO and DMA access timing */
59 1.1 hamajima #define DMA_CONFIG_REG (0x210 >> 4) /* UDMA access timing */
60 1.1 hamajima
61 1.1 hamajima struct kauai_softc {
62 1.1 hamajima struct wdc_softc sc_wdcdev;
63 1.15 thorpej struct ata_channel *sc_chanptr;
64 1.15 thorpej struct ata_channel sc_channel;
65 1.15 thorpej struct wdc_regs sc_wdc_regs;
66 1.15 thorpej struct ata_queue sc_queue;
67 1.1 hamajima dbdma_regmap_t *sc_dmareg;
68 1.1 hamajima dbdma_command_t *sc_dmacmd;
69 1.1 hamajima u_int sc_piotiming_r[2];
70 1.1 hamajima u_int sc_piotiming_w[2];
71 1.1 hamajima u_int sc_dmatiming_r[2];
72 1.1 hamajima u_int sc_dmatiming_w[2];
73 1.1 hamajima void (*sc_calc_timing)(struct kauai_softc *, int);
74 1.1 hamajima };
75 1.1 hamajima
76 1.22 matt static int kauai_match(device_t, cfdata_t, void *);
77 1.22 matt static void kauai_attach(device_t, device_t, void *);
78 1.22 matt static int kauai_dma_init(void *, int, int, void *, size_t, int);
79 1.22 matt static void kauai_dma_start(void *, int, int);
80 1.22 matt static int kauai_dma_finish(void *, int, int, int);
81 1.22 matt static void kauai_set_modes(struct ata_channel *);
82 1.22 matt static void calc_timing_kauai(struct kauai_softc *, int);
83 1.1 hamajima static int getnodebypci(pci_chipset_tag_t, pcitag_t);
84 1.1 hamajima
85 1.23 cube CFATTACH_DECL_NEW(kauai, sizeof(struct kauai_softc),
86 1.1 hamajima kauai_match, kauai_attach, NULL, wdcactivate);
87 1.1 hamajima
88 1.1 hamajima int
89 1.22 matt kauai_match(device_t parent, cfdata_t match, void *aux)
90 1.1 hamajima {
91 1.1 hamajima struct pci_attach_args *pa = aux;
92 1.1 hamajima
93 1.20 aymeric if (PCI_VENDOR(pa->pa_id) == PCI_VENDOR_APPLE) {
94 1.20 aymeric switch (PCI_PRODUCT(pa->pa_id)) {
95 1.20 aymeric case PCI_PRODUCT_APPLE_KAUAI:
96 1.20 aymeric case PCI_PRODUCT_APPLE_UNINORTH_ATA:
97 1.20 aymeric case PCI_PRODUCT_APPLE_INTREPID2_ATA:
98 1.24 chs case PCI_PRODUCT_APPLE_SHASTA_ATA:
99 1.20 aymeric return 5;
100 1.20 aymeric }
101 1.20 aymeric }
102 1.1 hamajima
103 1.1 hamajima return 0;
104 1.1 hamajima }
105 1.1 hamajima
106 1.1 hamajima void
107 1.22 matt kauai_attach(device_t parent, device_t self, void *aux)
108 1.1 hamajima {
109 1.22 matt struct kauai_softc *sc = device_private(self);
110 1.1 hamajima struct pci_attach_args *pa = aux;
111 1.15 thorpej struct ata_channel *chp = &sc->sc_channel;
112 1.15 thorpej struct wdc_regs *wdr;
113 1.1 hamajima pci_intr_handle_t ih;
114 1.1 hamajima paddr_t regbase, dmabase;
115 1.7 bouyer int node, reg[5], i;
116 1.1 hamajima
117 1.23 cube sc->sc_wdcdev.sc_atac.atac_dev = self;
118 1.23 cube
119 1.1 hamajima #ifdef DIAGNOSTIC
120 1.1 hamajima if ((vaddr_t)sc->sc_dmacmd & 0x0f) {
121 1.22 matt aprint_error(": bad dbdma alignment\n");
122 1.1 hamajima return;
123 1.1 hamajima }
124 1.1 hamajima #endif
125 1.1 hamajima
126 1.1 hamajima node = getnodebypci(pa->pa_pc, pa->pa_tag);
127 1.1 hamajima if (node == 0) {
128 1.22 matt aprint_error(": cannot find kauai node\n");
129 1.1 hamajima return;
130 1.1 hamajima }
131 1.1 hamajima
132 1.1 hamajima if (OF_getprop(node, "assigned-addresses", reg, sizeof reg) < 12) {
133 1.22 matt aprint_error(": cannot get address property\n");
134 1.1 hamajima return;
135 1.1 hamajima }
136 1.1 hamajima regbase = reg[2] + 0x2000;
137 1.1 hamajima dmabase = reg[2] + 0x1000;
138 1.1 hamajima
139 1.1 hamajima /*
140 1.1 hamajima * XXX PCI_INTERRUPT_REG seems to be wired to 0.
141 1.1 hamajima * XXX So use fixed intrpin and intrline values.
142 1.1 hamajima */
143 1.1 hamajima if (pci_conf_read(pa->pa_pc, pa->pa_tag, PCI_INTERRUPT_REG) == 0) {
144 1.1 hamajima pa->pa_intrpin = 1;
145 1.1 hamajima pa->pa_intrline = 39;
146 1.1 hamajima }
147 1.1 hamajima
148 1.1 hamajima if (pci_intr_map(pa, &ih)) {
149 1.22 matt aprint_error(": unable to map interrupt\n");
150 1.1 hamajima return;
151 1.1 hamajima }
152 1.22 matt aprint_normal(": interrupting at %s\n", pci_intr_string(pa->pa_pc, ih));
153 1.1 hamajima
154 1.15 thorpej sc->sc_wdcdev.regs = wdr = &sc->sc_wdc_regs;
155 1.1 hamajima
156 1.21 garbled wdr->cmd_iot = wdr->ctl_iot = pa->pa_memt;
157 1.15 thorpej
158 1.21 garbled if (bus_space_map(wdr->cmd_iot, regbase, WDC_REG_NPORTS << 4, 0,
159 1.15 thorpej &wdr->cmd_baseioh) ||
160 1.15 thorpej bus_space_subregion(wdr->cmd_iot, wdr->cmd_baseioh,
161 1.21 garbled WDC_AUXREG_OFFSET << 4, 1, &wdr->ctl_ioh)) {
162 1.22 matt aprint_error_dev(self, "couldn't map registers\n");
163 1.1 hamajima return;
164 1.1 hamajima }
165 1.7 bouyer for (i = 0; i < WDC_NREG; i++) {
166 1.21 garbled if (bus_space_subregion(wdr->cmd_iot, wdr->cmd_baseioh, i << 4,
167 1.15 thorpej i == 0 ? 4 : 1, &wdr->cmd_iohs[i]) != 0) {
168 1.15 thorpej bus_space_unmap(wdr->cmd_iot, wdr->cmd_baseioh,
169 1.21 garbled WDC_REG_NPORTS << 4);
170 1.22 matt aprint_error_dev(self,
171 1.22 matt "couldn't subregion registers\n");
172 1.7 bouyer return;
173 1.7 bouyer }
174 1.7 bouyer }
175 1.1 hamajima
176 1.1 hamajima if (pci_intr_establish(pa->pa_pc, ih, IPL_BIO, wdcintr, chp) == NULL) {
177 1.22 matt aprint_error_dev(self, "unable to establish interrupt\n");
178 1.1 hamajima return;
179 1.1 hamajima }
180 1.1 hamajima
181 1.1 hamajima
182 1.16 thorpej sc->sc_wdcdev.sc_atac.atac_pio_cap = 4;
183 1.16 thorpej sc->sc_wdcdev.sc_atac.atac_dma_cap = 2;
184 1.16 thorpej sc->sc_wdcdev.sc_atac.atac_udma_cap = 5;
185 1.16 thorpej sc->sc_wdcdev.sc_atac.atac_cap |= ATAC_CAP_DATA16;
186 1.16 thorpej sc->sc_wdcdev.sc_atac.atac_cap |= ATAC_CAP_DMA | ATAC_CAP_UDMA;
187 1.15 thorpej sc->sc_chanptr = chp;
188 1.16 thorpej sc->sc_wdcdev.sc_atac.atac_channels = &sc->sc_chanptr;
189 1.16 thorpej sc->sc_wdcdev.sc_atac.atac_nchannels = 1;
190 1.1 hamajima sc->sc_wdcdev.dma_arg = sc;
191 1.1 hamajima sc->sc_wdcdev.dma_init = kauai_dma_init;
192 1.1 hamajima sc->sc_wdcdev.dma_start = kauai_dma_start;
193 1.1 hamajima sc->sc_wdcdev.dma_finish = kauai_dma_finish;
194 1.16 thorpej sc->sc_wdcdev.sc_atac.atac_set_modes = kauai_set_modes;
195 1.1 hamajima sc->sc_calc_timing = calc_timing_kauai;
196 1.1 hamajima sc->sc_dmareg = (void *)dmabase;
197 1.1 hamajima
198 1.11 thorpej chp->ch_channel = 0;
199 1.16 thorpej chp->ch_atac = &sc->sc_wdcdev.sc_atac;
200 1.15 thorpej chp->ch_queue = &sc->sc_queue;
201 1.19 bouyer chp->ch_ndrive = 2;
202 1.17 manu wdc_init_shadow_regs(chp);
203 1.1 hamajima
204 1.6 bouyer wdcattach(chp);
205 1.1 hamajima }
206 1.1 hamajima
207 1.1 hamajima void
208 1.22 matt kauai_set_modes(struct ata_channel *chp)
209 1.1 hamajima {
210 1.16 thorpej struct kauai_softc *sc = (void *)chp->ch_atac;
211 1.16 thorpej struct wdc_regs *wdr = CHAN_TO_WDC_REGS(chp);
212 1.1 hamajima struct ata_drive_datas *drvp0 = &chp->ch_drive[0];
213 1.1 hamajima struct ata_drive_datas *drvp1 = &chp->ch_drive[1];
214 1.1 hamajima struct ata_drive_datas *drvp;
215 1.1 hamajima int drive;
216 1.1 hamajima
217 1.1 hamajima if ((drvp0->drive_flags & DRIVE) && (drvp1->drive_flags & DRIVE)) {
218 1.1 hamajima drvp0->PIO_mode = drvp1->PIO_mode =
219 1.1 hamajima min(drvp0->PIO_mode, drvp1->PIO_mode);
220 1.1 hamajima }
221 1.1 hamajima
222 1.1 hamajima for (drive = 0; drive < 2; drive++) {
223 1.1 hamajima drvp = &chp->ch_drive[drive];
224 1.1 hamajima if (drvp->drive_flags & DRIVE) {
225 1.1 hamajima (*sc->sc_calc_timing)(sc, drive);
226 1.15 thorpej bus_space_write_4(wdr->cmd_iot, wdr->cmd_baseioh,
227 1.1 hamajima PIO_CONFIG_REG, sc->sc_piotiming_r[drive]);
228 1.15 thorpej bus_space_write_4(wdr->cmd_iot, wdr->cmd_baseioh,
229 1.1 hamajima DMA_CONFIG_REG, sc->sc_dmatiming_r[drive]);
230 1.1 hamajima }
231 1.1 hamajima }
232 1.1 hamajima }
233 1.1 hamajima
234 1.1 hamajima /*
235 1.1 hamajima * IDE transfer timings
236 1.1 hamajima */
237 1.1 hamajima static const u_int pio_timing_kauai[] = { /* 0xff000fff */
238 1.1 hamajima 0x08000a92, /* Mode 0 */
239 1.1 hamajima 0x0800060f, /* 1 */
240 1.1 hamajima 0x0800038b, /* 2 */
241 1.1 hamajima 0x05000249, /* 3 */
242 1.1 hamajima 0x04000148 /* 4 */
243 1.1 hamajima };
244 1.1 hamajima static const u_int dma_timing_kauai[] = { /* 0x00fff000 */
245 1.1 hamajima 0x00618000, /* Mode 0 */
246 1.1 hamajima 0x00209000, /* 1 */
247 1.1 hamajima 0x00148000 /* 2 */
248 1.1 hamajima };
249 1.1 hamajima static const u_int udma_timing_kauai[] = { /* 0x0000ffff */
250 1.1 hamajima 0x000070c0, /* Mode 0 */
251 1.1 hamajima 0x00005d80, /* 1 */
252 1.1 hamajima 0x00004a60, /* 2 */
253 1.1 hamajima 0x00003a50, /* 3 */
254 1.1 hamajima 0x00002a30, /* 4 */
255 1.1 hamajima 0x00002921 /* 5 */
256 1.1 hamajima };
257 1.1 hamajima
258 1.1 hamajima /*
259 1.1 hamajima * Timing calculation for Kauai.
260 1.1 hamajima */
261 1.1 hamajima void
262 1.22 matt calc_timing_kauai(struct kauai_softc *sc, int drive)
263 1.1 hamajima {
264 1.15 thorpej struct ata_channel *chp = &sc->sc_channel;
265 1.1 hamajima struct ata_drive_datas *drvp = &chp->ch_drive[drive];
266 1.1 hamajima int piomode = drvp->PIO_mode;
267 1.1 hamajima int dmamode = drvp->DMA_mode;
268 1.1 hamajima int udmamode = drvp->UDMA_mode;
269 1.1 hamajima u_int pioconf, dmaconf;
270 1.1 hamajima
271 1.1 hamajima pioconf = pio_timing_kauai[piomode];
272 1.1 hamajima
273 1.1 hamajima dmaconf = 0;
274 1.1 hamajima if (drvp->drive_flags & DRIVE_DMA)
275 1.1 hamajima dmaconf |= dma_timing_kauai[dmamode];
276 1.1 hamajima if (drvp->drive_flags & DRIVE_UDMA)
277 1.1 hamajima dmaconf |= udma_timing_kauai[udmamode];
278 1.1 hamajima
279 1.1 hamajima if (drvp->drive_flags & DRIVE_UDMA)
280 1.1 hamajima dmaconf |= 1;
281 1.1 hamajima
282 1.1 hamajima sc->sc_piotiming_r[drive] = sc->sc_piotiming_w[drive] = pioconf;
283 1.1 hamajima sc->sc_dmatiming_r[drive] = sc->sc_dmatiming_w[drive] = dmaconf;
284 1.1 hamajima }
285 1.1 hamajima
286 1.1 hamajima int
287 1.22 matt kauai_dma_init(void *v, int channel, int drive, void *databuf,
288 1.22 matt size_t datalen, int flags)
289 1.1 hamajima {
290 1.1 hamajima struct kauai_softc *sc = v;
291 1.1 hamajima dbdma_command_t *cmdp = sc->sc_dmacmd;
292 1.15 thorpej struct ata_channel *chp = &sc->sc_channel;
293 1.16 thorpej struct wdc_regs *wdr = CHAN_TO_WDC_REGS(chp);
294 1.1 hamajima vaddr_t va = (vaddr_t)databuf;
295 1.1 hamajima int read = flags & WDC_DMA_READ;
296 1.1 hamajima int cmd = read ? DBDMA_CMD_IN_MORE : DBDMA_CMD_OUT_MORE;
297 1.1 hamajima u_int offset;
298 1.1 hamajima
299 1.15 thorpej bus_space_write_4(wdr->cmd_iot, wdr->cmd_baseioh, DMA_CONFIG_REG,
300 1.1 hamajima read ? sc->sc_dmatiming_r[drive] : sc->sc_dmatiming_w[drive]);
301 1.15 thorpej bus_space_read_4(wdr->cmd_iot, wdr->cmd_baseioh, DMA_CONFIG_REG);
302 1.1 hamajima
303 1.1 hamajima offset = va & PGOFSET;
304 1.1 hamajima
305 1.1 hamajima /* if va is not page-aligned, setup the first page */
306 1.1 hamajima if (offset != 0) {
307 1.1 hamajima int rest = PAGE_SIZE - offset; /* the rest of the page */
308 1.1 hamajima
309 1.1 hamajima if (datalen > rest) { /* if continues to next page */
310 1.1 hamajima DBDMA_BUILD(cmdp, cmd, 0, rest, vtophys(va),
311 1.1 hamajima DBDMA_INT_NEVER, DBDMA_WAIT_NEVER,
312 1.1 hamajima DBDMA_BRANCH_NEVER);
313 1.1 hamajima datalen -= rest;
314 1.1 hamajima va += rest;
315 1.1 hamajima cmdp++;
316 1.1 hamajima }
317 1.1 hamajima }
318 1.1 hamajima
319 1.1 hamajima /* now va is page-aligned */
320 1.1 hamajima while (datalen > PAGE_SIZE) {
321 1.1 hamajima DBDMA_BUILD(cmdp, cmd, 0, PAGE_SIZE, vtophys(va),
322 1.1 hamajima DBDMA_INT_NEVER, DBDMA_WAIT_NEVER, DBDMA_BRANCH_NEVER);
323 1.1 hamajima datalen -= PAGE_SIZE;
324 1.1 hamajima va += PAGE_SIZE;
325 1.1 hamajima cmdp++;
326 1.1 hamajima }
327 1.1 hamajima
328 1.1 hamajima /* the last page (datalen <= PAGE_SIZE here) */
329 1.1 hamajima cmd = read ? DBDMA_CMD_IN_LAST : DBDMA_CMD_OUT_LAST;
330 1.1 hamajima DBDMA_BUILD(cmdp, cmd, 0, datalen, vtophys(va),
331 1.1 hamajima DBDMA_INT_NEVER, DBDMA_WAIT_NEVER, DBDMA_BRANCH_NEVER);
332 1.1 hamajima cmdp++;
333 1.1 hamajima
334 1.1 hamajima DBDMA_BUILD(cmdp, DBDMA_CMD_STOP, 0, 0, 0,
335 1.1 hamajima DBDMA_INT_NEVER, DBDMA_WAIT_NEVER, DBDMA_BRANCH_NEVER);
336 1.1 hamajima
337 1.1 hamajima return 0;
338 1.1 hamajima }
339 1.1 hamajima
340 1.1 hamajima void
341 1.22 matt kauai_dma_start(void *v, int channel, int drive)
342 1.1 hamajima {
343 1.1 hamajima struct kauai_softc *sc = v;
344 1.1 hamajima
345 1.1 hamajima dbdma_start(sc->sc_dmareg, sc->sc_dmacmd);
346 1.1 hamajima }
347 1.1 hamajima
348 1.1 hamajima int
349 1.22 matt kauai_dma_finish(void *v, int channel, int drive, int read)
350 1.1 hamajima {
351 1.1 hamajima struct kauai_softc *sc = v;
352 1.1 hamajima
353 1.1 hamajima dbdma_stop(sc->sc_dmareg);
354 1.1 hamajima return 0;
355 1.1 hamajima }
356 1.1 hamajima
357 1.1 hamajima /*
358 1.1 hamajima * Find OF-device corresponding to the PCI device.
359 1.1 hamajima */
360 1.1 hamajima int
361 1.22 matt getnodebypci(pci_chipset_tag_t pc, pcitag_t tag)
362 1.1 hamajima {
363 1.1 hamajima int bus, dev, func;
364 1.1 hamajima u_int reg[5];
365 1.1 hamajima int p, q;
366 1.1 hamajima int l, b, d, f;
367 1.1 hamajima
368 1.1 hamajima pci_decompose_tag(pc, tag, &bus, &dev, &func);
369 1.1 hamajima
370 1.1 hamajima for (q = OF_peer(0); q; q = p) {
371 1.1 hamajima l = OF_getprop(q, "assigned-addresses", reg, sizeof(reg));
372 1.1 hamajima if (l > 4) {
373 1.1 hamajima b = (reg[0] >> 16) & 0xff;
374 1.1 hamajima d = (reg[0] >> 11) & 0x1f;
375 1.1 hamajima f = (reg[0] >> 8) & 0x07;
376 1.1 hamajima
377 1.1 hamajima if (b == bus && d == dev && f == func)
378 1.1 hamajima return q;
379 1.1 hamajima }
380 1.1 hamajima if ((p = OF_child(q)))
381 1.1 hamajima continue;
382 1.1 hamajima while (q) {
383 1.1 hamajima if ((p = OF_peer(q)))
384 1.1 hamajima break;
385 1.1 hamajima q = OF_parent(q);
386 1.1 hamajima }
387 1.1 hamajima }
388 1.1 hamajima return 0;
389 1.1 hamajima }
390