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kauai.c revision 1.35.10.1
      1  1.35.10.1  pgoyette /*	$NetBSD: kauai.c,v 1.35.10.1 2016/07/26 03:24:17 pgoyette Exp $	*/
      2        1.1  hamajima 
      3        1.1  hamajima /*-
      4        1.1  hamajima  * Copyright (c) 2003 Tsubai Masanari.  All rights reserved.
      5        1.1  hamajima  *
      6        1.1  hamajima  * Redistribution and use in source and binary forms, with or without
      7        1.1  hamajima  * modification, are permitted provided that the following conditions
      8        1.1  hamajima  * are met:
      9        1.1  hamajima  * 1. Redistributions of source code must retain the above copyright
     10        1.1  hamajima  *    notice, this list of conditions and the following disclaimer.
     11        1.1  hamajima  * 2. Redistributions in binary form must reproduce the above copyright
     12        1.1  hamajima  *    notice, this list of conditions and the following disclaimer in the
     13        1.1  hamajima  *    documentation and/or other materials provided with the distribution.
     14        1.1  hamajima  * 3. The name of the author may not be used to endorse or promote products
     15        1.1  hamajima  *    derived from this software without specific prior written permission.
     16        1.1  hamajima  *
     17        1.1  hamajima  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
     18        1.1  hamajima  * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
     19        1.1  hamajima  * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
     20        1.1  hamajima  * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
     21        1.1  hamajima  * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
     22        1.1  hamajima  * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
     23        1.1  hamajima  * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
     24        1.1  hamajima  * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
     25        1.1  hamajima  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
     26        1.1  hamajima  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
     27        1.1  hamajima  */
     28        1.2     lukem 
     29        1.2     lukem #include <sys/cdefs.h>
     30  1.35.10.1  pgoyette __KERNEL_RCSID(0, "$NetBSD: kauai.c,v 1.35.10.1 2016/07/26 03:24:17 pgoyette Exp $");
     31        1.1  hamajima 
     32        1.1  hamajima #include <sys/param.h>
     33        1.1  hamajima #include <sys/systm.h>
     34        1.1  hamajima #include <sys/device.h>
     35        1.1  hamajima #include <sys/malloc.h>
     36        1.1  hamajima 
     37        1.1  hamajima #include <uvm/uvm_extern.h>
     38        1.1  hamajima 
     39       1.28    dyoung #include <sys/bus.h>
     40       1.21   garbled #include <machine/pio.h>
     41        1.1  hamajima 
     42        1.1  hamajima #include <dev/ata/atareg.h>
     43        1.1  hamajima #include <dev/ata/atavar.h>
     44        1.1  hamajima #include <dev/ic/wdcvar.h>
     45        1.1  hamajima 
     46        1.1  hamajima #include <dev/ofw/openfirm.h>
     47        1.1  hamajima 
     48        1.1  hamajima #include <dev/pci/pcivar.h>
     49        1.1  hamajima #include <dev/pci/pcireg.h>
     50        1.1  hamajima #include <dev/pci/pcidevs.h>
     51        1.1  hamajima 
     52        1.1  hamajima #include <macppc/dev/dbdma.h>
     53        1.1  hamajima 
     54        1.1  hamajima #define WDC_REG_NPORTS		8
     55        1.1  hamajima #define WDC_AUXREG_OFFSET	0x16
     56       1.21   garbled #define WDC_AUXREG_NPORTS	1
     57        1.1  hamajima 
     58       1.26  macallan #define PIO_CONFIG_REG	0x200	/* PIO and DMA access timing */
     59       1.26  macallan #define DMA_CONFIG_REG	0x210	/* UDMA access timing */
     60        1.1  hamajima 
     61        1.1  hamajima struct kauai_softc {
     62        1.1  hamajima 	struct wdc_softc sc_wdcdev;
     63       1.15   thorpej 	struct ata_channel *sc_chanptr;
     64       1.15   thorpej 	struct ata_channel sc_channel;
     65       1.15   thorpej 	struct wdc_regs sc_wdc_regs;
     66       1.15   thorpej 	struct ata_queue sc_queue;
     67        1.1  hamajima 	dbdma_regmap_t *sc_dmareg;
     68        1.1  hamajima 	dbdma_command_t	*sc_dmacmd;
     69        1.1  hamajima 	u_int sc_piotiming_r[2];
     70        1.1  hamajima 	u_int sc_piotiming_w[2];
     71        1.1  hamajima 	u_int sc_dmatiming_r[2];
     72        1.1  hamajima 	u_int sc_dmatiming_w[2];
     73        1.1  hamajima 	void (*sc_calc_timing)(struct kauai_softc *, int);
     74        1.1  hamajima };
     75        1.1  hamajima 
     76       1.22      matt static int kauai_match(device_t, cfdata_t, void *);
     77       1.22      matt static void kauai_attach(device_t, device_t, void *);
     78       1.22      matt static int kauai_dma_init(void *, int, int, void *, size_t, int);
     79       1.22      matt static void kauai_dma_start(void *, int, int);
     80       1.22      matt static int kauai_dma_finish(void *, int, int, int);
     81       1.22      matt static void kauai_set_modes(struct ata_channel *);
     82       1.22      matt static void calc_timing_kauai(struct kauai_softc *, int);
     83        1.1  hamajima 
     84       1.23      cube CFATTACH_DECL_NEW(kauai, sizeof(struct kauai_softc),
     85       1.27    dyoung     kauai_match, kauai_attach, NULL, NULL);
     86        1.1  hamajima 
     87        1.1  hamajima int
     88       1.22      matt kauai_match(device_t parent, cfdata_t match, void *aux)
     89        1.1  hamajima {
     90        1.1  hamajima 	struct pci_attach_args *pa = aux;
     91        1.1  hamajima 
     92       1.20   aymeric 	if (PCI_VENDOR(pa->pa_id) == PCI_VENDOR_APPLE) {
     93       1.20   aymeric 		switch (PCI_PRODUCT(pa->pa_id)) {
     94       1.20   aymeric 		case PCI_PRODUCT_APPLE_KAUAI:
     95       1.20   aymeric 		case PCI_PRODUCT_APPLE_UNINORTH_ATA:
     96       1.20   aymeric 		case PCI_PRODUCT_APPLE_INTREPID2_ATA:
     97       1.24       chs 		case PCI_PRODUCT_APPLE_SHASTA_ATA:
     98       1.20   aymeric 		    return 5;
     99       1.20   aymeric 		}
    100       1.20   aymeric 	}
    101        1.1  hamajima 
    102        1.1  hamajima 	return 0;
    103        1.1  hamajima }
    104        1.1  hamajima 
    105        1.1  hamajima void
    106       1.22      matt kauai_attach(device_t parent, device_t self, void *aux)
    107        1.1  hamajima {
    108       1.22      matt 	struct kauai_softc *sc = device_private(self);
    109        1.1  hamajima 	struct pci_attach_args *pa = aux;
    110       1.15   thorpej 	struct ata_channel *chp = &sc->sc_channel;
    111       1.15   thorpej 	struct wdc_regs *wdr;
    112        1.1  hamajima 	pci_intr_handle_t ih;
    113        1.1  hamajima 	paddr_t regbase, dmabase;
    114        1.7    bouyer 	int node, reg[5], i;
    115       1.34  macallan 	uint32_t intrs[4], intr;
    116       1.35  christos 	char buf[PCI_INTRSTR_LEN];
    117        1.1  hamajima 
    118       1.23      cube 	sc->sc_wdcdev.sc_atac.atac_dev = self;
    119       1.23      cube 
    120  1.35.10.1  pgoyette 	sc->sc_dmacmd = dbdma_alloc(sizeof(dbdma_command_t) * 20, NULL);
    121       1.25  macallan 	node = pcidev_to_ofdev(pa->pa_pc, pa->pa_tag);
    122        1.1  hamajima 	if (node == 0) {
    123       1.22      matt 		aprint_error(": cannot find kauai node\n");
    124        1.1  hamajima 		return;
    125        1.1  hamajima 	}
    126        1.1  hamajima 
    127        1.1  hamajima 	if (OF_getprop(node, "assigned-addresses", reg, sizeof reg) < 12) {
    128       1.22      matt 		aprint_error(": cannot get address property\n");
    129        1.1  hamajima 		return;
    130        1.1  hamajima 	}
    131        1.1  hamajima 	regbase = reg[2] + 0x2000;
    132        1.1  hamajima 	dmabase = reg[2] + 0x1000;
    133        1.1  hamajima 
    134        1.1  hamajima 	/*
    135        1.1  hamajima 	 * XXX PCI_INTERRUPT_REG seems to be wired to 0.
    136       1.34  macallan 	 * XXX So use fixed intrpin and intrline values if the interrupts
    137       1.34  macallan 	 * XXX property contains no IRQ line
    138        1.1  hamajima 	 */
    139       1.34  macallan 	intr = 0;
    140       1.34  macallan 	pa->pa_intrpin = 1;
    141       1.34  macallan 	if (OF_getprop(node, "interrupts", intrs, sizeof(intrs)) >= 4) {
    142       1.34  macallan 		intr = intrs[0];
    143       1.34  macallan 		/*
    144       1.34  macallan 		 * the interrupts property on my iBook G4's kauai contains
    145       1.34  macallan 		 * 0x00000001 0x00000000, so fix that up here
    146       1.34  macallan 		 * TODO: use parent's interrupt-map property to do this right
    147       1.34  macallan 		 */
    148       1.34  macallan 		if (intr < 10)
    149       1.34  macallan 			intr = 0;
    150       1.34  macallan 		aprint_debug_dev(self,
    151       1.34  macallan 		    "got %d from interrupts property\n", intr);
    152       1.34  macallan 	}
    153       1.34  macallan 	if (intr == 0) {
    154       1.34  macallan 		if (PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_APPLE_SHASTA_ATA) {
    155       1.34  macallan 			intr = 38;
    156       1.34  macallan 		} else
    157       1.34  macallan 			intr = 39;
    158        1.1  hamajima 	}
    159       1.34  macallan 	pa->pa_intrline = intr;
    160        1.1  hamajima 
    161        1.1  hamajima 	if (pci_intr_map(pa, &ih)) {
    162       1.22      matt 		aprint_error(": unable to map interrupt\n");
    163        1.1  hamajima 		return;
    164        1.1  hamajima 	}
    165       1.35  christos 	aprint_normal(": interrupting at %s\n", pci_intr_string(pa->pa_pc, ih,
    166       1.35  christos 	    buf, sizeof(buf)));
    167        1.1  hamajima 
    168       1.15   thorpej 	sc->sc_wdcdev.regs = wdr = &sc->sc_wdc_regs;
    169        1.1  hamajima 
    170       1.21   garbled 	wdr->cmd_iot = wdr->ctl_iot = pa->pa_memt;
    171       1.15   thorpej 
    172       1.21   garbled 	if (bus_space_map(wdr->cmd_iot, regbase, WDC_REG_NPORTS << 4, 0,
    173       1.15   thorpej 	    &wdr->cmd_baseioh) ||
    174       1.15   thorpej 	    bus_space_subregion(wdr->cmd_iot, wdr->cmd_baseioh,
    175       1.21   garbled 			WDC_AUXREG_OFFSET << 4, 1, &wdr->ctl_ioh)) {
    176       1.22      matt 		aprint_error_dev(self, "couldn't map registers\n");
    177        1.1  hamajima 		return;
    178        1.1  hamajima 	}
    179        1.7    bouyer 	for (i = 0; i < WDC_NREG; i++) {
    180       1.21   garbled 		if (bus_space_subregion(wdr->cmd_iot, wdr->cmd_baseioh, i << 4,
    181       1.15   thorpej 		    i == 0 ? 4 : 1, &wdr->cmd_iohs[i]) != 0) {
    182       1.15   thorpej 			bus_space_unmap(wdr->cmd_iot, wdr->cmd_baseioh,
    183       1.21   garbled 			    WDC_REG_NPORTS << 4);
    184       1.22      matt 			aprint_error_dev(self,
    185       1.22      matt 			    "couldn't subregion registers\n");
    186        1.7    bouyer 			return;
    187        1.7    bouyer 		}
    188        1.7    bouyer 	}
    189        1.1  hamajima 
    190        1.1  hamajima 	if (pci_intr_establish(pa->pa_pc, ih, IPL_BIO, wdcintr, chp) == NULL) {
    191       1.22      matt 		aprint_error_dev(self, "unable to establish interrupt\n");
    192        1.1  hamajima 		return;
    193        1.1  hamajima 	}
    194        1.1  hamajima 
    195        1.1  hamajima 
    196       1.16   thorpej 	sc->sc_wdcdev.sc_atac.atac_pio_cap = 4;
    197       1.16   thorpej 	sc->sc_wdcdev.sc_atac.atac_dma_cap = 2;
    198       1.16   thorpej 	sc->sc_wdcdev.sc_atac.atac_udma_cap = 5;
    199       1.16   thorpej 	sc->sc_wdcdev.sc_atac.atac_cap |= ATAC_CAP_DATA16;
    200       1.16   thorpej 	sc->sc_wdcdev.sc_atac.atac_cap |= ATAC_CAP_DMA | ATAC_CAP_UDMA;
    201       1.15   thorpej 	sc->sc_chanptr = chp;
    202       1.16   thorpej 	sc->sc_wdcdev.sc_atac.atac_channels = &sc->sc_chanptr;
    203       1.16   thorpej 	sc->sc_wdcdev.sc_atac.atac_nchannels = 1;
    204       1.33    bouyer 	sc->sc_wdcdev.wdc_maxdrives = 2;
    205        1.1  hamajima 	sc->sc_wdcdev.dma_arg = sc;
    206        1.1  hamajima 	sc->sc_wdcdev.dma_init = kauai_dma_init;
    207        1.1  hamajima 	sc->sc_wdcdev.dma_start = kauai_dma_start;
    208        1.1  hamajima 	sc->sc_wdcdev.dma_finish = kauai_dma_finish;
    209       1.16   thorpej 	sc->sc_wdcdev.sc_atac.atac_set_modes = kauai_set_modes;
    210        1.1  hamajima 	sc->sc_calc_timing = calc_timing_kauai;
    211       1.34  macallan 	sc->sc_dmareg = mapiodev(dmabase, 0x1000, false);
    212        1.1  hamajima 
    213       1.11   thorpej 	chp->ch_channel = 0;
    214       1.16   thorpej 	chp->ch_atac = &sc->sc_wdcdev.sc_atac;
    215       1.15   thorpej 	chp->ch_queue = &sc->sc_queue;
    216       1.17      manu 	wdc_init_shadow_regs(chp);
    217        1.1  hamajima 
    218        1.6    bouyer 	wdcattach(chp);
    219        1.1  hamajima }
    220        1.1  hamajima 
    221        1.1  hamajima void
    222       1.22      matt kauai_set_modes(struct ata_channel *chp)
    223        1.1  hamajima {
    224       1.16   thorpej 	struct kauai_softc *sc = (void *)chp->ch_atac;
    225       1.16   thorpej 	struct wdc_regs *wdr = CHAN_TO_WDC_REGS(chp);
    226        1.1  hamajima 	struct ata_drive_datas *drvp0 = &chp->ch_drive[0];
    227        1.1  hamajima 	struct ata_drive_datas *drvp1 = &chp->ch_drive[1];
    228        1.1  hamajima 	struct ata_drive_datas *drvp;
    229        1.1  hamajima 	int drive;
    230        1.1  hamajima 
    231       1.33    bouyer 	if (drvp0->drive_type != ATA_DRIVET_NONE &&
    232       1.33    bouyer 	    drvp1->drive_type != ATA_DRIVET_NONE) {
    233        1.1  hamajima 		drvp0->PIO_mode = drvp1->PIO_mode =
    234        1.1  hamajima 		    min(drvp0->PIO_mode, drvp1->PIO_mode);
    235        1.1  hamajima 	}
    236        1.1  hamajima 
    237        1.1  hamajima 	for (drive = 0; drive < 2; drive++) {
    238        1.1  hamajima 		drvp = &chp->ch_drive[drive];
    239       1.33    bouyer 		if (drvp->drive_type !=  ATA_DRIVET_NONE) {
    240        1.1  hamajima 			(*sc->sc_calc_timing)(sc, drive);
    241       1.15   thorpej 			bus_space_write_4(wdr->cmd_iot, wdr->cmd_baseioh,
    242        1.1  hamajima 			    PIO_CONFIG_REG, sc->sc_piotiming_r[drive]);
    243       1.15   thorpej 			bus_space_write_4(wdr->cmd_iot, wdr->cmd_baseioh,
    244        1.1  hamajima 			    DMA_CONFIG_REG, sc->sc_dmatiming_r[drive]);
    245        1.1  hamajima 		}
    246        1.1  hamajima 	}
    247        1.1  hamajima }
    248        1.1  hamajima 
    249        1.1  hamajima /*
    250        1.1  hamajima  * IDE transfer timings
    251        1.1  hamajima  */
    252        1.1  hamajima static const u_int pio_timing_kauai[] = {	/* 0xff000fff */
    253        1.1  hamajima 	0x08000a92,	/* Mode 0 */
    254        1.1  hamajima 	0x0800060f,	/*      1 */
    255        1.1  hamajima 	0x0800038b,	/*      2 */
    256        1.1  hamajima 	0x05000249,	/*      3 */
    257        1.1  hamajima 	0x04000148	/*      4 */
    258        1.1  hamajima };
    259        1.1  hamajima static const u_int dma_timing_kauai[] = {	/* 0x00fff000 */
    260        1.1  hamajima 	0x00618000,	/* Mode 0 */
    261        1.1  hamajima 	0x00209000,	/*      1 */
    262        1.1  hamajima 	0x00148000	/*      2 */
    263        1.1  hamajima };
    264        1.1  hamajima static const u_int udma_timing_kauai[] = {	/* 0x0000ffff */
    265        1.1  hamajima 	0x000070c0,	/* Mode 0 */
    266        1.1  hamajima 	0x00005d80,	/*      1 */
    267        1.1  hamajima 	0x00004a60,	/*      2 */
    268        1.1  hamajima 	0x00003a50,	/*      3 */
    269        1.1  hamajima 	0x00002a30,	/*      4 */
    270        1.1  hamajima 	0x00002921	/*      5 */
    271        1.1  hamajima };
    272        1.1  hamajima 
    273        1.1  hamajima /*
    274        1.1  hamajima  * Timing calculation for Kauai.
    275        1.1  hamajima  */
    276        1.1  hamajima void
    277       1.22      matt calc_timing_kauai(struct kauai_softc *sc, int drive)
    278        1.1  hamajima {
    279       1.15   thorpej 	struct ata_channel *chp = &sc->sc_channel;
    280        1.1  hamajima 	struct ata_drive_datas *drvp = &chp->ch_drive[drive];
    281        1.1  hamajima 	int piomode = drvp->PIO_mode;
    282        1.1  hamajima 	int dmamode = drvp->DMA_mode;
    283        1.1  hamajima 	int udmamode = drvp->UDMA_mode;
    284        1.1  hamajima 	u_int pioconf, dmaconf;
    285        1.1  hamajima 
    286        1.1  hamajima 	pioconf = pio_timing_kauai[piomode];
    287        1.1  hamajima 
    288        1.1  hamajima 	dmaconf = 0;
    289       1.33    bouyer 	if (drvp->drive_flags & ATA_DRIVE_DMA)
    290        1.1  hamajima 		dmaconf |= dma_timing_kauai[dmamode];
    291       1.33    bouyer 	if (drvp->drive_flags & ATA_DRIVE_UDMA)
    292        1.1  hamajima 		dmaconf |= udma_timing_kauai[udmamode];
    293        1.1  hamajima 
    294       1.33    bouyer 	if (drvp->drive_flags & ATA_DRIVE_UDMA)
    295        1.1  hamajima 		dmaconf |= 1;
    296        1.1  hamajima 
    297        1.1  hamajima 	sc->sc_piotiming_r[drive] = sc->sc_piotiming_w[drive] = pioconf;
    298        1.1  hamajima 	sc->sc_dmatiming_r[drive] = sc->sc_dmatiming_w[drive] = dmaconf;
    299        1.1  hamajima }
    300        1.1  hamajima 
    301        1.1  hamajima int
    302       1.22      matt kauai_dma_init(void *v, int channel, int drive, void *databuf,
    303       1.22      matt 	size_t datalen, int flags)
    304        1.1  hamajima {
    305        1.1  hamajima 	struct kauai_softc *sc = v;
    306        1.1  hamajima 	dbdma_command_t *cmdp = sc->sc_dmacmd;
    307       1.15   thorpej 	struct ata_channel *chp = &sc->sc_channel;
    308       1.16   thorpej 	struct wdc_regs *wdr = CHAN_TO_WDC_REGS(chp);
    309        1.1  hamajima 	vaddr_t va = (vaddr_t)databuf;
    310        1.1  hamajima 	int read = flags & WDC_DMA_READ;
    311        1.1  hamajima 	int cmd = read ? DBDMA_CMD_IN_MORE : DBDMA_CMD_OUT_MORE;
    312        1.1  hamajima 	u_int offset;
    313        1.1  hamajima 
    314       1.15   thorpej 	bus_space_write_4(wdr->cmd_iot, wdr->cmd_baseioh, DMA_CONFIG_REG,
    315        1.1  hamajima 	    read ? sc->sc_dmatiming_r[drive] : sc->sc_dmatiming_w[drive]);
    316       1.15   thorpej 	bus_space_read_4(wdr->cmd_iot, wdr->cmd_baseioh, DMA_CONFIG_REG);
    317        1.1  hamajima 
    318        1.1  hamajima 	offset = va & PGOFSET;
    319        1.1  hamajima 
    320        1.1  hamajima 	/* if va is not page-aligned, setup the first page */
    321        1.1  hamajima 	if (offset != 0) {
    322        1.1  hamajima 		int rest = PAGE_SIZE - offset;	/* the rest of the page */
    323        1.1  hamajima 
    324        1.1  hamajima 		if (datalen > rest) {		/* if continues to next page */
    325        1.1  hamajima 			DBDMA_BUILD(cmdp, cmd, 0, rest, vtophys(va),
    326        1.1  hamajima 				DBDMA_INT_NEVER, DBDMA_WAIT_NEVER,
    327        1.1  hamajima 				DBDMA_BRANCH_NEVER);
    328        1.1  hamajima 			datalen -= rest;
    329        1.1  hamajima 			va += rest;
    330        1.1  hamajima 			cmdp++;
    331        1.1  hamajima 		}
    332        1.1  hamajima 	}
    333        1.1  hamajima 
    334        1.1  hamajima 	/* now va is page-aligned */
    335        1.1  hamajima 	while (datalen > PAGE_SIZE) {
    336        1.1  hamajima 		DBDMA_BUILD(cmdp, cmd, 0, PAGE_SIZE, vtophys(va),
    337        1.1  hamajima 			DBDMA_INT_NEVER, DBDMA_WAIT_NEVER, DBDMA_BRANCH_NEVER);
    338        1.1  hamajima 		datalen -= PAGE_SIZE;
    339        1.1  hamajima 		va += PAGE_SIZE;
    340        1.1  hamajima 		cmdp++;
    341        1.1  hamajima 	}
    342        1.1  hamajima 
    343        1.1  hamajima 	/* the last page (datalen <= PAGE_SIZE here) */
    344        1.1  hamajima 	cmd = read ? DBDMA_CMD_IN_LAST : DBDMA_CMD_OUT_LAST;
    345        1.1  hamajima 	DBDMA_BUILD(cmdp, cmd, 0, datalen, vtophys(va),
    346        1.1  hamajima 		DBDMA_INT_NEVER, DBDMA_WAIT_NEVER, DBDMA_BRANCH_NEVER);
    347        1.1  hamajima 	cmdp++;
    348        1.1  hamajima 
    349        1.1  hamajima 	DBDMA_BUILD(cmdp, DBDMA_CMD_STOP, 0, 0, 0,
    350        1.1  hamajima 		DBDMA_INT_NEVER, DBDMA_WAIT_NEVER, DBDMA_BRANCH_NEVER);
    351        1.1  hamajima 
    352        1.1  hamajima 	return 0;
    353        1.1  hamajima }
    354        1.1  hamajima 
    355        1.1  hamajima void
    356       1.22      matt kauai_dma_start(void *v, int channel, int drive)
    357        1.1  hamajima {
    358        1.1  hamajima 	struct kauai_softc *sc = v;
    359        1.1  hamajima 
    360        1.1  hamajima 	dbdma_start(sc->sc_dmareg, sc->sc_dmacmd);
    361        1.1  hamajima }
    362        1.1  hamajima 
    363        1.1  hamajima int
    364       1.22      matt kauai_dma_finish(void *v, int channel, int drive, int read)
    365        1.1  hamajima {
    366        1.1  hamajima 	struct kauai_softc *sc = v;
    367        1.1  hamajima 
    368        1.1  hamajima 	dbdma_stop(sc->sc_dmareg);
    369        1.1  hamajima 	return 0;
    370        1.1  hamajima }
    371