kauai.c revision 1.6 1 1.6 bouyer /* $NetBSD: kauai.c,v 1.6 2003/10/08 11:12:36 bouyer Exp $ */
2 1.1 hamajima
3 1.1 hamajima /*-
4 1.1 hamajima * Copyright (c) 2003 Tsubai Masanari. All rights reserved.
5 1.1 hamajima *
6 1.1 hamajima * Redistribution and use in source and binary forms, with or without
7 1.1 hamajima * modification, are permitted provided that the following conditions
8 1.1 hamajima * are met:
9 1.1 hamajima * 1. Redistributions of source code must retain the above copyright
10 1.1 hamajima * notice, this list of conditions and the following disclaimer.
11 1.1 hamajima * 2. Redistributions in binary form must reproduce the above copyright
12 1.1 hamajima * notice, this list of conditions and the following disclaimer in the
13 1.1 hamajima * documentation and/or other materials provided with the distribution.
14 1.1 hamajima * 3. The name of the author may not be used to endorse or promote products
15 1.1 hamajima * derived from this software without specific prior written permission.
16 1.1 hamajima *
17 1.1 hamajima * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
18 1.1 hamajima * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
19 1.1 hamajima * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
20 1.1 hamajima * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
21 1.1 hamajima * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
22 1.1 hamajima * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23 1.1 hamajima * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24 1.1 hamajima * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25 1.1 hamajima * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
26 1.1 hamajima * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27 1.1 hamajima */
28 1.2 lukem
29 1.2 lukem #include <sys/cdefs.h>
30 1.6 bouyer __KERNEL_RCSID(0, "$NetBSD: kauai.c,v 1.6 2003/10/08 11:12:36 bouyer Exp $");
31 1.1 hamajima
32 1.1 hamajima #include <sys/param.h>
33 1.1 hamajima #include <sys/systm.h>
34 1.1 hamajima #include <sys/device.h>
35 1.1 hamajima #include <sys/malloc.h>
36 1.1 hamajima
37 1.1 hamajima #include <uvm/uvm_extern.h>
38 1.1 hamajima
39 1.1 hamajima #include <machine/bus.h>
40 1.1 hamajima
41 1.1 hamajima #include <dev/ata/atareg.h>
42 1.1 hamajima #include <dev/ata/atavar.h>
43 1.1 hamajima #include <dev/ic/wdcvar.h>
44 1.1 hamajima
45 1.1 hamajima #include <dev/ofw/openfirm.h>
46 1.1 hamajima
47 1.1 hamajima #include <dev/pci/pcivar.h>
48 1.1 hamajima #include <dev/pci/pcireg.h>
49 1.1 hamajima #include <dev/pci/pcidevs.h>
50 1.1 hamajima
51 1.1 hamajima #include <macppc/dev/dbdma.h>
52 1.1 hamajima
53 1.1 hamajima #define WDC_REG_NPORTS 8
54 1.1 hamajima #define WDC_AUXREG_OFFSET 0x16
55 1.1 hamajima
56 1.1 hamajima #define PIO_CONFIG_REG (0x200 >> 4) /* PIO and DMA access timing */
57 1.1 hamajima #define DMA_CONFIG_REG (0x210 >> 4) /* UDMA access timing */
58 1.1 hamajima
59 1.1 hamajima struct kauai_softc {
60 1.1 hamajima struct wdc_softc sc_wdcdev;
61 1.1 hamajima struct channel_softc *wdc_chanptr;
62 1.1 hamajima struct channel_softc wdc_channel;
63 1.1 hamajima struct channel_queue wdc_queue;
64 1.1 hamajima dbdma_regmap_t *sc_dmareg;
65 1.1 hamajima dbdma_command_t *sc_dmacmd;
66 1.1 hamajima u_int sc_piotiming_r[2];
67 1.1 hamajima u_int sc_piotiming_w[2];
68 1.1 hamajima u_int sc_dmatiming_r[2];
69 1.1 hamajima u_int sc_dmatiming_w[2];
70 1.1 hamajima void (*sc_calc_timing)(struct kauai_softc *, int);
71 1.1 hamajima };
72 1.1 hamajima
73 1.1 hamajima int kauai_match __P((struct device *, struct cfdata *, void *));
74 1.1 hamajima void kauai_attach __P((struct device *, struct device *, void *));
75 1.1 hamajima int kauai_dma_init __P((void *, int, int, void *, size_t, int));
76 1.1 hamajima void kauai_dma_start __P((void *, int, int));
77 1.1 hamajima int kauai_dma_finish __P((void *, int, int, int));
78 1.1 hamajima void kauai_set_modes __P((struct channel_softc *));
79 1.1 hamajima static void calc_timing_kauai __P((struct kauai_softc *, int));
80 1.1 hamajima static int getnodebypci(pci_chipset_tag_t, pcitag_t);
81 1.1 hamajima
82 1.1 hamajima CFATTACH_DECL(kauai, sizeof(struct kauai_softc),
83 1.1 hamajima kauai_match, kauai_attach, NULL, wdcactivate);
84 1.1 hamajima
85 1.1 hamajima int
86 1.1 hamajima kauai_match(parent, match, aux)
87 1.1 hamajima struct device *parent;
88 1.1 hamajima struct cfdata *match;
89 1.1 hamajima void *aux;
90 1.1 hamajima {
91 1.1 hamajima struct pci_attach_args *pa = aux;
92 1.1 hamajima
93 1.1 hamajima if (PCI_VENDOR(pa->pa_id) == PCI_VENDOR_APPLE &&
94 1.3 chs (PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_APPLE_KAUAI ||
95 1.3 chs PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_APPLE_UNINORTH_ATA))
96 1.1 hamajima return 5;
97 1.1 hamajima
98 1.1 hamajima return 0;
99 1.1 hamajima }
100 1.1 hamajima
101 1.1 hamajima void
102 1.1 hamajima kauai_attach(parent, self, aux)
103 1.1 hamajima struct device *parent, *self;
104 1.1 hamajima void *aux;
105 1.1 hamajima {
106 1.1 hamajima struct kauai_softc *sc = (void *)self;
107 1.1 hamajima struct pci_attach_args *pa = aux;
108 1.1 hamajima struct channel_softc *chp = &sc->wdc_channel;
109 1.1 hamajima pci_intr_handle_t ih;
110 1.1 hamajima paddr_t regbase, dmabase;
111 1.1 hamajima int node, reg[5];
112 1.1 hamajima
113 1.1 hamajima #ifdef DIAGNOSTIC
114 1.1 hamajima if ((vaddr_t)sc->sc_dmacmd & 0x0f) {
115 1.1 hamajima printf(": bad dbdma alignment\n");
116 1.1 hamajima return;
117 1.1 hamajima }
118 1.1 hamajima #endif
119 1.1 hamajima
120 1.1 hamajima node = getnodebypci(pa->pa_pc, pa->pa_tag);
121 1.1 hamajima if (node == 0) {
122 1.1 hamajima printf(": cannot find gmac node\n");
123 1.1 hamajima return;
124 1.1 hamajima }
125 1.1 hamajima
126 1.1 hamajima if (OF_getprop(node, "assigned-addresses", reg, sizeof reg) < 12) {
127 1.1 hamajima printf(": cannot get address property\n");
128 1.1 hamajima return;
129 1.1 hamajima }
130 1.1 hamajima regbase = reg[2] + 0x2000;
131 1.1 hamajima dmabase = reg[2] + 0x1000;
132 1.1 hamajima
133 1.1 hamajima /*
134 1.1 hamajima * XXX PCI_INTERRUPT_REG seems to be wired to 0.
135 1.1 hamajima * XXX So use fixed intrpin and intrline values.
136 1.1 hamajima */
137 1.1 hamajima if (pci_conf_read(pa->pa_pc, pa->pa_tag, PCI_INTERRUPT_REG) == 0) {
138 1.1 hamajima pa->pa_intrpin = 1;
139 1.1 hamajima pa->pa_intrline = 39;
140 1.1 hamajima }
141 1.1 hamajima
142 1.1 hamajima if (pci_intr_map(pa, &ih)) {
143 1.1 hamajima printf(": unable to map interrupt\n");
144 1.1 hamajima return;
145 1.1 hamajima }
146 1.1 hamajima printf(": interrupting at %s\n", pci_intr_string(pa->pa_pc, ih));
147 1.1 hamajima
148 1.1 hamajima chp->cmd_iot = chp->ctl_iot = macppc_make_bus_space_tag(regbase, 4);
149 1.1 hamajima
150 1.1 hamajima if (bus_space_map(chp->cmd_iot, 0, WDC_REG_NPORTS, 0, &chp->cmd_ioh) ||
151 1.1 hamajima bus_space_subregion(chp->cmd_iot, chp->cmd_ioh,
152 1.1 hamajima WDC_AUXREG_OFFSET, 1, &chp->ctl_ioh)) {
153 1.1 hamajima printf("%s: couldn't map registers\n", self->dv_xname);
154 1.1 hamajima return;
155 1.1 hamajima }
156 1.1 hamajima
157 1.1 hamajima if (pci_intr_establish(pa->pa_pc, ih, IPL_BIO, wdcintr, chp) == NULL) {
158 1.1 hamajima printf("%s: unable to establish interrupt\n", self->dv_xname);
159 1.1 hamajima return;
160 1.1 hamajima }
161 1.1 hamajima
162 1.1 hamajima
163 1.1 hamajima sc->sc_wdcdev.PIO_cap = 4;
164 1.1 hamajima sc->sc_wdcdev.DMA_cap = 2;
165 1.1 hamajima sc->sc_wdcdev.UDMA_cap = 5;
166 1.1 hamajima sc->sc_wdcdev.cap |= WDC_CAPABILITY_DATA16 | WDC_CAPABILITY_MODE;
167 1.1 hamajima sc->sc_wdcdev.cap |= WDC_CAPABILITY_DMA | WDC_CAPABILITY_UDMA;
168 1.1 hamajima sc->wdc_chanptr = chp;
169 1.1 hamajima sc->sc_wdcdev.channels = &sc->wdc_chanptr;
170 1.1 hamajima sc->sc_wdcdev.nchannels = 1;
171 1.1 hamajima sc->sc_wdcdev.dma_arg = sc;
172 1.1 hamajima sc->sc_wdcdev.dma_init = kauai_dma_init;
173 1.1 hamajima sc->sc_wdcdev.dma_start = kauai_dma_start;
174 1.1 hamajima sc->sc_wdcdev.dma_finish = kauai_dma_finish;
175 1.1 hamajima sc->sc_wdcdev.set_modes = kauai_set_modes;
176 1.1 hamajima sc->sc_calc_timing = calc_timing_kauai;
177 1.1 hamajima sc->sc_dmareg = (void *)dmabase;
178 1.1 hamajima
179 1.1 hamajima chp->channel = 0;
180 1.1 hamajima chp->wdc = &sc->sc_wdcdev;
181 1.1 hamajima chp->ch_queue = &sc->wdc_queue;
182 1.1 hamajima
183 1.6 bouyer wdcattach(chp);
184 1.1 hamajima }
185 1.1 hamajima
186 1.1 hamajima void
187 1.1 hamajima kauai_set_modes(chp)
188 1.1 hamajima struct channel_softc *chp;
189 1.1 hamajima {
190 1.1 hamajima struct kauai_softc *sc = (void *)chp->wdc;
191 1.1 hamajima struct ata_drive_datas *drvp0 = &chp->ch_drive[0];
192 1.1 hamajima struct ata_drive_datas *drvp1 = &chp->ch_drive[1];
193 1.1 hamajima struct ata_drive_datas *drvp;
194 1.1 hamajima int drive;
195 1.1 hamajima
196 1.1 hamajima if ((drvp0->drive_flags & DRIVE) && (drvp1->drive_flags & DRIVE)) {
197 1.1 hamajima drvp0->PIO_mode = drvp1->PIO_mode =
198 1.1 hamajima min(drvp0->PIO_mode, drvp1->PIO_mode);
199 1.1 hamajima }
200 1.1 hamajima
201 1.1 hamajima for (drive = 0; drive < 2; drive++) {
202 1.1 hamajima drvp = &chp->ch_drive[drive];
203 1.1 hamajima if (drvp->drive_flags & DRIVE) {
204 1.1 hamajima (*sc->sc_calc_timing)(sc, drive);
205 1.1 hamajima bus_space_write_4(chp->cmd_iot, chp->cmd_ioh,
206 1.1 hamajima PIO_CONFIG_REG, sc->sc_piotiming_r[drive]);
207 1.1 hamajima bus_space_write_4(chp->cmd_iot, chp->cmd_ioh,
208 1.1 hamajima DMA_CONFIG_REG, sc->sc_dmatiming_r[drive]);
209 1.1 hamajima }
210 1.1 hamajima }
211 1.1 hamajima }
212 1.1 hamajima
213 1.1 hamajima /*
214 1.1 hamajima * IDE transfer timings
215 1.1 hamajima */
216 1.1 hamajima static const u_int pio_timing_kauai[] = { /* 0xff000fff */
217 1.1 hamajima 0x08000a92, /* Mode 0 */
218 1.1 hamajima 0x0800060f, /* 1 */
219 1.1 hamajima 0x0800038b, /* 2 */
220 1.1 hamajima 0x05000249, /* 3 */
221 1.1 hamajima 0x04000148 /* 4 */
222 1.1 hamajima };
223 1.1 hamajima static const u_int dma_timing_kauai[] = { /* 0x00fff000 */
224 1.1 hamajima 0x00618000, /* Mode 0 */
225 1.1 hamajima 0x00209000, /* 1 */
226 1.1 hamajima 0x00148000 /* 2 */
227 1.1 hamajima };
228 1.1 hamajima static const u_int udma_timing_kauai[] = { /* 0x0000ffff */
229 1.1 hamajima 0x000070c0, /* Mode 0 */
230 1.1 hamajima 0x00005d80, /* 1 */
231 1.1 hamajima 0x00004a60, /* 2 */
232 1.1 hamajima 0x00003a50, /* 3 */
233 1.1 hamajima 0x00002a30, /* 4 */
234 1.1 hamajima 0x00002921 /* 5 */
235 1.1 hamajima };
236 1.1 hamajima
237 1.1 hamajima /*
238 1.1 hamajima * Timing calculation for Kauai.
239 1.1 hamajima */
240 1.1 hamajima void
241 1.1 hamajima calc_timing_kauai(sc, drive)
242 1.1 hamajima struct kauai_softc *sc;
243 1.1 hamajima int drive;
244 1.1 hamajima {
245 1.1 hamajima struct channel_softc *chp = &sc->wdc_channel;
246 1.1 hamajima struct ata_drive_datas *drvp = &chp->ch_drive[drive];
247 1.1 hamajima int piomode = drvp->PIO_mode;
248 1.1 hamajima int dmamode = drvp->DMA_mode;
249 1.1 hamajima int udmamode = drvp->UDMA_mode;
250 1.1 hamajima u_int pioconf, dmaconf;
251 1.1 hamajima
252 1.1 hamajima pioconf = pio_timing_kauai[piomode];
253 1.1 hamajima
254 1.1 hamajima dmaconf = 0;
255 1.1 hamajima if (drvp->drive_flags & DRIVE_DMA)
256 1.1 hamajima dmaconf |= dma_timing_kauai[dmamode];
257 1.1 hamajima if (drvp->drive_flags & DRIVE_UDMA)
258 1.1 hamajima dmaconf |= udma_timing_kauai[udmamode];
259 1.1 hamajima
260 1.1 hamajima if (drvp->drive_flags & DRIVE_UDMA)
261 1.1 hamajima dmaconf |= 1;
262 1.1 hamajima
263 1.1 hamajima sc->sc_piotiming_r[drive] = sc->sc_piotiming_w[drive] = pioconf;
264 1.1 hamajima sc->sc_dmatiming_r[drive] = sc->sc_dmatiming_w[drive] = dmaconf;
265 1.1 hamajima }
266 1.1 hamajima
267 1.1 hamajima int
268 1.1 hamajima kauai_dma_init(v, channel, drive, databuf, datalen, flags)
269 1.1 hamajima void *v;
270 1.1 hamajima void *databuf;
271 1.1 hamajima size_t datalen;
272 1.1 hamajima int flags;
273 1.1 hamajima {
274 1.1 hamajima struct kauai_softc *sc = v;
275 1.1 hamajima dbdma_command_t *cmdp = sc->sc_dmacmd;
276 1.1 hamajima struct channel_softc *chp = &sc->wdc_channel;
277 1.1 hamajima vaddr_t va = (vaddr_t)databuf;
278 1.1 hamajima int read = flags & WDC_DMA_READ;
279 1.1 hamajima int cmd = read ? DBDMA_CMD_IN_MORE : DBDMA_CMD_OUT_MORE;
280 1.1 hamajima u_int offset;
281 1.1 hamajima
282 1.1 hamajima bus_space_write_4(chp->cmd_iot, chp->cmd_ioh, DMA_CONFIG_REG,
283 1.1 hamajima read ? sc->sc_dmatiming_r[drive] : sc->sc_dmatiming_w[drive]);
284 1.1 hamajima bus_space_read_4(chp->cmd_iot, chp->cmd_ioh, DMA_CONFIG_REG);
285 1.1 hamajima
286 1.1 hamajima offset = va & PGOFSET;
287 1.1 hamajima
288 1.1 hamajima /* if va is not page-aligned, setup the first page */
289 1.1 hamajima if (offset != 0) {
290 1.1 hamajima int rest = PAGE_SIZE - offset; /* the rest of the page */
291 1.1 hamajima
292 1.1 hamajima if (datalen > rest) { /* if continues to next page */
293 1.1 hamajima DBDMA_BUILD(cmdp, cmd, 0, rest, vtophys(va),
294 1.1 hamajima DBDMA_INT_NEVER, DBDMA_WAIT_NEVER,
295 1.1 hamajima DBDMA_BRANCH_NEVER);
296 1.1 hamajima datalen -= rest;
297 1.1 hamajima va += rest;
298 1.1 hamajima cmdp++;
299 1.1 hamajima }
300 1.1 hamajima }
301 1.1 hamajima
302 1.1 hamajima /* now va is page-aligned */
303 1.1 hamajima while (datalen > PAGE_SIZE) {
304 1.1 hamajima DBDMA_BUILD(cmdp, cmd, 0, PAGE_SIZE, vtophys(va),
305 1.1 hamajima DBDMA_INT_NEVER, DBDMA_WAIT_NEVER, DBDMA_BRANCH_NEVER);
306 1.1 hamajima datalen -= PAGE_SIZE;
307 1.1 hamajima va += PAGE_SIZE;
308 1.1 hamajima cmdp++;
309 1.1 hamajima }
310 1.1 hamajima
311 1.1 hamajima /* the last page (datalen <= PAGE_SIZE here) */
312 1.1 hamajima cmd = read ? DBDMA_CMD_IN_LAST : DBDMA_CMD_OUT_LAST;
313 1.1 hamajima DBDMA_BUILD(cmdp, cmd, 0, datalen, vtophys(va),
314 1.1 hamajima DBDMA_INT_NEVER, DBDMA_WAIT_NEVER, DBDMA_BRANCH_NEVER);
315 1.1 hamajima cmdp++;
316 1.1 hamajima
317 1.1 hamajima DBDMA_BUILD(cmdp, DBDMA_CMD_STOP, 0, 0, 0,
318 1.1 hamajima DBDMA_INT_NEVER, DBDMA_WAIT_NEVER, DBDMA_BRANCH_NEVER);
319 1.1 hamajima
320 1.1 hamajima return 0;
321 1.1 hamajima }
322 1.1 hamajima
323 1.1 hamajima void
324 1.1 hamajima kauai_dma_start(v, channel, drive)
325 1.1 hamajima void *v;
326 1.1 hamajima int channel, drive;
327 1.1 hamajima {
328 1.1 hamajima struct kauai_softc *sc = v;
329 1.1 hamajima
330 1.1 hamajima dbdma_start(sc->sc_dmareg, sc->sc_dmacmd);
331 1.1 hamajima }
332 1.1 hamajima
333 1.1 hamajima int
334 1.1 hamajima kauai_dma_finish(v, channel, drive, read)
335 1.1 hamajima void *v;
336 1.1 hamajima int channel, drive;
337 1.1 hamajima int read;
338 1.1 hamajima {
339 1.1 hamajima struct kauai_softc *sc = v;
340 1.1 hamajima
341 1.1 hamajima dbdma_stop(sc->sc_dmareg);
342 1.1 hamajima return 0;
343 1.1 hamajima }
344 1.1 hamajima
345 1.1 hamajima /*
346 1.1 hamajima * Find OF-device corresponding to the PCI device.
347 1.1 hamajima */
348 1.1 hamajima int
349 1.1 hamajima getnodebypci(pc, tag)
350 1.1 hamajima pci_chipset_tag_t pc;
351 1.1 hamajima pcitag_t tag;
352 1.1 hamajima {
353 1.1 hamajima int bus, dev, func;
354 1.1 hamajima u_int reg[5];
355 1.1 hamajima int p, q;
356 1.1 hamajima int l, b, d, f;
357 1.1 hamajima
358 1.1 hamajima pci_decompose_tag(pc, tag, &bus, &dev, &func);
359 1.1 hamajima
360 1.1 hamajima for (q = OF_peer(0); q; q = p) {
361 1.1 hamajima l = OF_getprop(q, "assigned-addresses", reg, sizeof(reg));
362 1.1 hamajima if (l > 4) {
363 1.1 hamajima b = (reg[0] >> 16) & 0xff;
364 1.1 hamajima d = (reg[0] >> 11) & 0x1f;
365 1.1 hamajima f = (reg[0] >> 8) & 0x07;
366 1.1 hamajima
367 1.1 hamajima if (b == bus && d == dev && f == func)
368 1.1 hamajima return q;
369 1.1 hamajima }
370 1.1 hamajima if ((p = OF_child(q)))
371 1.1 hamajima continue;
372 1.1 hamajima while (q) {
373 1.1 hamajima if ((p = OF_peer(q)))
374 1.1 hamajima break;
375 1.1 hamajima q = OF_parent(q);
376 1.1 hamajima }
377 1.1 hamajima }
378 1.1 hamajima return 0;
379 1.1 hamajima }
380