kauai.c revision 1.19
1 /* $NetBSD: kauai.c,v 1.19 2006/01/16 20:30:19 bouyer Exp $ */ 2 3 /*- 4 * Copyright (c) 2003 Tsubai Masanari. All rights reserved. 5 * 6 * Redistribution and use in source and binary forms, with or without 7 * modification, are permitted provided that the following conditions 8 * are met: 9 * 1. Redistributions of source code must retain the above copyright 10 * notice, this list of conditions and the following disclaimer. 11 * 2. Redistributions in binary form must reproduce the above copyright 12 * notice, this list of conditions and the following disclaimer in the 13 * documentation and/or other materials provided with the distribution. 14 * 3. The name of the author may not be used to endorse or promote products 15 * derived from this software without specific prior written permission. 16 * 17 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 18 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 19 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 20 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 21 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 22 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 26 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 27 */ 28 29 #include <sys/cdefs.h> 30 __KERNEL_RCSID(0, "$NetBSD: kauai.c,v 1.19 2006/01/16 20:30:19 bouyer Exp $"); 31 32 #include <sys/param.h> 33 #include <sys/systm.h> 34 #include <sys/device.h> 35 #include <sys/malloc.h> 36 37 #include <uvm/uvm_extern.h> 38 39 #include <machine/bus.h> 40 41 #include <dev/ata/atareg.h> 42 #include <dev/ata/atavar.h> 43 #include <dev/ic/wdcvar.h> 44 45 #include <dev/ofw/openfirm.h> 46 47 #include <dev/pci/pcivar.h> 48 #include <dev/pci/pcireg.h> 49 #include <dev/pci/pcidevs.h> 50 51 #include <macppc/dev/dbdma.h> 52 53 #define WDC_REG_NPORTS 8 54 #define WDC_AUXREG_OFFSET 0x16 55 56 #define PIO_CONFIG_REG (0x200 >> 4) /* PIO and DMA access timing */ 57 #define DMA_CONFIG_REG (0x210 >> 4) /* UDMA access timing */ 58 59 struct kauai_softc { 60 struct wdc_softc sc_wdcdev; 61 struct ata_channel *sc_chanptr; 62 struct ata_channel sc_channel; 63 struct wdc_regs sc_wdc_regs; 64 struct ata_queue sc_queue; 65 dbdma_regmap_t *sc_dmareg; 66 dbdma_command_t *sc_dmacmd; 67 u_int sc_piotiming_r[2]; 68 u_int sc_piotiming_w[2]; 69 u_int sc_dmatiming_r[2]; 70 u_int sc_dmatiming_w[2]; 71 void (*sc_calc_timing)(struct kauai_softc *, int); 72 }; 73 74 int kauai_match __P((struct device *, struct cfdata *, void *)); 75 void kauai_attach __P((struct device *, struct device *, void *)); 76 int kauai_dma_init __P((void *, int, int, void *, size_t, int)); 77 void kauai_dma_start __P((void *, int, int)); 78 int kauai_dma_finish __P((void *, int, int, int)); 79 void kauai_set_modes __P((struct ata_channel *)); 80 static void calc_timing_kauai __P((struct kauai_softc *, int)); 81 static int getnodebypci(pci_chipset_tag_t, pcitag_t); 82 83 CFATTACH_DECL(kauai, sizeof(struct kauai_softc), 84 kauai_match, kauai_attach, NULL, wdcactivate); 85 86 int 87 kauai_match(parent, match, aux) 88 struct device *parent; 89 struct cfdata *match; 90 void *aux; 91 { 92 struct pci_attach_args *pa = aux; 93 94 if (PCI_VENDOR(pa->pa_id) == PCI_VENDOR_APPLE && 95 (PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_APPLE_KAUAI || 96 PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_APPLE_UNINORTH_ATA)) 97 return 5; 98 99 return 0; 100 } 101 102 void 103 kauai_attach(parent, self, aux) 104 struct device *parent, *self; 105 void *aux; 106 { 107 struct kauai_softc *sc = (void *)self; 108 struct pci_attach_args *pa = aux; 109 struct ata_channel *chp = &sc->sc_channel; 110 struct wdc_regs *wdr; 111 pci_intr_handle_t ih; 112 paddr_t regbase, dmabase; 113 int node, reg[5], i; 114 115 #ifdef DIAGNOSTIC 116 if ((vaddr_t)sc->sc_dmacmd & 0x0f) { 117 printf(": bad dbdma alignment\n"); 118 return; 119 } 120 #endif 121 122 node = getnodebypci(pa->pa_pc, pa->pa_tag); 123 if (node == 0) { 124 printf(": cannot find gmac node\n"); 125 return; 126 } 127 128 if (OF_getprop(node, "assigned-addresses", reg, sizeof reg) < 12) { 129 printf(": cannot get address property\n"); 130 return; 131 } 132 regbase = reg[2] + 0x2000; 133 dmabase = reg[2] + 0x1000; 134 135 /* 136 * XXX PCI_INTERRUPT_REG seems to be wired to 0. 137 * XXX So use fixed intrpin and intrline values. 138 */ 139 if (pci_conf_read(pa->pa_pc, pa->pa_tag, PCI_INTERRUPT_REG) == 0) { 140 pa->pa_intrpin = 1; 141 pa->pa_intrline = 39; 142 } 143 144 if (pci_intr_map(pa, &ih)) { 145 printf(": unable to map interrupt\n"); 146 return; 147 } 148 printf(": interrupting at %s\n", pci_intr_string(pa->pa_pc, ih)); 149 150 sc->sc_wdcdev.regs = wdr = &sc->sc_wdc_regs; 151 152 wdr->cmd_iot = wdr->ctl_iot = macppc_make_bus_space_tag(regbase, 4); 153 154 if (bus_space_map(wdr->cmd_iot, 0, WDC_REG_NPORTS, 0, 155 &wdr->cmd_baseioh) || 156 bus_space_subregion(wdr->cmd_iot, wdr->cmd_baseioh, 157 WDC_AUXREG_OFFSET, 1, &wdr->ctl_ioh)) { 158 printf("%s: couldn't map registers\n", self->dv_xname); 159 return; 160 } 161 for (i = 0; i < WDC_NREG; i++) { 162 if (bus_space_subregion(wdr->cmd_iot, wdr->cmd_baseioh, i, 163 i == 0 ? 4 : 1, &wdr->cmd_iohs[i]) != 0) { 164 bus_space_unmap(wdr->cmd_iot, wdr->cmd_baseioh, 165 WDC_REG_NPORTS); 166 printf("%s: couldn't subregion registers\n", 167 sc->sc_wdcdev.sc_atac.atac_dev.dv_xname); 168 return; 169 } 170 } 171 172 if (pci_intr_establish(pa->pa_pc, ih, IPL_BIO, wdcintr, chp) == NULL) { 173 printf("%s: unable to establish interrupt\n", self->dv_xname); 174 return; 175 } 176 177 178 sc->sc_wdcdev.sc_atac.atac_pio_cap = 4; 179 sc->sc_wdcdev.sc_atac.atac_dma_cap = 2; 180 sc->sc_wdcdev.sc_atac.atac_udma_cap = 5; 181 sc->sc_wdcdev.sc_atac.atac_cap |= ATAC_CAP_DATA16; 182 sc->sc_wdcdev.sc_atac.atac_cap |= ATAC_CAP_DMA | ATAC_CAP_UDMA; 183 sc->sc_chanptr = chp; 184 sc->sc_wdcdev.sc_atac.atac_channels = &sc->sc_chanptr; 185 sc->sc_wdcdev.sc_atac.atac_nchannels = 1; 186 sc->sc_wdcdev.dma_arg = sc; 187 sc->sc_wdcdev.dma_init = kauai_dma_init; 188 sc->sc_wdcdev.dma_start = kauai_dma_start; 189 sc->sc_wdcdev.dma_finish = kauai_dma_finish; 190 sc->sc_wdcdev.sc_atac.atac_set_modes = kauai_set_modes; 191 sc->sc_calc_timing = calc_timing_kauai; 192 sc->sc_dmareg = (void *)dmabase; 193 194 chp->ch_channel = 0; 195 chp->ch_atac = &sc->sc_wdcdev.sc_atac; 196 chp->ch_queue = &sc->sc_queue; 197 chp->ch_ndrive = 2; 198 wdc_init_shadow_regs(chp); 199 200 wdcattach(chp); 201 } 202 203 void 204 kauai_set_modes(chp) 205 struct ata_channel *chp; 206 { 207 struct kauai_softc *sc = (void *)chp->ch_atac; 208 struct wdc_regs *wdr = CHAN_TO_WDC_REGS(chp); 209 struct ata_drive_datas *drvp0 = &chp->ch_drive[0]; 210 struct ata_drive_datas *drvp1 = &chp->ch_drive[1]; 211 struct ata_drive_datas *drvp; 212 int drive; 213 214 if ((drvp0->drive_flags & DRIVE) && (drvp1->drive_flags & DRIVE)) { 215 drvp0->PIO_mode = drvp1->PIO_mode = 216 min(drvp0->PIO_mode, drvp1->PIO_mode); 217 } 218 219 for (drive = 0; drive < 2; drive++) { 220 drvp = &chp->ch_drive[drive]; 221 if (drvp->drive_flags & DRIVE) { 222 (*sc->sc_calc_timing)(sc, drive); 223 bus_space_write_4(wdr->cmd_iot, wdr->cmd_baseioh, 224 PIO_CONFIG_REG, sc->sc_piotiming_r[drive]); 225 bus_space_write_4(wdr->cmd_iot, wdr->cmd_baseioh, 226 DMA_CONFIG_REG, sc->sc_dmatiming_r[drive]); 227 } 228 } 229 } 230 231 /* 232 * IDE transfer timings 233 */ 234 static const u_int pio_timing_kauai[] = { /* 0xff000fff */ 235 0x08000a92, /* Mode 0 */ 236 0x0800060f, /* 1 */ 237 0x0800038b, /* 2 */ 238 0x05000249, /* 3 */ 239 0x04000148 /* 4 */ 240 }; 241 static const u_int dma_timing_kauai[] = { /* 0x00fff000 */ 242 0x00618000, /* Mode 0 */ 243 0x00209000, /* 1 */ 244 0x00148000 /* 2 */ 245 }; 246 static const u_int udma_timing_kauai[] = { /* 0x0000ffff */ 247 0x000070c0, /* Mode 0 */ 248 0x00005d80, /* 1 */ 249 0x00004a60, /* 2 */ 250 0x00003a50, /* 3 */ 251 0x00002a30, /* 4 */ 252 0x00002921 /* 5 */ 253 }; 254 255 /* 256 * Timing calculation for Kauai. 257 */ 258 void 259 calc_timing_kauai(sc, drive) 260 struct kauai_softc *sc; 261 int drive; 262 { 263 struct ata_channel *chp = &sc->sc_channel; 264 struct ata_drive_datas *drvp = &chp->ch_drive[drive]; 265 int piomode = drvp->PIO_mode; 266 int dmamode = drvp->DMA_mode; 267 int udmamode = drvp->UDMA_mode; 268 u_int pioconf, dmaconf; 269 270 pioconf = pio_timing_kauai[piomode]; 271 272 dmaconf = 0; 273 if (drvp->drive_flags & DRIVE_DMA) 274 dmaconf |= dma_timing_kauai[dmamode]; 275 if (drvp->drive_flags & DRIVE_UDMA) 276 dmaconf |= udma_timing_kauai[udmamode]; 277 278 if (drvp->drive_flags & DRIVE_UDMA) 279 dmaconf |= 1; 280 281 sc->sc_piotiming_r[drive] = sc->sc_piotiming_w[drive] = pioconf; 282 sc->sc_dmatiming_r[drive] = sc->sc_dmatiming_w[drive] = dmaconf; 283 } 284 285 int 286 kauai_dma_init(v, channel, drive, databuf, datalen, flags) 287 void *v; 288 void *databuf; 289 size_t datalen; 290 int flags; 291 { 292 struct kauai_softc *sc = v; 293 dbdma_command_t *cmdp = sc->sc_dmacmd; 294 struct ata_channel *chp = &sc->sc_channel; 295 struct wdc_regs *wdr = CHAN_TO_WDC_REGS(chp); 296 vaddr_t va = (vaddr_t)databuf; 297 int read = flags & WDC_DMA_READ; 298 int cmd = read ? DBDMA_CMD_IN_MORE : DBDMA_CMD_OUT_MORE; 299 u_int offset; 300 301 bus_space_write_4(wdr->cmd_iot, wdr->cmd_baseioh, DMA_CONFIG_REG, 302 read ? sc->sc_dmatiming_r[drive] : sc->sc_dmatiming_w[drive]); 303 bus_space_read_4(wdr->cmd_iot, wdr->cmd_baseioh, DMA_CONFIG_REG); 304 305 offset = va & PGOFSET; 306 307 /* if va is not page-aligned, setup the first page */ 308 if (offset != 0) { 309 int rest = PAGE_SIZE - offset; /* the rest of the page */ 310 311 if (datalen > rest) { /* if continues to next page */ 312 DBDMA_BUILD(cmdp, cmd, 0, rest, vtophys(va), 313 DBDMA_INT_NEVER, DBDMA_WAIT_NEVER, 314 DBDMA_BRANCH_NEVER); 315 datalen -= rest; 316 va += rest; 317 cmdp++; 318 } 319 } 320 321 /* now va is page-aligned */ 322 while (datalen > PAGE_SIZE) { 323 DBDMA_BUILD(cmdp, cmd, 0, PAGE_SIZE, vtophys(va), 324 DBDMA_INT_NEVER, DBDMA_WAIT_NEVER, DBDMA_BRANCH_NEVER); 325 datalen -= PAGE_SIZE; 326 va += PAGE_SIZE; 327 cmdp++; 328 } 329 330 /* the last page (datalen <= PAGE_SIZE here) */ 331 cmd = read ? DBDMA_CMD_IN_LAST : DBDMA_CMD_OUT_LAST; 332 DBDMA_BUILD(cmdp, cmd, 0, datalen, vtophys(va), 333 DBDMA_INT_NEVER, DBDMA_WAIT_NEVER, DBDMA_BRANCH_NEVER); 334 cmdp++; 335 336 DBDMA_BUILD(cmdp, DBDMA_CMD_STOP, 0, 0, 0, 337 DBDMA_INT_NEVER, DBDMA_WAIT_NEVER, DBDMA_BRANCH_NEVER); 338 339 return 0; 340 } 341 342 void 343 kauai_dma_start(v, channel, drive) 344 void *v; 345 int channel, drive; 346 { 347 struct kauai_softc *sc = v; 348 349 dbdma_start(sc->sc_dmareg, sc->sc_dmacmd); 350 } 351 352 int 353 kauai_dma_finish(v, channel, drive, read) 354 void *v; 355 int channel, drive; 356 int read; 357 { 358 struct kauai_softc *sc = v; 359 360 dbdma_stop(sc->sc_dmareg); 361 return 0; 362 } 363 364 /* 365 * Find OF-device corresponding to the PCI device. 366 */ 367 int 368 getnodebypci(pc, tag) 369 pci_chipset_tag_t pc; 370 pcitag_t tag; 371 { 372 int bus, dev, func; 373 u_int reg[5]; 374 int p, q; 375 int l, b, d, f; 376 377 pci_decompose_tag(pc, tag, &bus, &dev, &func); 378 379 for (q = OF_peer(0); q; q = p) { 380 l = OF_getprop(q, "assigned-addresses", reg, sizeof(reg)); 381 if (l > 4) { 382 b = (reg[0] >> 16) & 0xff; 383 d = (reg[0] >> 11) & 0x1f; 384 f = (reg[0] >> 8) & 0x07; 385 386 if (b == bus && d == dev && f == func) 387 return q; 388 } 389 if ((p = OF_child(q))) 390 continue; 391 while (q) { 392 if ((p = OF_peer(q))) 393 break; 394 q = OF_parent(q); 395 } 396 } 397 return 0; 398 } 399
Indexes created Fri Oct 03 02:09:57 GMT 2025