kauai.c revision 1.19.36.1
1 /* $NetBSD: kauai.c,v 1.19.36.1 2007/06/07 20:30:44 garbled Exp $ */ 2 3 /*- 4 * Copyright (c) 2003 Tsubai Masanari. All rights reserved. 5 * 6 * Redistribution and use in source and binary forms, with or without 7 * modification, are permitted provided that the following conditions 8 * are met: 9 * 1. Redistributions of source code must retain the above copyright 10 * notice, this list of conditions and the following disclaimer. 11 * 2. Redistributions in binary form must reproduce the above copyright 12 * notice, this list of conditions and the following disclaimer in the 13 * documentation and/or other materials provided with the distribution. 14 * 3. The name of the author may not be used to endorse or promote products 15 * derived from this software without specific prior written permission. 16 * 17 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 18 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 19 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 20 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 21 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 22 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 26 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 27 */ 28 29 #include <sys/cdefs.h> 30 __KERNEL_RCSID(0, "$NetBSD: kauai.c,v 1.19.36.1 2007/06/07 20:30:44 garbled Exp $"); 31 32 #include <sys/param.h> 33 #include <sys/systm.h> 34 #include <sys/device.h> 35 #include <sys/malloc.h> 36 37 #include <uvm/uvm_extern.h> 38 39 #include <machine/bus.h> 40 #include <machine/pio.h> 41 42 #include <dev/ata/atareg.h> 43 #include <dev/ata/atavar.h> 44 #include <dev/ic/wdcvar.h> 45 46 #include <dev/ofw/openfirm.h> 47 48 #include <dev/pci/pcivar.h> 49 #include <dev/pci/pcireg.h> 50 #include <dev/pci/pcidevs.h> 51 52 #include <macppc/dev/dbdma.h> 53 54 #define WDC_REG_NPORTS 8 55 #define WDC_AUXREG_OFFSET 0x16 56 #define WDC_AUXREG_NPORTS 1 57 58 #define PIO_CONFIG_REG (0x200 >> 4) /* PIO and DMA access timing */ 59 #define DMA_CONFIG_REG (0x210 >> 4) /* UDMA access timing */ 60 61 struct kauai_softc { 62 struct wdc_softc sc_wdcdev; 63 struct ata_channel *sc_chanptr; 64 struct ata_channel sc_channel; 65 struct wdc_regs sc_wdc_regs; 66 struct ata_queue sc_queue; 67 struct powerpc_bus_space sc_iot; 68 dbdma_regmap_t *sc_dmareg; 69 dbdma_command_t *sc_dmacmd; 70 u_int sc_piotiming_r[2]; 71 u_int sc_piotiming_w[2]; 72 u_int sc_dmatiming_r[2]; 73 u_int sc_dmatiming_w[2]; 74 void (*sc_calc_timing)(struct kauai_softc *, int); 75 }; 76 77 int kauai_match __P((struct device *, struct cfdata *, void *)); 78 void kauai_attach __P((struct device *, struct device *, void *)); 79 int kauai_dma_init __P((void *, int, int, void *, size_t, int)); 80 void kauai_dma_start __P((void *, int, int)); 81 int kauai_dma_finish __P((void *, int, int, int)); 82 void kauai_set_modes __P((struct ata_channel *)); 83 static void calc_timing_kauai __P((struct kauai_softc *, int)); 84 static int getnodebypci(pci_chipset_tag_t, pcitag_t); 85 86 CFATTACH_DECL(kauai, sizeof(struct kauai_softc), 87 kauai_match, kauai_attach, NULL, wdcactivate); 88 89 int 90 kauai_match(parent, match, aux) 91 struct device *parent; 92 struct cfdata *match; 93 void *aux; 94 { 95 struct pci_attach_args *pa = aux; 96 97 if (PCI_VENDOR(pa->pa_id) == PCI_VENDOR_APPLE && 98 (PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_APPLE_KAUAI || 99 PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_APPLE_UNINORTH_ATA)) 100 return 5; 101 102 return 0; 103 } 104 105 void 106 kauai_attach(parent, self, aux) 107 struct device *parent, *self; 108 void *aux; 109 { 110 struct kauai_softc *sc = (void *)self; 111 struct pci_attach_args *pa = aux; 112 struct ata_channel *chp = &sc->sc_channel; 113 struct wdc_regs *wdr; 114 pci_intr_handle_t ih; 115 paddr_t regbase, dmabase; 116 int node, reg[5], i; 117 118 #ifdef DIAGNOSTIC 119 if ((vaddr_t)sc->sc_dmacmd & 0x0f) { 120 printf(": bad dbdma alignment\n"); 121 return; 122 } 123 #endif 124 125 node = getnodebypci(pa->pa_pc, pa->pa_tag); 126 if (node == 0) { 127 printf(": cannot find gmac node\n"); 128 return; 129 } 130 131 if (OF_getprop(node, "assigned-addresses", reg, sizeof reg) < 12) { 132 printf(": cannot get address property\n"); 133 return; 134 } 135 regbase = reg[2] + 0x2000; 136 dmabase = reg[2] + 0x1000; 137 138 /* 139 * XXX PCI_INTERRUPT_REG seems to be wired to 0. 140 * XXX So use fixed intrpin and intrline values. 141 */ 142 if (pci_conf_read(pa->pa_pc, pa->pa_tag, PCI_INTERRUPT_REG) == 0) { 143 pa->pa_intrpin = 1; 144 pa->pa_intrline = 39; 145 } 146 147 if (pci_intr_map(pa, &ih)) { 148 printf(": unable to map interrupt\n"); 149 return; 150 } 151 printf(": interrupting at %s\n", pci_intr_string(pa->pa_pc, ih)); 152 153 sc->sc_wdcdev.regs = wdr = &sc->sc_wdc_regs; 154 155 sc->sc_iot.pbs_offset = regbase; 156 sc->sc_iot.pbs_base = 0; 157 sc->sc_iot.pbs_limit = WDC_REG_NPORTS; 158 sc->sc_iot.pbs_flags = _BUS_SPACE_LITTLE_ENDIAN | 4; 159 bus_space_init(&sc->sc_iot, "kauai io", NULL, 0); 160 161 wdr->cmd_iot = wdr->ctl_iot = &sc->sc_iot; 162 163 if (bus_space_map(wdr->cmd_iot, regbase, WDC_REG_NPORTS, 0, 164 &wdr->cmd_baseioh) || 165 bus_space_subregion(wdr->cmd_iot, wdr->cmd_baseioh, 166 WDC_AUXREG_OFFSET, 1, &wdr->ctl_ioh)) { 167 printf("%s: couldn't map registers\n", self->dv_xname); 168 return; 169 } 170 for (i = 0; i < WDC_NREG; i++) { 171 if (bus_space_subregion(wdr->cmd_iot, wdr->cmd_baseioh, i, 172 i == 0 ? 4 : 1, &wdr->cmd_iohs[i]) != 0) { 173 bus_space_unmap(wdr->cmd_iot, wdr->cmd_baseioh, 174 WDC_REG_NPORTS); 175 printf("%s: couldn't subregion registers\n", 176 sc->sc_wdcdev.sc_atac.atac_dev.dv_xname); 177 return; 178 } 179 } 180 181 if (pci_intr_establish(pa->pa_pc, ih, IPL_BIO, wdcintr, chp) == NULL) { 182 printf("%s: unable to establish interrupt\n", self->dv_xname); 183 return; 184 } 185 186 187 sc->sc_wdcdev.sc_atac.atac_pio_cap = 4; 188 sc->sc_wdcdev.sc_atac.atac_dma_cap = 2; 189 sc->sc_wdcdev.sc_atac.atac_udma_cap = 5; 190 sc->sc_wdcdev.sc_atac.atac_cap |= ATAC_CAP_DATA16; 191 sc->sc_wdcdev.sc_atac.atac_cap |= ATAC_CAP_DMA | ATAC_CAP_UDMA; 192 sc->sc_chanptr = chp; 193 sc->sc_wdcdev.sc_atac.atac_channels = &sc->sc_chanptr; 194 sc->sc_wdcdev.sc_atac.atac_nchannels = 1; 195 sc->sc_wdcdev.dma_arg = sc; 196 sc->sc_wdcdev.dma_init = kauai_dma_init; 197 sc->sc_wdcdev.dma_start = kauai_dma_start; 198 sc->sc_wdcdev.dma_finish = kauai_dma_finish; 199 sc->sc_wdcdev.sc_atac.atac_set_modes = kauai_set_modes; 200 sc->sc_calc_timing = calc_timing_kauai; 201 sc->sc_dmareg = (void *)dmabase; 202 203 chp->ch_channel = 0; 204 chp->ch_atac = &sc->sc_wdcdev.sc_atac; 205 chp->ch_queue = &sc->sc_queue; 206 chp->ch_ndrive = 2; 207 wdc_init_shadow_regs(chp); 208 209 wdcattach(chp); 210 } 211 212 void 213 kauai_set_modes(chp) 214 struct ata_channel *chp; 215 { 216 struct kauai_softc *sc = (void *)chp->ch_atac; 217 struct wdc_regs *wdr = CHAN_TO_WDC_REGS(chp); 218 struct ata_drive_datas *drvp0 = &chp->ch_drive[0]; 219 struct ata_drive_datas *drvp1 = &chp->ch_drive[1]; 220 struct ata_drive_datas *drvp; 221 int drive; 222 223 if ((drvp0->drive_flags & DRIVE) && (drvp1->drive_flags & DRIVE)) { 224 drvp0->PIO_mode = drvp1->PIO_mode = 225 min(drvp0->PIO_mode, drvp1->PIO_mode); 226 } 227 228 for (drive = 0; drive < 2; drive++) { 229 drvp = &chp->ch_drive[drive]; 230 if (drvp->drive_flags & DRIVE) { 231 (*sc->sc_calc_timing)(sc, drive); 232 bus_space_write_4(wdr->cmd_iot, wdr->cmd_baseioh, 233 PIO_CONFIG_REG, sc->sc_piotiming_r[drive]); 234 bus_space_write_4(wdr->cmd_iot, wdr->cmd_baseioh, 235 DMA_CONFIG_REG, sc->sc_dmatiming_r[drive]); 236 } 237 } 238 } 239 240 /* 241 * IDE transfer timings 242 */ 243 static const u_int pio_timing_kauai[] = { /* 0xff000fff */ 244 0x08000a92, /* Mode 0 */ 245 0x0800060f, /* 1 */ 246 0x0800038b, /* 2 */ 247 0x05000249, /* 3 */ 248 0x04000148 /* 4 */ 249 }; 250 static const u_int dma_timing_kauai[] = { /* 0x00fff000 */ 251 0x00618000, /* Mode 0 */ 252 0x00209000, /* 1 */ 253 0x00148000 /* 2 */ 254 }; 255 static const u_int udma_timing_kauai[] = { /* 0x0000ffff */ 256 0x000070c0, /* Mode 0 */ 257 0x00005d80, /* 1 */ 258 0x00004a60, /* 2 */ 259 0x00003a50, /* 3 */ 260 0x00002a30, /* 4 */ 261 0x00002921 /* 5 */ 262 }; 263 264 /* 265 * Timing calculation for Kauai. 266 */ 267 void 268 calc_timing_kauai(sc, drive) 269 struct kauai_softc *sc; 270 int drive; 271 { 272 struct ata_channel *chp = &sc->sc_channel; 273 struct ata_drive_datas *drvp = &chp->ch_drive[drive]; 274 int piomode = drvp->PIO_mode; 275 int dmamode = drvp->DMA_mode; 276 int udmamode = drvp->UDMA_mode; 277 u_int pioconf, dmaconf; 278 279 pioconf = pio_timing_kauai[piomode]; 280 281 dmaconf = 0; 282 if (drvp->drive_flags & DRIVE_DMA) 283 dmaconf |= dma_timing_kauai[dmamode]; 284 if (drvp->drive_flags & DRIVE_UDMA) 285 dmaconf |= udma_timing_kauai[udmamode]; 286 287 if (drvp->drive_flags & DRIVE_UDMA) 288 dmaconf |= 1; 289 290 sc->sc_piotiming_r[drive] = sc->sc_piotiming_w[drive] = pioconf; 291 sc->sc_dmatiming_r[drive] = sc->sc_dmatiming_w[drive] = dmaconf; 292 } 293 294 int 295 kauai_dma_init(v, channel, drive, databuf, datalen, flags) 296 void *v; 297 void *databuf; 298 size_t datalen; 299 int flags; 300 { 301 struct kauai_softc *sc = v; 302 dbdma_command_t *cmdp = sc->sc_dmacmd; 303 struct ata_channel *chp = &sc->sc_channel; 304 struct wdc_regs *wdr = CHAN_TO_WDC_REGS(chp); 305 vaddr_t va = (vaddr_t)databuf; 306 int read = flags & WDC_DMA_READ; 307 int cmd = read ? DBDMA_CMD_IN_MORE : DBDMA_CMD_OUT_MORE; 308 u_int offset; 309 310 bus_space_write_4(wdr->cmd_iot, wdr->cmd_baseioh, DMA_CONFIG_REG, 311 read ? sc->sc_dmatiming_r[drive] : sc->sc_dmatiming_w[drive]); 312 bus_space_read_4(wdr->cmd_iot, wdr->cmd_baseioh, DMA_CONFIG_REG); 313 314 offset = va & PGOFSET; 315 316 /* if va is not page-aligned, setup the first page */ 317 if (offset != 0) { 318 int rest = PAGE_SIZE - offset; /* the rest of the page */ 319 320 if (datalen > rest) { /* if continues to next page */ 321 DBDMA_BUILD(cmdp, cmd, 0, rest, vtophys(va), 322 DBDMA_INT_NEVER, DBDMA_WAIT_NEVER, 323 DBDMA_BRANCH_NEVER); 324 datalen -= rest; 325 va += rest; 326 cmdp++; 327 } 328 } 329 330 /* now va is page-aligned */ 331 while (datalen > PAGE_SIZE) { 332 DBDMA_BUILD(cmdp, cmd, 0, PAGE_SIZE, vtophys(va), 333 DBDMA_INT_NEVER, DBDMA_WAIT_NEVER, DBDMA_BRANCH_NEVER); 334 datalen -= PAGE_SIZE; 335 va += PAGE_SIZE; 336 cmdp++; 337 } 338 339 /* the last page (datalen <= PAGE_SIZE here) */ 340 cmd = read ? DBDMA_CMD_IN_LAST : DBDMA_CMD_OUT_LAST; 341 DBDMA_BUILD(cmdp, cmd, 0, datalen, vtophys(va), 342 DBDMA_INT_NEVER, DBDMA_WAIT_NEVER, DBDMA_BRANCH_NEVER); 343 cmdp++; 344 345 DBDMA_BUILD(cmdp, DBDMA_CMD_STOP, 0, 0, 0, 346 DBDMA_INT_NEVER, DBDMA_WAIT_NEVER, DBDMA_BRANCH_NEVER); 347 348 return 0; 349 } 350 351 void 352 kauai_dma_start(v, channel, drive) 353 void *v; 354 int channel, drive; 355 { 356 struct kauai_softc *sc = v; 357 358 dbdma_start(sc->sc_dmareg, sc->sc_dmacmd); 359 } 360 361 int 362 kauai_dma_finish(v, channel, drive, read) 363 void *v; 364 int channel, drive; 365 int read; 366 { 367 struct kauai_softc *sc = v; 368 369 dbdma_stop(sc->sc_dmareg); 370 return 0; 371 } 372 373 /* 374 * Find OF-device corresponding to the PCI device. 375 */ 376 int 377 getnodebypci(pc, tag) 378 pci_chipset_tag_t pc; 379 pcitag_t tag; 380 { 381 int bus, dev, func; 382 u_int reg[5]; 383 int p, q; 384 int l, b, d, f; 385 386 pci_decompose_tag(pc, tag, &bus, &dev, &func); 387 388 for (q = OF_peer(0); q; q = p) { 389 l = OF_getprop(q, "assigned-addresses", reg, sizeof(reg)); 390 if (l > 4) { 391 b = (reg[0] >> 16) & 0xff; 392 d = (reg[0] >> 11) & 0x1f; 393 f = (reg[0] >> 8) & 0x07; 394 395 if (b == bus && d == dev && f == func) 396 return q; 397 } 398 if ((p = OF_child(q))) 399 continue; 400 while (q) { 401 if ((p = OF_peer(q))) 402 break; 403 q = OF_parent(q); 404 } 405 } 406 return 0; 407 } 408
Indexes created Sun Oct 19 02:09:48 GMT 2025