kauai.c revision 1.19.36.3
1 /* $NetBSD: kauai.c,v 1.19.36.3 2007/08/02 05:34:32 macallan Exp $ */ 2 3 /*- 4 * Copyright (c) 2003 Tsubai Masanari. All rights reserved. 5 * 6 * Redistribution and use in source and binary forms, with or without 7 * modification, are permitted provided that the following conditions 8 * are met: 9 * 1. Redistributions of source code must retain the above copyright 10 * notice, this list of conditions and the following disclaimer. 11 * 2. Redistributions in binary form must reproduce the above copyright 12 * notice, this list of conditions and the following disclaimer in the 13 * documentation and/or other materials provided with the distribution. 14 * 3. The name of the author may not be used to endorse or promote products 15 * derived from this software without specific prior written permission. 16 * 17 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 18 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 19 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 20 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 21 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 22 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 26 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 27 */ 28 29 #include <sys/cdefs.h> 30 __KERNEL_RCSID(0, "$NetBSD: kauai.c,v 1.19.36.3 2007/08/02 05:34:32 macallan Exp $"); 31 32 #include <sys/param.h> 33 #include <sys/systm.h> 34 #include <sys/device.h> 35 #include <sys/malloc.h> 36 37 #include <uvm/uvm_extern.h> 38 39 #include <machine/bus.h> 40 #include <machine/pio.h> 41 42 #include <dev/ata/atareg.h> 43 #include <dev/ata/atavar.h> 44 #include <dev/ic/wdcvar.h> 45 46 #include <dev/ofw/openfirm.h> 47 48 #include <dev/pci/pcivar.h> 49 #include <dev/pci/pcireg.h> 50 #include <dev/pci/pcidevs.h> 51 52 #include <macppc/dev/dbdma.h> 53 54 #define WDC_REG_NPORTS 8 55 #define WDC_AUXREG_OFFSET 0x16 56 #define WDC_AUXREG_NPORTS 1 57 58 #define PIO_CONFIG_REG (0x200 >> 4) /* PIO and DMA access timing */ 59 #define DMA_CONFIG_REG (0x210 >> 4) /* UDMA access timing */ 60 61 struct kauai_softc { 62 struct wdc_softc sc_wdcdev; 63 struct ata_channel *sc_chanptr; 64 struct ata_channel sc_channel; 65 struct wdc_regs sc_wdc_regs; 66 struct ata_queue sc_queue; 67 struct powerpc_bus_space sc_iot; 68 dbdma_regmap_t *sc_dmareg; 69 dbdma_command_t *sc_dmacmd; 70 u_int sc_piotiming_r[2]; 71 u_int sc_piotiming_w[2]; 72 u_int sc_dmatiming_r[2]; 73 u_int sc_dmatiming_w[2]; 74 void (*sc_calc_timing)(struct kauai_softc *, int); 75 }; 76 77 int kauai_match __P((struct device *, struct cfdata *, void *)); 78 void kauai_attach __P((struct device *, struct device *, void *)); 79 int kauai_dma_init __P((void *, int, int, void *, size_t, int)); 80 void kauai_dma_start __P((void *, int, int)); 81 int kauai_dma_finish __P((void *, int, int, int)); 82 void kauai_set_modes __P((struct ata_channel *)); 83 static void calc_timing_kauai __P((struct kauai_softc *, int)); 84 static int getnodebypci(pci_chipset_tag_t, pcitag_t); 85 86 CFATTACH_DECL(kauai, sizeof(struct kauai_softc), 87 kauai_match, kauai_attach, NULL, wdcactivate); 88 89 int 90 kauai_match(parent, match, aux) 91 struct device *parent; 92 struct cfdata *match; 93 void *aux; 94 { 95 struct pci_attach_args *pa = aux; 96 97 if (PCI_VENDOR(pa->pa_id) == PCI_VENDOR_APPLE) { 98 switch (PCI_PRODUCT(pa->pa_id)) { 99 case PCI_PRODUCT_APPLE_KAUAI: 100 case PCI_PRODUCT_APPLE_UNINORTH_ATA: 101 case PCI_PRODUCT_APPLE_INTREPID2_ATA: 102 return 5; 103 } 104 } 105 106 return 0; 107 } 108 109 void 110 kauai_attach(parent, self, aux) 111 struct device *parent, *self; 112 void *aux; 113 { 114 struct kauai_softc *sc = (void *)self; 115 struct pci_attach_args *pa = aux; 116 struct ata_channel *chp = &sc->sc_channel; 117 struct wdc_regs *wdr; 118 pci_intr_handle_t ih; 119 paddr_t regbase, dmabase; 120 int node, reg[5], i; 121 122 #ifdef DIAGNOSTIC 123 if ((vaddr_t)sc->sc_dmacmd & 0x0f) { 124 printf(": bad dbdma alignment\n"); 125 return; 126 } 127 #endif 128 129 node = getnodebypci(pa->pa_pc, pa->pa_tag); 130 if (node == 0) { 131 printf(": cannot find gmac node\n"); 132 return; 133 } 134 135 if (OF_getprop(node, "assigned-addresses", reg, sizeof reg) < 12) { 136 printf(": cannot get address property\n"); 137 return; 138 } 139 regbase = reg[2] + 0x2000; 140 dmabase = reg[2] + 0x1000; 141 142 /* 143 * XXX PCI_INTERRUPT_REG seems to be wired to 0. 144 * XXX So use fixed intrpin and intrline values. 145 */ 146 if (pci_conf_read(pa->pa_pc, pa->pa_tag, PCI_INTERRUPT_REG) == 0) { 147 pa->pa_intrpin = 1; 148 pa->pa_intrline = 39; 149 } 150 151 if (pci_intr_map(pa, &ih)) { 152 printf(": unable to map interrupt\n"); 153 return; 154 } 155 printf(": interrupting at %s\n", pci_intr_string(pa->pa_pc, ih)); 156 157 sc->sc_wdcdev.regs = wdr = &sc->sc_wdc_regs; 158 159 sc->sc_iot.pbs_offset = regbase; 160 sc->sc_iot.pbs_base = 0; 161 sc->sc_iot.pbs_limit = WDC_REG_NPORTS; 162 sc->sc_iot.pbs_flags = _BUS_SPACE_LITTLE_ENDIAN | 4; 163 bus_space_init(&sc->sc_iot, "kauai io", NULL, 0); 164 165 wdr->cmd_iot = wdr->ctl_iot = &sc->sc_iot; 166 167 if (bus_space_map(wdr->cmd_iot, regbase, WDC_REG_NPORTS, 0, 168 &wdr->cmd_baseioh) || 169 bus_space_subregion(wdr->cmd_iot, wdr->cmd_baseioh, 170 WDC_AUXREG_OFFSET, 1, &wdr->ctl_ioh)) { 171 printf("%s: couldn't map registers\n", self->dv_xname); 172 return; 173 } 174 for (i = 0; i < WDC_NREG; i++) { 175 if (bus_space_subregion(wdr->cmd_iot, wdr->cmd_baseioh, i, 176 i == 0 ? 4 : 1, &wdr->cmd_iohs[i]) != 0) { 177 bus_space_unmap(wdr->cmd_iot, wdr->cmd_baseioh, 178 WDC_REG_NPORTS); 179 printf("%s: couldn't subregion registers\n", 180 sc->sc_wdcdev.sc_atac.atac_dev.dv_xname); 181 return; 182 } 183 } 184 185 if (pci_intr_establish(pa->pa_pc, ih, IPL_BIO, wdcintr, chp) == NULL) { 186 printf("%s: unable to establish interrupt\n", self->dv_xname); 187 return; 188 } 189 190 191 sc->sc_wdcdev.sc_atac.atac_pio_cap = 4; 192 sc->sc_wdcdev.sc_atac.atac_dma_cap = 2; 193 sc->sc_wdcdev.sc_atac.atac_udma_cap = 5; 194 sc->sc_wdcdev.sc_atac.atac_cap |= ATAC_CAP_DATA16; 195 sc->sc_wdcdev.sc_atac.atac_cap |= ATAC_CAP_DMA | ATAC_CAP_UDMA; 196 sc->sc_chanptr = chp; 197 sc->sc_wdcdev.sc_atac.atac_channels = &sc->sc_chanptr; 198 sc->sc_wdcdev.sc_atac.atac_nchannels = 1; 199 sc->sc_wdcdev.dma_arg = sc; 200 sc->sc_wdcdev.dma_init = kauai_dma_init; 201 sc->sc_wdcdev.dma_start = kauai_dma_start; 202 sc->sc_wdcdev.dma_finish = kauai_dma_finish; 203 sc->sc_wdcdev.sc_atac.atac_set_modes = kauai_set_modes; 204 sc->sc_calc_timing = calc_timing_kauai; 205 sc->sc_dmareg = (void *)dmabase; 206 207 chp->ch_channel = 0; 208 chp->ch_atac = &sc->sc_wdcdev.sc_atac; 209 chp->ch_queue = &sc->sc_queue; 210 chp->ch_ndrive = 2; 211 wdc_init_shadow_regs(chp); 212 213 wdcattach(chp); 214 } 215 216 void 217 kauai_set_modes(chp) 218 struct ata_channel *chp; 219 { 220 struct kauai_softc *sc = (void *)chp->ch_atac; 221 struct wdc_regs *wdr = CHAN_TO_WDC_REGS(chp); 222 struct ata_drive_datas *drvp0 = &chp->ch_drive[0]; 223 struct ata_drive_datas *drvp1 = &chp->ch_drive[1]; 224 struct ata_drive_datas *drvp; 225 int drive; 226 227 if ((drvp0->drive_flags & DRIVE) && (drvp1->drive_flags & DRIVE)) { 228 drvp0->PIO_mode = drvp1->PIO_mode = 229 min(drvp0->PIO_mode, drvp1->PIO_mode); 230 } 231 232 for (drive = 0; drive < 2; drive++) { 233 drvp = &chp->ch_drive[drive]; 234 if (drvp->drive_flags & DRIVE) { 235 (*sc->sc_calc_timing)(sc, drive); 236 bus_space_write_4(wdr->cmd_iot, wdr->cmd_baseioh, 237 PIO_CONFIG_REG, sc->sc_piotiming_r[drive]); 238 bus_space_write_4(wdr->cmd_iot, wdr->cmd_baseioh, 239 DMA_CONFIG_REG, sc->sc_dmatiming_r[drive]); 240 } 241 } 242 } 243 244 /* 245 * IDE transfer timings 246 */ 247 static const u_int pio_timing_kauai[] = { /* 0xff000fff */ 248 0x08000a92, /* Mode 0 */ 249 0x0800060f, /* 1 */ 250 0x0800038b, /* 2 */ 251 0x05000249, /* 3 */ 252 0x04000148 /* 4 */ 253 }; 254 static const u_int dma_timing_kauai[] = { /* 0x00fff000 */ 255 0x00618000, /* Mode 0 */ 256 0x00209000, /* 1 */ 257 0x00148000 /* 2 */ 258 }; 259 static const u_int udma_timing_kauai[] = { /* 0x0000ffff */ 260 0x000070c0, /* Mode 0 */ 261 0x00005d80, /* 1 */ 262 0x00004a60, /* 2 */ 263 0x00003a50, /* 3 */ 264 0x00002a30, /* 4 */ 265 0x00002921 /* 5 */ 266 }; 267 268 /* 269 * Timing calculation for Kauai. 270 */ 271 void 272 calc_timing_kauai(sc, drive) 273 struct kauai_softc *sc; 274 int drive; 275 { 276 struct ata_channel *chp = &sc->sc_channel; 277 struct ata_drive_datas *drvp = &chp->ch_drive[drive]; 278 int piomode = drvp->PIO_mode; 279 int dmamode = drvp->DMA_mode; 280 int udmamode = drvp->UDMA_mode; 281 u_int pioconf, dmaconf; 282 283 pioconf = pio_timing_kauai[piomode]; 284 285 dmaconf = 0; 286 if (drvp->drive_flags & DRIVE_DMA) 287 dmaconf |= dma_timing_kauai[dmamode]; 288 if (drvp->drive_flags & DRIVE_UDMA) 289 dmaconf |= udma_timing_kauai[udmamode]; 290 291 if (drvp->drive_flags & DRIVE_UDMA) 292 dmaconf |= 1; 293 294 sc->sc_piotiming_r[drive] = sc->sc_piotiming_w[drive] = pioconf; 295 sc->sc_dmatiming_r[drive] = sc->sc_dmatiming_w[drive] = dmaconf; 296 } 297 298 int 299 kauai_dma_init(v, channel, drive, databuf, datalen, flags) 300 void *v; 301 void *databuf; 302 size_t datalen; 303 int flags; 304 { 305 struct kauai_softc *sc = v; 306 dbdma_command_t *cmdp = sc->sc_dmacmd; 307 struct ata_channel *chp = &sc->sc_channel; 308 struct wdc_regs *wdr = CHAN_TO_WDC_REGS(chp); 309 vaddr_t va = (vaddr_t)databuf; 310 int read = flags & WDC_DMA_READ; 311 int cmd = read ? DBDMA_CMD_IN_MORE : DBDMA_CMD_OUT_MORE; 312 u_int offset; 313 314 bus_space_write_4(wdr->cmd_iot, wdr->cmd_baseioh, DMA_CONFIG_REG, 315 read ? sc->sc_dmatiming_r[drive] : sc->sc_dmatiming_w[drive]); 316 bus_space_read_4(wdr->cmd_iot, wdr->cmd_baseioh, DMA_CONFIG_REG); 317 318 offset = va & PGOFSET; 319 320 /* if va is not page-aligned, setup the first page */ 321 if (offset != 0) { 322 int rest = PAGE_SIZE - offset; /* the rest of the page */ 323 324 if (datalen > rest) { /* if continues to next page */ 325 DBDMA_BUILD(cmdp, cmd, 0, rest, vtophys(va), 326 DBDMA_INT_NEVER, DBDMA_WAIT_NEVER, 327 DBDMA_BRANCH_NEVER); 328 datalen -= rest; 329 va += rest; 330 cmdp++; 331 } 332 } 333 334 /* now va is page-aligned */ 335 while (datalen > PAGE_SIZE) { 336 DBDMA_BUILD(cmdp, cmd, 0, PAGE_SIZE, vtophys(va), 337 DBDMA_INT_NEVER, DBDMA_WAIT_NEVER, DBDMA_BRANCH_NEVER); 338 datalen -= PAGE_SIZE; 339 va += PAGE_SIZE; 340 cmdp++; 341 } 342 343 /* the last page (datalen <= PAGE_SIZE here) */ 344 cmd = read ? DBDMA_CMD_IN_LAST : DBDMA_CMD_OUT_LAST; 345 DBDMA_BUILD(cmdp, cmd, 0, datalen, vtophys(va), 346 DBDMA_INT_NEVER, DBDMA_WAIT_NEVER, DBDMA_BRANCH_NEVER); 347 cmdp++; 348 349 DBDMA_BUILD(cmdp, DBDMA_CMD_STOP, 0, 0, 0, 350 DBDMA_INT_NEVER, DBDMA_WAIT_NEVER, DBDMA_BRANCH_NEVER); 351 352 return 0; 353 } 354 355 void 356 kauai_dma_start(v, channel, drive) 357 void *v; 358 int channel, drive; 359 { 360 struct kauai_softc *sc = v; 361 362 dbdma_start(sc->sc_dmareg, sc->sc_dmacmd); 363 } 364 365 int 366 kauai_dma_finish(v, channel, drive, read) 367 void *v; 368 int channel, drive; 369 int read; 370 { 371 struct kauai_softc *sc = v; 372 373 dbdma_stop(sc->sc_dmareg); 374 return 0; 375 } 376 377 /* 378 * Find OF-device corresponding to the PCI device. 379 */ 380 int 381 getnodebypci(pc, tag) 382 pci_chipset_tag_t pc; 383 pcitag_t tag; 384 { 385 int bus, dev, func; 386 u_int reg[5]; 387 int p, q; 388 int l, b, d, f; 389 390 pci_decompose_tag(pc, tag, &bus, &dev, &func); 391 392 for (q = OF_peer(0); q; q = p) { 393 l = OF_getprop(q, "assigned-addresses", reg, sizeof(reg)); 394 if (l > 4) { 395 b = (reg[0] >> 16) & 0xff; 396 d = (reg[0] >> 11) & 0x1f; 397 f = (reg[0] >> 8) & 0x07; 398 399 if (b == bus && d == dev && f == func) 400 return q; 401 } 402 if ((p = OF_child(q))) 403 continue; 404 while (q) { 405 if ((p = OF_peer(q))) 406 break; 407 q = OF_parent(q); 408 } 409 } 410 return 0; 411 } 412
Indexes created Fri Oct 17 23:09:53 GMT 2025