kauai.c revision 1.20
1 /* $NetBSD: kauai.c,v 1.20 2007/06/25 11:12:54 aymeric Exp $ */ 2 3 /*- 4 * Copyright (c) 2003 Tsubai Masanari. All rights reserved. 5 * 6 * Redistribution and use in source and binary forms, with or without 7 * modification, are permitted provided that the following conditions 8 * are met: 9 * 1. Redistributions of source code must retain the above copyright 10 * notice, this list of conditions and the following disclaimer. 11 * 2. Redistributions in binary form must reproduce the above copyright 12 * notice, this list of conditions and the following disclaimer in the 13 * documentation and/or other materials provided with the distribution. 14 * 3. The name of the author may not be used to endorse or promote products 15 * derived from this software without specific prior written permission. 16 * 17 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 18 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 19 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 20 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 21 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 22 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 26 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 27 */ 28 29 #include <sys/cdefs.h> 30 __KERNEL_RCSID(0, "$NetBSD: kauai.c,v 1.20 2007/06/25 11:12:54 aymeric Exp $"); 31 32 #include <sys/param.h> 33 #include <sys/systm.h> 34 #include <sys/device.h> 35 #include <sys/malloc.h> 36 37 #include <uvm/uvm_extern.h> 38 39 #include <machine/bus.h> 40 41 #include <dev/ata/atareg.h> 42 #include <dev/ata/atavar.h> 43 #include <dev/ic/wdcvar.h> 44 45 #include <dev/ofw/openfirm.h> 46 47 #include <dev/pci/pcivar.h> 48 #include <dev/pci/pcireg.h> 49 #include <dev/pci/pcidevs.h> 50 51 #include <macppc/dev/dbdma.h> 52 53 #define WDC_REG_NPORTS 8 54 #define WDC_AUXREG_OFFSET 0x16 55 56 #define PIO_CONFIG_REG (0x200 >> 4) /* PIO and DMA access timing */ 57 #define DMA_CONFIG_REG (0x210 >> 4) /* UDMA access timing */ 58 59 struct kauai_softc { 60 struct wdc_softc sc_wdcdev; 61 struct ata_channel *sc_chanptr; 62 struct ata_channel sc_channel; 63 struct wdc_regs sc_wdc_regs; 64 struct ata_queue sc_queue; 65 dbdma_regmap_t *sc_dmareg; 66 dbdma_command_t *sc_dmacmd; 67 u_int sc_piotiming_r[2]; 68 u_int sc_piotiming_w[2]; 69 u_int sc_dmatiming_r[2]; 70 u_int sc_dmatiming_w[2]; 71 void (*sc_calc_timing)(struct kauai_softc *, int); 72 }; 73 74 int kauai_match __P((struct device *, struct cfdata *, void *)); 75 void kauai_attach __P((struct device *, struct device *, void *)); 76 int kauai_dma_init __P((void *, int, int, void *, size_t, int)); 77 void kauai_dma_start __P((void *, int, int)); 78 int kauai_dma_finish __P((void *, int, int, int)); 79 void kauai_set_modes __P((struct ata_channel *)); 80 static void calc_timing_kauai __P((struct kauai_softc *, int)); 81 static int getnodebypci(pci_chipset_tag_t, pcitag_t); 82 83 CFATTACH_DECL(kauai, sizeof(struct kauai_softc), 84 kauai_match, kauai_attach, NULL, wdcactivate); 85 86 int 87 kauai_match(parent, match, aux) 88 struct device *parent; 89 struct cfdata *match; 90 void *aux; 91 { 92 struct pci_attach_args *pa = aux; 93 94 if (PCI_VENDOR(pa->pa_id) == PCI_VENDOR_APPLE) { 95 switch (PCI_PRODUCT(pa->pa_id)) { 96 case PCI_PRODUCT_APPLE_KAUAI: 97 case PCI_PRODUCT_APPLE_UNINORTH_ATA: 98 case PCI_PRODUCT_APPLE_INTREPID2_ATA: 99 return 5; 100 } 101 } 102 103 return 0; 104 } 105 106 void 107 kauai_attach(parent, self, aux) 108 struct device *parent, *self; 109 void *aux; 110 { 111 struct kauai_softc *sc = (void *)self; 112 struct pci_attach_args *pa = aux; 113 struct ata_channel *chp = &sc->sc_channel; 114 struct wdc_regs *wdr; 115 pci_intr_handle_t ih; 116 paddr_t regbase, dmabase; 117 int node, reg[5], i; 118 119 #ifdef DIAGNOSTIC 120 if ((vaddr_t)sc->sc_dmacmd & 0x0f) { 121 printf(": bad dbdma alignment\n"); 122 return; 123 } 124 #endif 125 126 node = getnodebypci(pa->pa_pc, pa->pa_tag); 127 if (node == 0) { 128 printf(": cannot find gmac node\n"); 129 return; 130 } 131 132 if (OF_getprop(node, "assigned-addresses", reg, sizeof reg) < 12) { 133 printf(": cannot get address property\n"); 134 return; 135 } 136 regbase = reg[2] + 0x2000; 137 dmabase = reg[2] + 0x1000; 138 139 /* 140 * XXX PCI_INTERRUPT_REG seems to be wired to 0. 141 * XXX So use fixed intrpin and intrline values. 142 */ 143 if (pci_conf_read(pa->pa_pc, pa->pa_tag, PCI_INTERRUPT_REG) == 0) { 144 pa->pa_intrpin = 1; 145 pa->pa_intrline = 39; 146 } 147 148 if (pci_intr_map(pa, &ih)) { 149 printf(": unable to map interrupt\n"); 150 return; 151 } 152 printf(": interrupting at %s\n", pci_intr_string(pa->pa_pc, ih)); 153 154 sc->sc_wdcdev.regs = wdr = &sc->sc_wdc_regs; 155 156 wdr->cmd_iot = wdr->ctl_iot = macppc_make_bus_space_tag(regbase, 4); 157 158 if (bus_space_map(wdr->cmd_iot, 0, WDC_REG_NPORTS, 0, 159 &wdr->cmd_baseioh) || 160 bus_space_subregion(wdr->cmd_iot, wdr->cmd_baseioh, 161 WDC_AUXREG_OFFSET, 1, &wdr->ctl_ioh)) { 162 printf("%s: couldn't map registers\n", self->dv_xname); 163 return; 164 } 165 for (i = 0; i < WDC_NREG; i++) { 166 if (bus_space_subregion(wdr->cmd_iot, wdr->cmd_baseioh, i, 167 i == 0 ? 4 : 1, &wdr->cmd_iohs[i]) != 0) { 168 bus_space_unmap(wdr->cmd_iot, wdr->cmd_baseioh, 169 WDC_REG_NPORTS); 170 printf("%s: couldn't subregion registers\n", 171 sc->sc_wdcdev.sc_atac.atac_dev.dv_xname); 172 return; 173 } 174 } 175 176 if (pci_intr_establish(pa->pa_pc, ih, IPL_BIO, wdcintr, chp) == NULL) { 177 printf("%s: unable to establish interrupt\n", self->dv_xname); 178 return; 179 } 180 181 182 sc->sc_wdcdev.sc_atac.atac_pio_cap = 4; 183 sc->sc_wdcdev.sc_atac.atac_dma_cap = 2; 184 sc->sc_wdcdev.sc_atac.atac_udma_cap = 5; 185 sc->sc_wdcdev.sc_atac.atac_cap |= ATAC_CAP_DATA16; 186 sc->sc_wdcdev.sc_atac.atac_cap |= ATAC_CAP_DMA | ATAC_CAP_UDMA; 187 sc->sc_chanptr = chp; 188 sc->sc_wdcdev.sc_atac.atac_channels = &sc->sc_chanptr; 189 sc->sc_wdcdev.sc_atac.atac_nchannels = 1; 190 sc->sc_wdcdev.dma_arg = sc; 191 sc->sc_wdcdev.dma_init = kauai_dma_init; 192 sc->sc_wdcdev.dma_start = kauai_dma_start; 193 sc->sc_wdcdev.dma_finish = kauai_dma_finish; 194 sc->sc_wdcdev.sc_atac.atac_set_modes = kauai_set_modes; 195 sc->sc_calc_timing = calc_timing_kauai; 196 sc->sc_dmareg = (void *)dmabase; 197 198 chp->ch_channel = 0; 199 chp->ch_atac = &sc->sc_wdcdev.sc_atac; 200 chp->ch_queue = &sc->sc_queue; 201 chp->ch_ndrive = 2; 202 wdc_init_shadow_regs(chp); 203 204 wdcattach(chp); 205 } 206 207 void 208 kauai_set_modes(chp) 209 struct ata_channel *chp; 210 { 211 struct kauai_softc *sc = (void *)chp->ch_atac; 212 struct wdc_regs *wdr = CHAN_TO_WDC_REGS(chp); 213 struct ata_drive_datas *drvp0 = &chp->ch_drive[0]; 214 struct ata_drive_datas *drvp1 = &chp->ch_drive[1]; 215 struct ata_drive_datas *drvp; 216 int drive; 217 218 if ((drvp0->drive_flags & DRIVE) && (drvp1->drive_flags & DRIVE)) { 219 drvp0->PIO_mode = drvp1->PIO_mode = 220 min(drvp0->PIO_mode, drvp1->PIO_mode); 221 } 222 223 for (drive = 0; drive < 2; drive++) { 224 drvp = &chp->ch_drive[drive]; 225 if (drvp->drive_flags & DRIVE) { 226 (*sc->sc_calc_timing)(sc, drive); 227 bus_space_write_4(wdr->cmd_iot, wdr->cmd_baseioh, 228 PIO_CONFIG_REG, sc->sc_piotiming_r[drive]); 229 bus_space_write_4(wdr->cmd_iot, wdr->cmd_baseioh, 230 DMA_CONFIG_REG, sc->sc_dmatiming_r[drive]); 231 } 232 } 233 } 234 235 /* 236 * IDE transfer timings 237 */ 238 static const u_int pio_timing_kauai[] = { /* 0xff000fff */ 239 0x08000a92, /* Mode 0 */ 240 0x0800060f, /* 1 */ 241 0x0800038b, /* 2 */ 242 0x05000249, /* 3 */ 243 0x04000148 /* 4 */ 244 }; 245 static const u_int dma_timing_kauai[] = { /* 0x00fff000 */ 246 0x00618000, /* Mode 0 */ 247 0x00209000, /* 1 */ 248 0x00148000 /* 2 */ 249 }; 250 static const u_int udma_timing_kauai[] = { /* 0x0000ffff */ 251 0x000070c0, /* Mode 0 */ 252 0x00005d80, /* 1 */ 253 0x00004a60, /* 2 */ 254 0x00003a50, /* 3 */ 255 0x00002a30, /* 4 */ 256 0x00002921 /* 5 */ 257 }; 258 259 /* 260 * Timing calculation for Kauai. 261 */ 262 void 263 calc_timing_kauai(sc, drive) 264 struct kauai_softc *sc; 265 int drive; 266 { 267 struct ata_channel *chp = &sc->sc_channel; 268 struct ata_drive_datas *drvp = &chp->ch_drive[drive]; 269 int piomode = drvp->PIO_mode; 270 int dmamode = drvp->DMA_mode; 271 int udmamode = drvp->UDMA_mode; 272 u_int pioconf, dmaconf; 273 274 pioconf = pio_timing_kauai[piomode]; 275 276 dmaconf = 0; 277 if (drvp->drive_flags & DRIVE_DMA) 278 dmaconf |= dma_timing_kauai[dmamode]; 279 if (drvp->drive_flags & DRIVE_UDMA) 280 dmaconf |= udma_timing_kauai[udmamode]; 281 282 if (drvp->drive_flags & DRIVE_UDMA) 283 dmaconf |= 1; 284 285 sc->sc_piotiming_r[drive] = sc->sc_piotiming_w[drive] = pioconf; 286 sc->sc_dmatiming_r[drive] = sc->sc_dmatiming_w[drive] = dmaconf; 287 } 288 289 int 290 kauai_dma_init(v, channel, drive, databuf, datalen, flags) 291 void *v; 292 void *databuf; 293 size_t datalen; 294 int flags; 295 { 296 struct kauai_softc *sc = v; 297 dbdma_command_t *cmdp = sc->sc_dmacmd; 298 struct ata_channel *chp = &sc->sc_channel; 299 struct wdc_regs *wdr = CHAN_TO_WDC_REGS(chp); 300 vaddr_t va = (vaddr_t)databuf; 301 int read = flags & WDC_DMA_READ; 302 int cmd = read ? DBDMA_CMD_IN_MORE : DBDMA_CMD_OUT_MORE; 303 u_int offset; 304 305 bus_space_write_4(wdr->cmd_iot, wdr->cmd_baseioh, DMA_CONFIG_REG, 306 read ? sc->sc_dmatiming_r[drive] : sc->sc_dmatiming_w[drive]); 307 bus_space_read_4(wdr->cmd_iot, wdr->cmd_baseioh, DMA_CONFIG_REG); 308 309 offset = va & PGOFSET; 310 311 /* if va is not page-aligned, setup the first page */ 312 if (offset != 0) { 313 int rest = PAGE_SIZE - offset; /* the rest of the page */ 314 315 if (datalen > rest) { /* if continues to next page */ 316 DBDMA_BUILD(cmdp, cmd, 0, rest, vtophys(va), 317 DBDMA_INT_NEVER, DBDMA_WAIT_NEVER, 318 DBDMA_BRANCH_NEVER); 319 datalen -= rest; 320 va += rest; 321 cmdp++; 322 } 323 } 324 325 /* now va is page-aligned */ 326 while (datalen > PAGE_SIZE) { 327 DBDMA_BUILD(cmdp, cmd, 0, PAGE_SIZE, vtophys(va), 328 DBDMA_INT_NEVER, DBDMA_WAIT_NEVER, DBDMA_BRANCH_NEVER); 329 datalen -= PAGE_SIZE; 330 va += PAGE_SIZE; 331 cmdp++; 332 } 333 334 /* the last page (datalen <= PAGE_SIZE here) */ 335 cmd = read ? DBDMA_CMD_IN_LAST : DBDMA_CMD_OUT_LAST; 336 DBDMA_BUILD(cmdp, cmd, 0, datalen, vtophys(va), 337 DBDMA_INT_NEVER, DBDMA_WAIT_NEVER, DBDMA_BRANCH_NEVER); 338 cmdp++; 339 340 DBDMA_BUILD(cmdp, DBDMA_CMD_STOP, 0, 0, 0, 341 DBDMA_INT_NEVER, DBDMA_WAIT_NEVER, DBDMA_BRANCH_NEVER); 342 343 return 0; 344 } 345 346 void 347 kauai_dma_start(v, channel, drive) 348 void *v; 349 int channel, drive; 350 { 351 struct kauai_softc *sc = v; 352 353 dbdma_start(sc->sc_dmareg, sc->sc_dmacmd); 354 } 355 356 int 357 kauai_dma_finish(v, channel, drive, read) 358 void *v; 359 int channel, drive; 360 int read; 361 { 362 struct kauai_softc *sc = v; 363 364 dbdma_stop(sc->sc_dmareg); 365 return 0; 366 } 367 368 /* 369 * Find OF-device corresponding to the PCI device. 370 */ 371 int 372 getnodebypci(pc, tag) 373 pci_chipset_tag_t pc; 374 pcitag_t tag; 375 { 376 int bus, dev, func; 377 u_int reg[5]; 378 int p, q; 379 int l, b, d, f; 380 381 pci_decompose_tag(pc, tag, &bus, &dev, &func); 382 383 for (q = OF_peer(0); q; q = p) { 384 l = OF_getprop(q, "assigned-addresses", reg, sizeof(reg)); 385 if (l > 4) { 386 b = (reg[0] >> 16) & 0xff; 387 d = (reg[0] >> 11) & 0x1f; 388 f = (reg[0] >> 8) & 0x07; 389 390 if (b == bus && d == dev && f == func) 391 return q; 392 } 393 if ((p = OF_child(q))) 394 continue; 395 while (q) { 396 if ((p = OF_peer(q))) 397 break; 398 q = OF_parent(q); 399 } 400 } 401 return 0; 402 } 403
Indexes created Fri Oct 03 02:09:57 GMT 2025