kauai.c revision 1.23
1 /* $NetBSD: kauai.c,v 1.23 2008/03/18 20:46:36 cube Exp $ */ 2 3 /*- 4 * Copyright (c) 2003 Tsubai Masanari. All rights reserved. 5 * 6 * Redistribution and use in source and binary forms, with or without 7 * modification, are permitted provided that the following conditions 8 * are met: 9 * 1. Redistributions of source code must retain the above copyright 10 * notice, this list of conditions and the following disclaimer. 11 * 2. Redistributions in binary form must reproduce the above copyright 12 * notice, this list of conditions and the following disclaimer in the 13 * documentation and/or other materials provided with the distribution. 14 * 3. The name of the author may not be used to endorse or promote products 15 * derived from this software without specific prior written permission. 16 * 17 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 18 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 19 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 20 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 21 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 22 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 26 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 27 */ 28 29 #include <sys/cdefs.h> 30 __KERNEL_RCSID(0, "$NetBSD: kauai.c,v 1.23 2008/03/18 20:46:36 cube Exp $"); 31 32 #include <sys/param.h> 33 #include <sys/systm.h> 34 #include <sys/device.h> 35 #include <sys/malloc.h> 36 37 #include <uvm/uvm_extern.h> 38 39 #include <machine/bus.h> 40 #include <machine/pio.h> 41 42 #include <dev/ata/atareg.h> 43 #include <dev/ata/atavar.h> 44 #include <dev/ic/wdcvar.h> 45 46 #include <dev/ofw/openfirm.h> 47 48 #include <dev/pci/pcivar.h> 49 #include <dev/pci/pcireg.h> 50 #include <dev/pci/pcidevs.h> 51 52 #include <macppc/dev/dbdma.h> 53 54 #define WDC_REG_NPORTS 8 55 #define WDC_AUXREG_OFFSET 0x16 56 #define WDC_AUXREG_NPORTS 1 57 58 #define PIO_CONFIG_REG (0x200 >> 4) /* PIO and DMA access timing */ 59 #define DMA_CONFIG_REG (0x210 >> 4) /* UDMA access timing */ 60 61 struct kauai_softc { 62 struct wdc_softc sc_wdcdev; 63 struct ata_channel *sc_chanptr; 64 struct ata_channel sc_channel; 65 struct wdc_regs sc_wdc_regs; 66 struct ata_queue sc_queue; 67 dbdma_regmap_t *sc_dmareg; 68 dbdma_command_t *sc_dmacmd; 69 u_int sc_piotiming_r[2]; 70 u_int sc_piotiming_w[2]; 71 u_int sc_dmatiming_r[2]; 72 u_int sc_dmatiming_w[2]; 73 void (*sc_calc_timing)(struct kauai_softc *, int); 74 }; 75 76 static int kauai_match(device_t, cfdata_t, void *); 77 static void kauai_attach(device_t, device_t, void *); 78 static int kauai_dma_init(void *, int, int, void *, size_t, int); 79 static void kauai_dma_start(void *, int, int); 80 static int kauai_dma_finish(void *, int, int, int); 81 static void kauai_set_modes(struct ata_channel *); 82 static void calc_timing_kauai(struct kauai_softc *, int); 83 static int getnodebypci(pci_chipset_tag_t, pcitag_t); 84 85 CFATTACH_DECL_NEW(kauai, sizeof(struct kauai_softc), 86 kauai_match, kauai_attach, NULL, wdcactivate); 87 88 int 89 kauai_match(device_t parent, cfdata_t match, void *aux) 90 { 91 struct pci_attach_args *pa = aux; 92 93 if (PCI_VENDOR(pa->pa_id) == PCI_VENDOR_APPLE) { 94 switch (PCI_PRODUCT(pa->pa_id)) { 95 case PCI_PRODUCT_APPLE_KAUAI: 96 case PCI_PRODUCT_APPLE_UNINORTH_ATA: 97 case PCI_PRODUCT_APPLE_INTREPID2_ATA: 98 return 5; 99 } 100 } 101 102 return 0; 103 } 104 105 void 106 kauai_attach(device_t parent, device_t self, void *aux) 107 { 108 struct kauai_softc *sc = device_private(self); 109 struct pci_attach_args *pa = aux; 110 struct ata_channel *chp = &sc->sc_channel; 111 struct wdc_regs *wdr; 112 pci_intr_handle_t ih; 113 paddr_t regbase, dmabase; 114 int node, reg[5], i; 115 116 sc->sc_wdcdev.sc_atac.atac_dev = self; 117 118 #ifdef DIAGNOSTIC 119 if ((vaddr_t)sc->sc_dmacmd & 0x0f) { 120 aprint_error(": bad dbdma alignment\n"); 121 return; 122 } 123 #endif 124 125 node = getnodebypci(pa->pa_pc, pa->pa_tag); 126 if (node == 0) { 127 aprint_error(": cannot find kauai node\n"); 128 return; 129 } 130 131 if (OF_getprop(node, "assigned-addresses", reg, sizeof reg) < 12) { 132 aprint_error(": cannot get address property\n"); 133 return; 134 } 135 regbase = reg[2] + 0x2000; 136 dmabase = reg[2] + 0x1000; 137 138 /* 139 * XXX PCI_INTERRUPT_REG seems to be wired to 0. 140 * XXX So use fixed intrpin and intrline values. 141 */ 142 if (pci_conf_read(pa->pa_pc, pa->pa_tag, PCI_INTERRUPT_REG) == 0) { 143 pa->pa_intrpin = 1; 144 pa->pa_intrline = 39; 145 } 146 147 if (pci_intr_map(pa, &ih)) { 148 aprint_error(": unable to map interrupt\n"); 149 return; 150 } 151 aprint_normal(": interrupting at %s\n", pci_intr_string(pa->pa_pc, ih)); 152 153 sc->sc_wdcdev.regs = wdr = &sc->sc_wdc_regs; 154 155 wdr->cmd_iot = wdr->ctl_iot = pa->pa_memt; 156 157 if (bus_space_map(wdr->cmd_iot, regbase, WDC_REG_NPORTS << 4, 0, 158 &wdr->cmd_baseioh) || 159 bus_space_subregion(wdr->cmd_iot, wdr->cmd_baseioh, 160 WDC_AUXREG_OFFSET << 4, 1, &wdr->ctl_ioh)) { 161 aprint_error_dev(self, "couldn't map registers\n"); 162 return; 163 } 164 for (i = 0; i < WDC_NREG; i++) { 165 if (bus_space_subregion(wdr->cmd_iot, wdr->cmd_baseioh, i << 4, 166 i == 0 ? 4 : 1, &wdr->cmd_iohs[i]) != 0) { 167 bus_space_unmap(wdr->cmd_iot, wdr->cmd_baseioh, 168 WDC_REG_NPORTS << 4); 169 aprint_error_dev(self, 170 "couldn't subregion registers\n"); 171 return; 172 } 173 } 174 175 if (pci_intr_establish(pa->pa_pc, ih, IPL_BIO, wdcintr, chp) == NULL) { 176 aprint_error_dev(self, "unable to establish interrupt\n"); 177 return; 178 } 179 180 181 sc->sc_wdcdev.sc_atac.atac_pio_cap = 4; 182 sc->sc_wdcdev.sc_atac.atac_dma_cap = 2; 183 sc->sc_wdcdev.sc_atac.atac_udma_cap = 5; 184 sc->sc_wdcdev.sc_atac.atac_cap |= ATAC_CAP_DATA16; 185 sc->sc_wdcdev.sc_atac.atac_cap |= ATAC_CAP_DMA | ATAC_CAP_UDMA; 186 sc->sc_chanptr = chp; 187 sc->sc_wdcdev.sc_atac.atac_channels = &sc->sc_chanptr; 188 sc->sc_wdcdev.sc_atac.atac_nchannels = 1; 189 sc->sc_wdcdev.dma_arg = sc; 190 sc->sc_wdcdev.dma_init = kauai_dma_init; 191 sc->sc_wdcdev.dma_start = kauai_dma_start; 192 sc->sc_wdcdev.dma_finish = kauai_dma_finish; 193 sc->sc_wdcdev.sc_atac.atac_set_modes = kauai_set_modes; 194 sc->sc_calc_timing = calc_timing_kauai; 195 sc->sc_dmareg = (void *)dmabase; 196 197 chp->ch_channel = 0; 198 chp->ch_atac = &sc->sc_wdcdev.sc_atac; 199 chp->ch_queue = &sc->sc_queue; 200 chp->ch_ndrive = 2; 201 wdc_init_shadow_regs(chp); 202 203 wdcattach(chp); 204 } 205 206 void 207 kauai_set_modes(struct ata_channel *chp) 208 { 209 struct kauai_softc *sc = (void *)chp->ch_atac; 210 struct wdc_regs *wdr = CHAN_TO_WDC_REGS(chp); 211 struct ata_drive_datas *drvp0 = &chp->ch_drive[0]; 212 struct ata_drive_datas *drvp1 = &chp->ch_drive[1]; 213 struct ata_drive_datas *drvp; 214 int drive; 215 216 if ((drvp0->drive_flags & DRIVE) && (drvp1->drive_flags & DRIVE)) { 217 drvp0->PIO_mode = drvp1->PIO_mode = 218 min(drvp0->PIO_mode, drvp1->PIO_mode); 219 } 220 221 for (drive = 0; drive < 2; drive++) { 222 drvp = &chp->ch_drive[drive]; 223 if (drvp->drive_flags & DRIVE) { 224 (*sc->sc_calc_timing)(sc, drive); 225 bus_space_write_4(wdr->cmd_iot, wdr->cmd_baseioh, 226 PIO_CONFIG_REG, sc->sc_piotiming_r[drive]); 227 bus_space_write_4(wdr->cmd_iot, wdr->cmd_baseioh, 228 DMA_CONFIG_REG, sc->sc_dmatiming_r[drive]); 229 } 230 } 231 } 232 233 /* 234 * IDE transfer timings 235 */ 236 static const u_int pio_timing_kauai[] = { /* 0xff000fff */ 237 0x08000a92, /* Mode 0 */ 238 0x0800060f, /* 1 */ 239 0x0800038b, /* 2 */ 240 0x05000249, /* 3 */ 241 0x04000148 /* 4 */ 242 }; 243 static const u_int dma_timing_kauai[] = { /* 0x00fff000 */ 244 0x00618000, /* Mode 0 */ 245 0x00209000, /* 1 */ 246 0x00148000 /* 2 */ 247 }; 248 static const u_int udma_timing_kauai[] = { /* 0x0000ffff */ 249 0x000070c0, /* Mode 0 */ 250 0x00005d80, /* 1 */ 251 0x00004a60, /* 2 */ 252 0x00003a50, /* 3 */ 253 0x00002a30, /* 4 */ 254 0x00002921 /* 5 */ 255 }; 256 257 /* 258 * Timing calculation for Kauai. 259 */ 260 void 261 calc_timing_kauai(struct kauai_softc *sc, int drive) 262 { 263 struct ata_channel *chp = &sc->sc_channel; 264 struct ata_drive_datas *drvp = &chp->ch_drive[drive]; 265 int piomode = drvp->PIO_mode; 266 int dmamode = drvp->DMA_mode; 267 int udmamode = drvp->UDMA_mode; 268 u_int pioconf, dmaconf; 269 270 pioconf = pio_timing_kauai[piomode]; 271 272 dmaconf = 0; 273 if (drvp->drive_flags & DRIVE_DMA) 274 dmaconf |= dma_timing_kauai[dmamode]; 275 if (drvp->drive_flags & DRIVE_UDMA) 276 dmaconf |= udma_timing_kauai[udmamode]; 277 278 if (drvp->drive_flags & DRIVE_UDMA) 279 dmaconf |= 1; 280 281 sc->sc_piotiming_r[drive] = sc->sc_piotiming_w[drive] = pioconf; 282 sc->sc_dmatiming_r[drive] = sc->sc_dmatiming_w[drive] = dmaconf; 283 } 284 285 int 286 kauai_dma_init(void *v, int channel, int drive, void *databuf, 287 size_t datalen, int flags) 288 { 289 struct kauai_softc *sc = v; 290 dbdma_command_t *cmdp = sc->sc_dmacmd; 291 struct ata_channel *chp = &sc->sc_channel; 292 struct wdc_regs *wdr = CHAN_TO_WDC_REGS(chp); 293 vaddr_t va = (vaddr_t)databuf; 294 int read = flags & WDC_DMA_READ; 295 int cmd = read ? DBDMA_CMD_IN_MORE : DBDMA_CMD_OUT_MORE; 296 u_int offset; 297 298 bus_space_write_4(wdr->cmd_iot, wdr->cmd_baseioh, DMA_CONFIG_REG, 299 read ? sc->sc_dmatiming_r[drive] : sc->sc_dmatiming_w[drive]); 300 bus_space_read_4(wdr->cmd_iot, wdr->cmd_baseioh, DMA_CONFIG_REG); 301 302 offset = va & PGOFSET; 303 304 /* if va is not page-aligned, setup the first page */ 305 if (offset != 0) { 306 int rest = PAGE_SIZE - offset; /* the rest of the page */ 307 308 if (datalen > rest) { /* if continues to next page */ 309 DBDMA_BUILD(cmdp, cmd, 0, rest, vtophys(va), 310 DBDMA_INT_NEVER, DBDMA_WAIT_NEVER, 311 DBDMA_BRANCH_NEVER); 312 datalen -= rest; 313 va += rest; 314 cmdp++; 315 } 316 } 317 318 /* now va is page-aligned */ 319 while (datalen > PAGE_SIZE) { 320 DBDMA_BUILD(cmdp, cmd, 0, PAGE_SIZE, vtophys(va), 321 DBDMA_INT_NEVER, DBDMA_WAIT_NEVER, DBDMA_BRANCH_NEVER); 322 datalen -= PAGE_SIZE; 323 va += PAGE_SIZE; 324 cmdp++; 325 } 326 327 /* the last page (datalen <= PAGE_SIZE here) */ 328 cmd = read ? DBDMA_CMD_IN_LAST : DBDMA_CMD_OUT_LAST; 329 DBDMA_BUILD(cmdp, cmd, 0, datalen, vtophys(va), 330 DBDMA_INT_NEVER, DBDMA_WAIT_NEVER, DBDMA_BRANCH_NEVER); 331 cmdp++; 332 333 DBDMA_BUILD(cmdp, DBDMA_CMD_STOP, 0, 0, 0, 334 DBDMA_INT_NEVER, DBDMA_WAIT_NEVER, DBDMA_BRANCH_NEVER); 335 336 return 0; 337 } 338 339 void 340 kauai_dma_start(void *v, int channel, int drive) 341 { 342 struct kauai_softc *sc = v; 343 344 dbdma_start(sc->sc_dmareg, sc->sc_dmacmd); 345 } 346 347 int 348 kauai_dma_finish(void *v, int channel, int drive, int read) 349 { 350 struct kauai_softc *sc = v; 351 352 dbdma_stop(sc->sc_dmareg); 353 return 0; 354 } 355 356 /* 357 * Find OF-device corresponding to the PCI device. 358 */ 359 int 360 getnodebypci(pci_chipset_tag_t pc, pcitag_t tag) 361 { 362 int bus, dev, func; 363 u_int reg[5]; 364 int p, q; 365 int l, b, d, f; 366 367 pci_decompose_tag(pc, tag, &bus, &dev, &func); 368 369 for (q = OF_peer(0); q; q = p) { 370 l = OF_getprop(q, "assigned-addresses", reg, sizeof(reg)); 371 if (l > 4) { 372 b = (reg[0] >> 16) & 0xff; 373 d = (reg[0] >> 11) & 0x1f; 374 f = (reg[0] >> 8) & 0x07; 375 376 if (b == bus && d == dev && f == func) 377 return q; 378 } 379 if ((p = OF_child(q))) 380 continue; 381 while (q) { 382 if ((p = OF_peer(q))) 383 break; 384 q = OF_parent(q); 385 } 386 } 387 return 0; 388 } 389
Indexes created Thu Oct 02 14:10:14 GMT 2025