kauai.c revision 1.8
1 /* $NetBSD: kauai.c,v 1.8 2003/12/31 02:50:34 thorpej Exp $ */ 2 3 /*- 4 * Copyright (c) 2003 Tsubai Masanari. All rights reserved. 5 * 6 * Redistribution and use in source and binary forms, with or without 7 * modification, are permitted provided that the following conditions 8 * are met: 9 * 1. Redistributions of source code must retain the above copyright 10 * notice, this list of conditions and the following disclaimer. 11 * 2. Redistributions in binary form must reproduce the above copyright 12 * notice, this list of conditions and the following disclaimer in the 13 * documentation and/or other materials provided with the distribution. 14 * 3. The name of the author may not be used to endorse or promote products 15 * derived from this software without specific prior written permission. 16 * 17 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 18 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 19 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 20 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 21 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 22 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 26 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 27 */ 28 29 #include <sys/cdefs.h> 30 __KERNEL_RCSID(0, "$NetBSD: kauai.c,v 1.8 2003/12/31 02:50:34 thorpej Exp $"); 31 32 #include <sys/param.h> 33 #include <sys/systm.h> 34 #include <sys/device.h> 35 #include <sys/malloc.h> 36 37 #include <uvm/uvm_extern.h> 38 39 #include <machine/bus.h> 40 41 #include <dev/ata/atareg.h> 42 #include <dev/ata/atavar.h> 43 #include <dev/ic/wdcvar.h> 44 45 #include <dev/ofw/openfirm.h> 46 47 #include <dev/pci/pcivar.h> 48 #include <dev/pci/pcireg.h> 49 #include <dev/pci/pcidevs.h> 50 51 #include <macppc/dev/dbdma.h> 52 53 #define WDC_REG_NPORTS 8 54 #define WDC_AUXREG_OFFSET 0x16 55 56 #define PIO_CONFIG_REG (0x200 >> 4) /* PIO and DMA access timing */ 57 #define DMA_CONFIG_REG (0x210 >> 4) /* UDMA access timing */ 58 59 struct kauai_softc { 60 struct wdc_softc sc_wdcdev; 61 struct channel_softc wdc_chanlist[1]; 62 struct channel_softc wdc_channel; 63 struct channel_queue wdc_queue; 64 dbdma_regmap_t *sc_dmareg; 65 dbdma_command_t *sc_dmacmd; 66 u_int sc_piotiming_r[2]; 67 u_int sc_piotiming_w[2]; 68 u_int sc_dmatiming_r[2]; 69 u_int sc_dmatiming_w[2]; 70 void (*sc_calc_timing)(struct kauai_softc *, int); 71 }; 72 73 int kauai_match __P((struct device *, struct cfdata *, void *)); 74 void kauai_attach __P((struct device *, struct device *, void *)); 75 int kauai_dma_init __P((void *, int, int, void *, size_t, int)); 76 void kauai_dma_start __P((void *, int, int)); 77 int kauai_dma_finish __P((void *, int, int, int)); 78 void kauai_set_modes __P((struct channel_softc *)); 79 static void calc_timing_kauai __P((struct kauai_softc *, int)); 80 static int getnodebypci(pci_chipset_tag_t, pcitag_t); 81 82 CFATTACH_DECL(kauai, sizeof(struct kauai_softc), 83 kauai_match, kauai_attach, NULL, wdcactivate); 84 85 int 86 kauai_match(parent, match, aux) 87 struct device *parent; 88 struct cfdata *match; 89 void *aux; 90 { 91 struct pci_attach_args *pa = aux; 92 93 if (PCI_VENDOR(pa->pa_id) == PCI_VENDOR_APPLE && 94 (PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_APPLE_KAUAI || 95 PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_APPLE_UNINORTH_ATA)) 96 return 5; 97 98 return 0; 99 } 100 101 void 102 kauai_attach(parent, self, aux) 103 struct device *parent, *self; 104 void *aux; 105 { 106 struct kauai_softc *sc = (void *)self; 107 struct pci_attach_args *pa = aux; 108 struct channel_softc *chp = &sc->wdc_channel; 109 pci_intr_handle_t ih; 110 paddr_t regbase, dmabase; 111 int node, reg[5], i; 112 113 #ifdef DIAGNOSTIC 114 if ((vaddr_t)sc->sc_dmacmd & 0x0f) { 115 printf(": bad dbdma alignment\n"); 116 return; 117 } 118 #endif 119 120 node = getnodebypci(pa->pa_pc, pa->pa_tag); 121 if (node == 0) { 122 printf(": cannot find gmac node\n"); 123 return; 124 } 125 126 if (OF_getprop(node, "assigned-addresses", reg, sizeof reg) < 12) { 127 printf(": cannot get address property\n"); 128 return; 129 } 130 regbase = reg[2] + 0x2000; 131 dmabase = reg[2] + 0x1000; 132 133 /* 134 * XXX PCI_INTERRUPT_REG seems to be wired to 0. 135 * XXX So use fixed intrpin and intrline values. 136 */ 137 if (pci_conf_read(pa->pa_pc, pa->pa_tag, PCI_INTERRUPT_REG) == 0) { 138 pa->pa_intrpin = 1; 139 pa->pa_intrline = 39; 140 } 141 142 if (pci_intr_map(pa, &ih)) { 143 printf(": unable to map interrupt\n"); 144 return; 145 } 146 printf(": interrupting at %s\n", pci_intr_string(pa->pa_pc, ih)); 147 148 chp->cmd_iot = chp->ctl_iot = macppc_make_bus_space_tag(regbase, 4); 149 150 if (bus_space_map(chp->cmd_iot, 0, WDC_REG_NPORTS, 0, 151 &chp->cmd_baseioh) || 152 bus_space_subregion(chp->cmd_iot, chp->cmd_baseioh, 153 WDC_AUXREG_OFFSET, 1, &chp->ctl_ioh)) { 154 printf("%s: couldn't map registers\n", self->dv_xname); 155 return; 156 } 157 for (i = 0; i < WDC_NREG; i++) { 158 if (bus_space_subregion(chp->cmd_iot, chp->cmd_baseioh, i, 159 i == 0 ? 4 : 1, &chp->cmd_iohs[i]) != 0) { 160 bus_space_unmap(chp->cmd_iot, chp->cmd_baseioh, 161 WDC_REG_NPORTS); 162 printf("%s: couldn't subregion registers\n", 163 sc->sc_wdcdev.sc_dev.dv_xname); 164 return; 165 } 166 } 167 168 if (pci_intr_establish(pa->pa_pc, ih, IPL_BIO, wdcintr, chp) == NULL) { 169 printf("%s: unable to establish interrupt\n", self->dv_xname); 170 return; 171 } 172 173 174 sc->sc_wdcdev.PIO_cap = 4; 175 sc->sc_wdcdev.DMA_cap = 2; 176 sc->sc_wdcdev.UDMA_cap = 5; 177 sc->sc_wdcdev.cap |= WDC_CAPABILITY_DATA16 | WDC_CAPABILITY_MODE; 178 sc->sc_wdcdev.cap |= WDC_CAPABILITY_DMA | WDC_CAPABILITY_UDMA; 179 sc->wdc_chanlist[0] = chp; 180 sc->sc_wdcdev.channels = sc->wdc_chanlist; 181 sc->sc_wdcdev.nchannels = 1; 182 sc->sc_wdcdev.dma_arg = sc; 183 sc->sc_wdcdev.dma_init = kauai_dma_init; 184 sc->sc_wdcdev.dma_start = kauai_dma_start; 185 sc->sc_wdcdev.dma_finish = kauai_dma_finish; 186 sc->sc_wdcdev.set_modes = kauai_set_modes; 187 sc->sc_calc_timing = calc_timing_kauai; 188 sc->sc_dmareg = (void *)dmabase; 189 190 chp->channel = 0; 191 chp->wdc = &sc->sc_wdcdev; 192 chp->ch_queue = &sc->wdc_queue; 193 194 wdcattach(chp); 195 } 196 197 void 198 kauai_set_modes(chp) 199 struct channel_softc *chp; 200 { 201 struct kauai_softc *sc = (void *)chp->wdc; 202 struct ata_drive_datas *drvp0 = &chp->ch_drive[0]; 203 struct ata_drive_datas *drvp1 = &chp->ch_drive[1]; 204 struct ata_drive_datas *drvp; 205 int drive; 206 207 if ((drvp0->drive_flags & DRIVE) && (drvp1->drive_flags & DRIVE)) { 208 drvp0->PIO_mode = drvp1->PIO_mode = 209 min(drvp0->PIO_mode, drvp1->PIO_mode); 210 } 211 212 for (drive = 0; drive < 2; drive++) { 213 drvp = &chp->ch_drive[drive]; 214 if (drvp->drive_flags & DRIVE) { 215 (*sc->sc_calc_timing)(sc, drive); 216 bus_space_write_4(chp->cmd_iot, chp->cmd_baseioh, 217 PIO_CONFIG_REG, sc->sc_piotiming_r[drive]); 218 bus_space_write_4(chp->cmd_iot, chp->cmd_baseioh, 219 DMA_CONFIG_REG, sc->sc_dmatiming_r[drive]); 220 } 221 } 222 } 223 224 /* 225 * IDE transfer timings 226 */ 227 static const u_int pio_timing_kauai[] = { /* 0xff000fff */ 228 0x08000a92, /* Mode 0 */ 229 0x0800060f, /* 1 */ 230 0x0800038b, /* 2 */ 231 0x05000249, /* 3 */ 232 0x04000148 /* 4 */ 233 }; 234 static const u_int dma_timing_kauai[] = { /* 0x00fff000 */ 235 0x00618000, /* Mode 0 */ 236 0x00209000, /* 1 */ 237 0x00148000 /* 2 */ 238 }; 239 static const u_int udma_timing_kauai[] = { /* 0x0000ffff */ 240 0x000070c0, /* Mode 0 */ 241 0x00005d80, /* 1 */ 242 0x00004a60, /* 2 */ 243 0x00003a50, /* 3 */ 244 0x00002a30, /* 4 */ 245 0x00002921 /* 5 */ 246 }; 247 248 /* 249 * Timing calculation for Kauai. 250 */ 251 void 252 calc_timing_kauai(sc, drive) 253 struct kauai_softc *sc; 254 int drive; 255 { 256 struct channel_softc *chp = &sc->wdc_channel; 257 struct ata_drive_datas *drvp = &chp->ch_drive[drive]; 258 int piomode = drvp->PIO_mode; 259 int dmamode = drvp->DMA_mode; 260 int udmamode = drvp->UDMA_mode; 261 u_int pioconf, dmaconf; 262 263 pioconf = pio_timing_kauai[piomode]; 264 265 dmaconf = 0; 266 if (drvp->drive_flags & DRIVE_DMA) 267 dmaconf |= dma_timing_kauai[dmamode]; 268 if (drvp->drive_flags & DRIVE_UDMA) 269 dmaconf |= udma_timing_kauai[udmamode]; 270 271 if (drvp->drive_flags & DRIVE_UDMA) 272 dmaconf |= 1; 273 274 sc->sc_piotiming_r[drive] = sc->sc_piotiming_w[drive] = pioconf; 275 sc->sc_dmatiming_r[drive] = sc->sc_dmatiming_w[drive] = dmaconf; 276 } 277 278 int 279 kauai_dma_init(v, channel, drive, databuf, datalen, flags) 280 void *v; 281 void *databuf; 282 size_t datalen; 283 int flags; 284 { 285 struct kauai_softc *sc = v; 286 dbdma_command_t *cmdp = sc->sc_dmacmd; 287 struct channel_softc *chp = &sc->wdc_channel; 288 vaddr_t va = (vaddr_t)databuf; 289 int read = flags & WDC_DMA_READ; 290 int cmd = read ? DBDMA_CMD_IN_MORE : DBDMA_CMD_OUT_MORE; 291 u_int offset; 292 293 bus_space_write_4(chp->cmd_iot, chp->cmd_baseioh, DMA_CONFIG_REG, 294 read ? sc->sc_dmatiming_r[drive] : sc->sc_dmatiming_w[drive]); 295 bus_space_read_4(chp->cmd_iot, chp->cmd_baseioh, DMA_CONFIG_REG); 296 297 offset = va & PGOFSET; 298 299 /* if va is not page-aligned, setup the first page */ 300 if (offset != 0) { 301 int rest = PAGE_SIZE - offset; /* the rest of the page */ 302 303 if (datalen > rest) { /* if continues to next page */ 304 DBDMA_BUILD(cmdp, cmd, 0, rest, vtophys(va), 305 DBDMA_INT_NEVER, DBDMA_WAIT_NEVER, 306 DBDMA_BRANCH_NEVER); 307 datalen -= rest; 308 va += rest; 309 cmdp++; 310 } 311 } 312 313 /* now va is page-aligned */ 314 while (datalen > PAGE_SIZE) { 315 DBDMA_BUILD(cmdp, cmd, 0, PAGE_SIZE, vtophys(va), 316 DBDMA_INT_NEVER, DBDMA_WAIT_NEVER, DBDMA_BRANCH_NEVER); 317 datalen -= PAGE_SIZE; 318 va += PAGE_SIZE; 319 cmdp++; 320 } 321 322 /* the last page (datalen <= PAGE_SIZE here) */ 323 cmd = read ? DBDMA_CMD_IN_LAST : DBDMA_CMD_OUT_LAST; 324 DBDMA_BUILD(cmdp, cmd, 0, datalen, vtophys(va), 325 DBDMA_INT_NEVER, DBDMA_WAIT_NEVER, DBDMA_BRANCH_NEVER); 326 cmdp++; 327 328 DBDMA_BUILD(cmdp, DBDMA_CMD_STOP, 0, 0, 0, 329 DBDMA_INT_NEVER, DBDMA_WAIT_NEVER, DBDMA_BRANCH_NEVER); 330 331 return 0; 332 } 333 334 void 335 kauai_dma_start(v, channel, drive) 336 void *v; 337 int channel, drive; 338 { 339 struct kauai_softc *sc = v; 340 341 dbdma_start(sc->sc_dmareg, sc->sc_dmacmd); 342 } 343 344 int 345 kauai_dma_finish(v, channel, drive, read) 346 void *v; 347 int channel, drive; 348 int read; 349 { 350 struct kauai_softc *sc = v; 351 352 dbdma_stop(sc->sc_dmareg); 353 return 0; 354 } 355 356 /* 357 * Find OF-device corresponding to the PCI device. 358 */ 359 int 360 getnodebypci(pc, tag) 361 pci_chipset_tag_t pc; 362 pcitag_t tag; 363 { 364 int bus, dev, func; 365 u_int reg[5]; 366 int p, q; 367 int l, b, d, f; 368 369 pci_decompose_tag(pc, tag, &bus, &dev, &func); 370 371 for (q = OF_peer(0); q; q = p) { 372 l = OF_getprop(q, "assigned-addresses", reg, sizeof(reg)); 373 if (l > 4) { 374 b = (reg[0] >> 16) & 0xff; 375 d = (reg[0] >> 11) & 0x1f; 376 f = (reg[0] >> 8) & 0x07; 377 378 if (b == bus && d == dev && f == func) 379 return q; 380 } 381 if ((p = OF_child(q))) 382 continue; 383 while (q) { 384 if ((p = OF_peer(q))) 385 break; 386 q = OF_parent(q); 387 } 388 } 389 return 0; 390 } 391
Indexes created Fri Oct 03 02:09:57 GMT 2025