ki2c.c revision 1.31.2.1 1 /* $NetBSD: ki2c.c,v 1.31.2.1 2021/05/08 21:58:12 thorpej Exp $ */
2 /* Id: ki2c.c,v 1.7 2002/10/05 09:56:05 tsubai Exp */
3
4 /*-
5 * Copyright (c) 2001 Tsubai Masanari. All rights reserved.
6 *
7 * Redistribution and use in source and binary forms, with or without
8 * modification, are permitted provided that the following conditions
9 * are met:
10 * 1. Redistributions of source code must retain the above copyright
11 * notice, this list of conditions and the following disclaimer.
12 * 2. Redistributions in binary form must reproduce the above copyright
13 * notice, this list of conditions and the following disclaimer in the
14 * documentation and/or other materials provided with the distribution.
15 * 3. The name of the author may not be used to endorse or promote products
16 * derived from this software without specific prior written permission.
17 *
18 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
19 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
20 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
21 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
22 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
23 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
24 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
25 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
26 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
27 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
28 */
29
30 #include <sys/param.h>
31 #include <sys/device.h>
32 #include <sys/systm.h>
33 #include <sys/kmem.h>
34 #include <sys/mutex.h>
35
36 #include <dev/ofw/openfirm.h>
37 #include <machine/autoconf.h>
38
39 #include "opt_ki2c.h"
40 #include <macppc/dev/ki2cvar.h>
41
42 #include "locators.h"
43
44 #ifdef KI2C_DEBUG
45 #define DPRINTF printf
46 #else
47 #define DPRINTF while (0) printf
48 #endif
49
50 static int ki2c_match(device_t, cfdata_t, void *);
51 static void ki2c_attach(device_t, device_t, void *);
52 static int ki2c_intr(struct ki2c_softc *);
53
54 /* I2C glue */
55 static int ki2c_i2c_exec(void *, i2c_op_t, i2c_addr_t, const void *,
56 size_t, void *, size_t, int);
57 static int ki2c_i2c_acquire_bus(void *, int);
58 static void ki2c_i2c_release_bus(void *, int);
59
60 CFATTACH_DECL_NEW(ki2c, sizeof(struct ki2c_softc), ki2c_match, ki2c_attach,
61 NULL, NULL);
62
63 static prop_dictionary_t
64 ki2c_i2c_device_props(struct ki2c_softc *sc, int node)
65 {
66 prop_dictionary_t props = prop_dictionary_create();
67 uint32_t reg;
68 char descr[32], num[8];
69
70 /* We're fetching descriptions for sensors. */
71
72 for (node = OF_child(node); node != 0; node = OF_peer(node)) {
73 if (of_getprop_uint32(node, "reg", ®) == -1) {
74 continue;
75 }
76 if (OF_getprop(node, "location", descr, sizeof(descr)) <= 0) {
77 continue;
78 }
79 snprintf(num, sizeof(num), "s%02x", reg);
80
81 aprint_debug_dev(sc->sc_dev,
82 "%s: sensor %s -> %s\n", __func__, num, descr);
83
84 prop_dictionary_set_string(props, num, descr);
85 }
86
87 return props;
88 }
89
90 static bool
91 ki2c_i2c_enumerate_device(struct ki2c_softc *sc, device_t dev, int node,
92 const char *name, uint32_t addr,
93 struct i2c_enumerate_devices_args * const args)
94 {
95 int compat_size;
96 prop_dictionary_t props;
97 char compat_buf[32];
98 char *compat;
99 bool cbrv;
100
101 compat_size = OF_getproplen(node, "compatible");
102 if (compat_size <= 0) {
103 /* some i2c device nodes don't have 'compatible' */
104 aprint_debug_dev(sc->sc_dev,
105 "no compatible property for phandle %d; using '%s'\n",
106 node, name);
107 compat = compat_buf;
108 strlcpy(compat, name, sizeof(compat));
109 compat_size = strlen(compat) + 1;
110 } else {
111 compat = kmem_tmpbuf_alloc(compat_size, compat_buf,
112 sizeof(compat_buf), KM_SLEEP);
113 if (OF_getprop(node, "compatible", compat,
114 sizeof(compat)) <= 0) {
115 aprint_error_dev(sc->sc_dev,
116 "unable to get compatible property for "
117 "phandle %d ('%s')\n", node, name);
118 goto bad;
119 }
120 }
121
122 props = ki2c_i2c_device_props(sc, node);
123
124 args->ia->ia_addr = (i2c_addr_t)addr;
125 args->ia->ia_name = name;
126 args->ia->ia_clist = compat;
127 args->ia->ia_clist_size = compat_size;
128 args->ia->ia_prop = props;
129 args->ia->ia_devhandle = devhandle_from_of(node);
130
131 cbrv = args->callback(dev, args);
132
133 prop_object_release(props);
134
135 return cbrv; /* callback decides if we keep enumerating */
136
137 bad:
138 if (compat != compat_buf) {
139 kmem_tmpbuf_free(compat, compat_size, compat_buf);
140 }
141 return true; /* keep enumerating */
142 }
143
144 static int
145 ki2c_i2c_enumerate_devices(device_t dev, devhandle_t call_handle, void *v)
146 {
147 struct i2c_enumerate_devices_args *args = v;
148 int bus_phandle, node;
149 uint32_t addr;
150 char name[32];
151
152 /* dev is the "iic" bus instance. ki2c channel is in args. */
153 struct ki2c_channel *ch = args->ia->ia_tag->ic_cookie;
154 struct ki2c_softc *sc = ch->ch_ki2c;
155
156 /*
157 * If we're not using the separate nodes scheme, we need
158 * to filter out devices from the other channel. We detect
159 * this by comparing the bus phandle to the controller phandle,
160 * and if they match, we are NOT using the separate nodes
161 * scheme.
162 */
163 bus_phandle = devhandle_to_of(device_handle(dev));
164 bool filter_by_channel =
165 bus_phandle == devhandle_to_of(device_handle(sc->sc_dev));
166
167 for (node = OF_child(bus_phandle); node != 0; node = OF_peer(node)) {
168 if (OF_getprop(node, "name", name, sizeof(name)) <= 0) {
169 aprint_error_dev(sc->sc_dev,
170 "unable to get name property for phandle %d\n",
171 node);
172 continue;
173 }
174 if (of_getprop_uint32(node, "reg", &addr) == -1 &&
175 of_getprop_uint32(node, "i2c-address", &addr) == -1) {
176 aprint_error_dev(sc->sc_dev,
177 "unable to get i2c address for phandle %d ('%s')\n",
178 node, name);
179 continue;
180 }
181 if (filter_by_channel && ((addr >> 8) & 1) != ch->ch_channel) {
182 continue;
183 }
184 addr = (addr & 0xff) >> 1;
185 if (!ki2c_i2c_enumerate_device(sc, dev, node, name, addr,
186 args)) {
187 break;
188 }
189 }
190
191 return 0;
192 }
193
194 static device_call_t
195 ki2c_devhandle_lookup_device_call(devhandle_t handle, const char *name,
196 devhandle_t *call_handlep)
197 {
198 if (strcmp(name, "i2c-enumerate-devices") == 0) {
199 return ki2c_i2c_enumerate_devices;
200 }
201
202 /* Defer everything else to the "super". */
203 return NULL;
204 }
205
206 static inline uint8_t
207 ki2c_readreg(struct ki2c_softc *sc, int reg)
208 {
209
210 return bus_space_read_1(sc->sc_tag, sc->sc_bh, sc->sc_regstep * reg);
211 }
212
213 static inline void
214 ki2c_writereg(struct ki2c_softc *sc, int reg, uint8_t val)
215 {
216
217 bus_space_write_1(sc->sc_tag, sc->sc_bh, reg * sc->sc_regstep, val);
218 delay(10);
219 }
220
221 #if 0
222 static u_int
223 ki2c_getmode(struct ki2c_softc *sc)
224 {
225 return ki2c_readreg(sc, MODE) & I2C_MODE;
226 }
227 #endif
228
229 static void
230 ki2c_setmode(struct ki2c_softc *sc, u_int mode)
231 {
232 ki2c_writereg(sc, MODE, mode);
233 }
234
235 #if 0
236 static u_int
237 ki2c_getspeed(struct ki2c_softc *sc)
238 {
239 return ki2c_readreg(sc, MODE) & I2C_SPEED;
240 }
241 #endif
242
243 static void
244 ki2c_setspeed(struct ki2c_softc *sc, u_int speed)
245 {
246 u_int x;
247
248 KASSERT((speed & ~I2C_SPEED) == 0);
249 x = ki2c_readreg(sc, MODE);
250 x &= ~I2C_SPEED;
251 x |= speed;
252 ki2c_writereg(sc, MODE, x);
253 }
254
255 static int
256 ki2c_match(device_t parent, cfdata_t match, void *aux)
257 {
258 struct confargs *ca = aux;
259
260 if (strcmp(ca->ca_name, "i2c") == 0)
261 return 1;
262
263 return 0;
264 }
265
266 static void
267 ki2c_attach(device_t parent, device_t self, void *aux)
268 {
269 struct ki2c_softc *sc = device_private(self);
270 struct confargs *ca = aux;
271 struct ki2c_channel *ch;
272 int node = ca->ca_node;
273 uint32_t channel, addr;
274 int i, rate, child;
275 struct i2cbus_attach_args iba;
276 devhandle_t devhandle;
277 char name[32];
278
279 sc->sc_dev = self;
280 sc->sc_tag = ca->ca_tag;
281 ca->ca_reg[0] += ca->ca_baseaddr;
282
283 if (OF_getprop(node, "AAPL,i2c-rate", &rate, 4) != 4) {
284 aprint_error(": cannot get i2c-rate\n");
285 return;
286 }
287 if (OF_getprop(node, "AAPL,address", &addr, 4) != 4) {
288 aprint_error(": unable to find i2c address\n");
289 return;
290 }
291 if (bus_space_map(sc->sc_tag, addr, PAGE_SIZE, 0, &sc->sc_bh) != 0) {
292 aprint_error_dev(sc->sc_dev, "failed to map registers\n");
293 return;
294 }
295
296 if (OF_getprop(node, "AAPL,address-step", &sc->sc_regstep, 4) != 4) {
297 aprint_error(": unable to find i2c address step\n");
298 return;
299 }
300
301 printf("\n");
302
303 ki2c_writereg(sc, STATUS, 0);
304 ki2c_writereg(sc, ISR, 0);
305 ki2c_writereg(sc, IER, 0);
306
307 ki2c_setmode(sc, I2C_STDSUBMODE);
308 ki2c_setspeed(sc, I2C_100kHz); /* XXX rate */
309
310 ki2c_writereg(sc, IER,I2C_INT_DATA|I2C_INT_ADDR|I2C_INT_STOP);
311
312 /*
313 * Two physical I2C busses share a single controller. It's not
314 * quite a mux, which is why we don't attach it that way.
315 *
316 * The locking order is:
317 *
318 * iic bus mutex -> ctrl_lock
319 *
320 * ctrl_lock is taken in ki2c_i2c_acquire_bus.
321 */
322 mutex_init(&sc->sc_ctrl_lock, MUTEX_DEFAULT, IPL_NONE);
323
324 /* Set up the channel structures. */
325 for (i = 0; i < KI2C_MAX_I2C_CHANNELS; i++) {
326 ch = &sc->sc_channels[i];
327
328 iic_tag_init(&ch->ch_i2c);
329 ch->ch_i2c.ic_cookie = ch;
330 ch->ch_i2c.ic_acquire_bus = ki2c_i2c_acquire_bus;
331 ch->ch_i2c.ic_release_bus = ki2c_i2c_release_bus;
332 ch->ch_i2c.ic_exec = ki2c_i2c_exec;
333
334 ch->ch_ki2c = sc;
335 ch->ch_channel = i;
336 }
337
338 /*
339 * Different systems have different I2C device tree topologies.
340 *
341 * Some systems use a scheme like this:
342 *
343 * /u3@0,f8000000/i2c@f8001000/temp-monitor@98
344 * /u3@0,f8000000/i2c@f8001000/fan@15e
345 *
346 * Here, we see the channel encoded in bit #8 of the address.
347 *
348 * Other systems use a scheme like this:
349 *
350 * /ht@0,f2000000/pci@4000,0,0/mac-io@7/i2c@18000/i2c-bus@0
351 * /ht@0,f2000000/pci@4000,0,0/mac-io@7/i2c@18000/i2c-bus@0/codec@8c
352 *
353 * /u4@0,f8000000/i2c@f8001000/i2c-bus@1
354 * /u4@0,f8000000/i2c@f8001000/i2c-bus@1/temp-monitor@94
355 *
356 * Here, a separate device tree node represents the channel.
357 * Note that in BOTH cases, the I2C address of the devices are
358 * shifted left by 1 (as it would be on the wire to leave room
359 * for the read/write bit).
360 *
361 * So, what we're going to do here is look for i2c-bus nodes. If
362 * we find them, we remember those phandles, and will use them for
363 * device enumeration. If we don't, then we will use the controller
364 * phandle for device enumeration and filter based on the channel
365 * bit in the "reg" property.
366 */
367 int i2c_bus_phandles[KI2C_MAX_I2C_CHANNELS] = { 0 };
368 bool separate_nodes_scheme = false;
369 for (child = OF_child(node); child != 0; child = OF_peer(child)) {
370 OF_getprop(child, "name", name, sizeof(name));
371 if (strcmp(name, "i2c-bus") == 0) {
372 separate_nodes_scheme = true;
373 if (of_getprop_uint32(child, "reg", &channel) == -1) {
374 continue;
375 }
376 if (channel >= KI2C_MAX_I2C_CHANNELS) {
377 continue;
378 }
379 i2c_bus_phandles[channel] = child;
380 }
381 }
382
383 /*
384 * Set up our handle implementation (we provide our own
385 * i2c enumeration call).
386 */
387 devhandle = device_handle(self);
388 devhandle_impl_inherit(&sc->sc_devhandle_impl, devhandle.impl);
389 sc->sc_devhandle_impl.lookup_device_call =
390 ki2c_devhandle_lookup_device_call;
391
392 for (i = 0; i < KI2C_MAX_I2C_CHANNELS; i++) {
393 int locs[I2CBUSCF_NLOCS];
394
395 ch = &sc->sc_channels[i];
396
397 if (separate_nodes_scheme) {
398 if (i2c_bus_phandles[i] == 0) {
399 /*
400 * This wasn't represented (either at all
401 * or not correctly) in the device tree,
402 * so skip attaching the "iic" instance.
403 */
404 continue;
405 }
406 devhandle = devhandle_from_of(i2c_bus_phandles[i]);
407 } else {
408 devhandle = device_handle(self);
409 }
410 devhandle.impl = &sc->sc_devhandle_impl;
411
412 locs[I2CBUSCF_BUS] = ch->ch_channel;
413
414 memset(&iba, 0, sizeof(iba));
415 iba.iba_tag = &ch->ch_i2c;
416 iba.iba_bus = ch->ch_channel;
417 config_found(sc->sc_dev, &iba, iicbus_print_multi,
418 CFARG_SUBMATCH, config_stdsubmatch,
419 CFARG_LOCATORS, locs,
420 CFARG_DEVHANDLE, devhandle,
421 CFARG_EOL);
422 }
423
424 }
425
426 static int
427 ki2c_intr(struct ki2c_softc *sc)
428 {
429 u_int isr, x;
430
431 isr = ki2c_readreg(sc, ISR);
432 if (isr & I2C_INT_ADDR) {
433 #if 0
434 if ((ki2c_readreg(sc, STATUS) & I2C_ST_LASTAAK) == 0) {
435 /* No slave responded. */
436 sc->sc_flags |= I2C_ERROR;
437 goto out;
438 }
439 #endif
440
441 if (sc->sc_flags & I2C_READING) {
442 if (sc->sc_resid > 1) {
443 x = ki2c_readreg(sc, CONTROL);
444 x |= I2C_CT_AAK;
445 ki2c_writereg(sc, CONTROL, x);
446 }
447 } else {
448 ki2c_writereg(sc, DATA, *sc->sc_data++);
449 sc->sc_resid--;
450 }
451 }
452
453 if (isr & I2C_INT_DATA) {
454 if (sc->sc_flags & I2C_READING) {
455 *sc->sc_data++ = ki2c_readreg(sc, DATA);
456 sc->sc_resid--;
457
458 if (sc->sc_resid == 0) { /* Completed */
459 ki2c_writereg(sc, CONTROL, 0);
460 goto out;
461 }
462 } else {
463 #if 0
464 if ((ki2c_readreg(sc, STATUS) & I2C_ST_LASTAAK) == 0) {
465 /* No slave responded. */
466 sc->sc_flags |= I2C_ERROR;
467 goto out;
468 }
469 #endif
470
471 if (sc->sc_resid == 0) {
472 x = ki2c_readreg(sc, CONTROL) | I2C_CT_STOP;
473 ki2c_writereg(sc, CONTROL, x);
474 } else {
475 ki2c_writereg(sc, DATA, *sc->sc_data++);
476 sc->sc_resid--;
477 }
478 }
479 }
480
481 out:
482 if (isr & I2C_INT_STOP) {
483 ki2c_writereg(sc, CONTROL, 0);
484 sc->sc_flags &= ~I2C_BUSY;
485 }
486
487 ki2c_writereg(sc, ISR, isr);
488
489 return 1;
490 }
491
492 static int
493 ki2c_poll(struct ki2c_softc *sc, int timo)
494 {
495 while (sc->sc_flags & I2C_BUSY) {
496 if (ki2c_readreg(sc, ISR))
497 ki2c_intr(sc);
498 timo -= 100;
499 if (timo < 0) {
500 DPRINTF("i2c_poll: timeout\n");
501 return ETIMEDOUT;
502 }
503 delay(100);
504 }
505 return 0;
506 }
507
508 static int
509 ki2c_start(struct ki2c_softc *sc, int addr, int subaddr, void *data, int len)
510 {
511 int rw = (sc->sc_flags & I2C_READING) ? 1 : 0;
512 int error, timo, x;
513
514 KASSERT((addr & 1) == 0);
515
516 sc->sc_data = data;
517 sc->sc_resid = len;
518 sc->sc_flags |= I2C_BUSY;
519
520 timo = 1000 + len * 200;
521
522 /* XXX TAS3001 sometimes takes 50ms to finish writing registers. */
523 /* if (addr == 0x68) */
524 timo += 100000;
525
526 ki2c_writereg(sc, ADDR, addr | rw);
527 ki2c_writereg(sc, SUBADDR, subaddr);
528
529 x = ki2c_readreg(sc, CONTROL) | I2C_CT_ADDR;
530 ki2c_writereg(sc, CONTROL, x);
531
532 if ((error = ki2c_poll(sc, timo)) != 0)
533 return error;
534
535 if (sc->sc_flags & I2C_ERROR) {
536 DPRINTF("I2C_ERROR\n");
537 return EIO;
538 }
539 return 0;
540 }
541
542 static int
543 ki2c_read(struct ki2c_softc *sc, int addr, int subaddr, void *data, int len)
544 {
545 sc->sc_flags = I2C_READING;
546 DPRINTF("ki2c_read: %02x %d\n", addr, len);
547 return ki2c_start(sc, addr, subaddr, data, len);
548 }
549
550 static int
551 ki2c_write(struct ki2c_softc *sc, int addr, int subaddr, void *data, int len)
552 {
553 sc->sc_flags = 0;
554 DPRINTF("ki2c_write: %02x %d\n",addr,len);
555 return ki2c_start(sc, addr, subaddr, data, len);
556 }
557
558 static int
559 ki2c_i2c_acquire_bus(void * const v, int const flags)
560 {
561 struct ki2c_channel *ch = v;
562 struct ki2c_softc *sc = ch->ch_ki2c;
563
564 if (flags & I2C_F_POLL) {
565 if (! mutex_tryenter(&sc->sc_ctrl_lock)) {
566 return EBUSY;
567 }
568 } else {
569 mutex_enter(&sc->sc_ctrl_lock);
570 }
571 return 0;
572 }
573
574 static void
575 ki2c_i2c_release_bus(void * const v, int const flags)
576 {
577 struct ki2c_channel *ch = v;
578 struct ki2c_softc *sc = ch->ch_ki2c;
579
580 mutex_exit(&sc->sc_ctrl_lock);
581 }
582
583 int
584 ki2c_i2c_exec(void *cookie, i2c_op_t op, i2c_addr_t addr, const void *vcmd,
585 size_t cmdlen, void *vbuf, size_t buflen, int flags)
586 {
587 struct ki2c_channel *ch = cookie;
588 struct ki2c_softc *sc = ch->ch_ki2c;
589 int i, error;
590 size_t w_len;
591 uint8_t *wp;
592 uint8_t wrbuf[I2C_EXEC_MAX_CMDLEN + I2C_EXEC_MAX_CMDLEN];
593 uint8_t channel;
594
595 /*
596 * We don't have any idea if the ki2c controller can execute
597 * i2c quick_{read,write} operations, so if someone tries one,
598 * return an error.
599 */
600 if (cmdlen == 0 && buflen == 0)
601 return ENOTSUP;
602
603 /* Don't support 10-bit addressing. */
604 if (addr > 0x7f)
605 return ENOTSUP;
606
607 channel = ch->ch_channel == 1 ? 0x10 : 0x00;
608
609 /* we handle the subaddress stuff ourselves */
610 ki2c_setmode(sc, channel | I2C_STDMODE);
611 ki2c_setspeed(sc, I2C_50kHz);
612
613 /* Write-buffer defaults to vcmd */
614 wp = (uint8_t *)(__UNCONST(vcmd));
615 w_len = cmdlen;
616
617 /*
618 * Concatenate vcmd and vbuf for write operations
619 *
620 * Drivers written specifically for ki2c might already do this,
621 * but "generic" i2c drivers still provide separate arguments
622 * for the cmd and buf parts of iic_smbus_write_{byte,word}.
623 */
624 if (I2C_OP_WRITE_P(op) && buflen != 0) {
625 if (cmdlen == 0) {
626 wp = (uint8_t *)vbuf;
627 w_len = buflen;
628 } else {
629 KASSERT((cmdlen + buflen) <= sizeof(wrbuf));
630 wp = (uint8_t *)(__UNCONST(vcmd));
631 w_len = 0;
632 for (i = 0; i < cmdlen; i++)
633 wrbuf[w_len++] = *wp++;
634 wp = (uint8_t *)vbuf;
635 for (i = 0; i < buflen; i++)
636 wrbuf[w_len++] = *wp++;
637 wp = wrbuf;
638 }
639 }
640
641 if (w_len > 0) {
642 error = ki2c_write(sc, addr << 1, 0, wp, w_len);
643 if (error) {
644 return error;
645 }
646 }
647
648 if (I2C_OP_READ_P(op)) {
649 error = ki2c_read(sc, addr << 1, 0, vbuf, buflen);
650 if (error) {
651 return error;
652 }
653 }
654 return 0;
655 }
656