ki2c.c revision 1.32.2.2 1 /* $NetBSD: ki2c.c,v 1.32.2.2 2021/09/10 15:45:28 thorpej Exp $ */
2 /* Id: ki2c.c,v 1.7 2002/10/05 09:56:05 tsubai Exp */
3
4 /*-
5 * Copyright (c) 2001 Tsubai Masanari. All rights reserved.
6 *
7 * Redistribution and use in source and binary forms, with or without
8 * modification, are permitted provided that the following conditions
9 * are met:
10 * 1. Redistributions of source code must retain the above copyright
11 * notice, this list of conditions and the following disclaimer.
12 * 2. Redistributions in binary form must reproduce the above copyright
13 * notice, this list of conditions and the following disclaimer in the
14 * documentation and/or other materials provided with the distribution.
15 * 3. The name of the author may not be used to endorse or promote products
16 * derived from this software without specific prior written permission.
17 *
18 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
19 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
20 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
21 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
22 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
23 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
24 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
25 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
26 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
27 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
28 */
29
30 #include <sys/param.h>
31 #include <sys/device.h>
32 #include <sys/systm.h>
33 #include <sys/kmem.h>
34 #include <sys/mutex.h>
35
36 #include <dev/ofw/openfirm.h>
37 #include <machine/autoconf.h>
38
39 #include "opt_ki2c.h"
40 #include <macppc/dev/ki2cvar.h>
41
42 #include "locators.h"
43
44 #ifdef KI2C_DEBUG
45 #define DPRINTF printf
46 #else
47 #define DPRINTF while (0) printf
48 #endif
49
50 static int ki2c_match(device_t, cfdata_t, void *);
51 static void ki2c_attach(device_t, device_t, void *);
52 static int ki2c_intr(struct ki2c_softc *);
53
54 /* I2C glue */
55 static int ki2c_i2c_exec(void *, i2c_op_t, i2c_addr_t, const void *,
56 size_t, void *, size_t, int);
57 static int ki2c_i2c_acquire_bus(void *, int);
58 static void ki2c_i2c_release_bus(void *, int);
59
60 CFATTACH_DECL_NEW(ki2c, sizeof(struct ki2c_softc), ki2c_match, ki2c_attach,
61 NULL, NULL);
62
63 static prop_dictionary_t
64 ki2c_i2c_device_props(struct ki2c_softc *sc, int node)
65 {
66 prop_dictionary_t props = prop_dictionary_create();
67 uint32_t reg;
68 char descr[32], num[8];
69
70 /* We're fetching descriptions for sensors. */
71 /* XXX This is a terrible hack and should not be done this way XXX */
72
73 for (node = OF_child(node); node != 0; node = OF_peer(node)) {
74 if (of_getprop_uint32(node, "reg", ®) == -1) {
75 continue;
76 }
77 if (OF_getprop(node, "location", descr, sizeof(descr)) <= 0) {
78 continue;
79 }
80 snprintf(num, sizeof(num), "s%02x", reg);
81
82 aprint_debug_dev(sc->sc_dev,
83 "%s: sensor %s -> %s\n", __func__, num, descr);
84
85 prop_dictionary_set_string(props, num, descr);
86 }
87
88 return props;
89 }
90
91 static bool
92 ki2c_i2c_enumerate_device(struct ki2c_softc *sc, device_t dev, int node,
93 const char *name, uint32_t addr,
94 struct i2c_enumerate_devices_args * const args)
95 {
96 int compat_size;
97 prop_dictionary_t props;
98 char compat_buf[32];
99 char *compat;
100 bool cbrv;
101
102 compat_size = OF_getproplen(node, "compatible");
103 if (compat_size <= 0) {
104 /* some i2c device nodes don't have 'compatible' */
105 aprint_debug_dev(sc->sc_dev,
106 "no compatible property for phandle %d; using '%s'\n",
107 node, name);
108 compat = compat_buf;
109 strlcpy(compat, name, sizeof(compat));
110 compat_size = strlen(compat) + 1;
111 } else {
112 compat = kmem_tmpbuf_alloc(compat_size, compat_buf,
113 sizeof(compat_buf), KM_SLEEP);
114 if (OF_getprop(node, "compatible", compat,
115 sizeof(compat)) <= 0) {
116 aprint_error_dev(sc->sc_dev,
117 "unable to get compatible property for "
118 "phandle %d ('%s')\n", node, name);
119 goto bad;
120 }
121 }
122
123 props = ki2c_i2c_device_props(sc, node);
124
125 args->ia->ia_addr = (i2c_addr_t)addr;
126 args->ia->ia_name = name;
127 args->ia->ia_clist = compat;
128 args->ia->ia_clist_size = compat_size;
129 args->ia->ia_prop = props;
130 args->ia->ia_devhandle = devhandle_from_of(node);
131
132 cbrv = args->callback(dev, args);
133
134 prop_object_release(props);
135
136 return cbrv; /* callback decides if we keep enumerating */
137
138 bad:
139 if (compat != compat_buf) {
140 kmem_tmpbuf_free(compat, compat_size, compat_buf);
141 }
142 return true; /* keep enumerating */
143 }
144
145 static int
146 ki2c_i2c_enumerate_devices(device_t dev, devhandle_t call_handle, void *v)
147 {
148 struct i2c_enumerate_devices_args *args = v;
149 int bus_phandle, node;
150 uint32_t addr;
151 char name[32];
152
153 /* dev is the "iic" bus instance. ki2c channel is in args. */
154 struct ki2c_channel *ch = args->ia->ia_tag->ic_cookie;
155 struct ki2c_softc *sc = ch->ch_ki2c;
156
157 /*
158 * If we're not using the separate nodes scheme, we need
159 * to filter out devices from the other channel. We detect
160 * this by comparing the bus phandle to the controller phandle,
161 * and if they match, we are NOT using the separate nodes
162 * scheme.
163 */
164 bus_phandle = devhandle_to_of(device_handle(dev));
165 bool filter_by_channel =
166 bus_phandle == devhandle_to_of(device_handle(sc->sc_dev));
167
168 for (node = OF_child(bus_phandle); node != 0; node = OF_peer(node)) {
169 if (OF_getprop(node, "name", name, sizeof(name)) <= 0) {
170 aprint_error_dev(sc->sc_dev,
171 "unable to get name property for phandle %d\n",
172 node);
173 continue;
174 }
175 if (of_getprop_uint32(node, "reg", &addr) == -1 &&
176 of_getprop_uint32(node, "i2c-address", &addr) == -1) {
177 aprint_error_dev(sc->sc_dev,
178 "unable to get i2c address for phandle %d ('%s')\n",
179 node, name);
180 continue;
181 }
182 if (filter_by_channel && ((addr >> 8) & 1) != ch->ch_channel) {
183 continue;
184 }
185 addr = (addr & 0xff) >> 1;
186 if (!ki2c_i2c_enumerate_device(sc, dev, node, name, addr,
187 args)) {
188 break;
189 }
190 }
191
192 return 0;
193 }
194
195 static device_call_t
196 ki2c_devhandle_lookup_device_call(devhandle_t handle, const char *name,
197 devhandle_t *call_handlep)
198 {
199 if (strcmp(name, "i2c-enumerate-devices") == 0) {
200 return ki2c_i2c_enumerate_devices;
201 }
202
203 /* Defer everything else to the "super". */
204 return NULL;
205 }
206
207 static inline uint8_t
208 ki2c_readreg(struct ki2c_softc *sc, int reg)
209 {
210
211 return bus_space_read_1(sc->sc_tag, sc->sc_bh, sc->sc_regstep * reg);
212 }
213
214 static inline void
215 ki2c_writereg(struct ki2c_softc *sc, int reg, uint8_t val)
216 {
217
218 bus_space_write_1(sc->sc_tag, sc->sc_bh, reg * sc->sc_regstep, val);
219 delay(10);
220 }
221
222 #if 0
223 static u_int
224 ki2c_getmode(struct ki2c_softc *sc)
225 {
226 return ki2c_readreg(sc, MODE) & I2C_MODE;
227 }
228 #endif
229
230 static void
231 ki2c_setmode(struct ki2c_softc *sc, u_int mode)
232 {
233 ki2c_writereg(sc, MODE, mode);
234 }
235
236 #if 0
237 static u_int
238 ki2c_getspeed(struct ki2c_softc *sc)
239 {
240 return ki2c_readreg(sc, MODE) & I2C_SPEED;
241 }
242 #endif
243
244 static void
245 ki2c_setspeed(struct ki2c_softc *sc, u_int speed)
246 {
247 u_int x;
248
249 KASSERT((speed & ~I2C_SPEED) == 0);
250 x = ki2c_readreg(sc, MODE);
251 x &= ~I2C_SPEED;
252 x |= speed;
253 ki2c_writereg(sc, MODE, x);
254 }
255
256 static int
257 ki2c_match(device_t parent, cfdata_t match, void *aux)
258 {
259 struct confargs *ca = aux;
260
261 if (strcmp(ca->ca_name, "i2c") == 0)
262 return 1;
263
264 return 0;
265 }
266
267 static void
268 ki2c_attach(device_t parent, device_t self, void *aux)
269 {
270 struct ki2c_softc *sc = device_private(self);
271 struct confargs *ca = aux;
272 struct ki2c_channel *ch;
273 int node = ca->ca_node;
274 uint32_t channel, addr;
275 int i, rate, child;
276 struct i2cbus_attach_args iba;
277 devhandle_t devhandle;
278 char name[32];
279
280 sc->sc_dev = self;
281 sc->sc_tag = ca->ca_tag;
282 ca->ca_reg[0] += ca->ca_baseaddr;
283
284 if (OF_getprop(node, "AAPL,i2c-rate", &rate, 4) != 4) {
285 aprint_error(": cannot get i2c-rate\n");
286 return;
287 }
288 if (OF_getprop(node, "AAPL,address", &addr, 4) != 4) {
289 aprint_error(": unable to find i2c address\n");
290 return;
291 }
292 if (bus_space_map(sc->sc_tag, addr, PAGE_SIZE, 0, &sc->sc_bh) != 0) {
293 aprint_error_dev(sc->sc_dev, "failed to map registers\n");
294 return;
295 }
296
297 if (OF_getprop(node, "AAPL,address-step", &sc->sc_regstep, 4) != 4) {
298 aprint_error(": unable to find i2c address step\n");
299 return;
300 }
301
302 printf("\n");
303
304 ki2c_writereg(sc, STATUS, 0);
305 ki2c_writereg(sc, ISR, 0);
306 ki2c_writereg(sc, IER, 0);
307
308 ki2c_setmode(sc, I2C_STDSUBMODE);
309 ki2c_setspeed(sc, I2C_100kHz); /* XXX rate */
310
311 ki2c_writereg(sc, IER,I2C_INT_DATA|I2C_INT_ADDR|I2C_INT_STOP);
312
313 /*
314 * Two physical I2C busses share a single controller. It's not
315 * quite a mux, which is why we don't attach it that way.
316 *
317 * The locking order is:
318 *
319 * iic bus mutex -> ctrl_lock
320 *
321 * ctrl_lock is taken in ki2c_i2c_acquire_bus.
322 */
323 mutex_init(&sc->sc_ctrl_lock, MUTEX_DEFAULT, IPL_NONE);
324
325 /* Set up the channel structures. */
326 for (i = 0; i < KI2C_MAX_I2C_CHANNELS; i++) {
327 ch = &sc->sc_channels[i];
328
329 iic_tag_init(&ch->ch_i2c);
330 ch->ch_i2c.ic_channel = ch->ch_channel = i;
331 ch->ch_i2c.ic_cookie = ch;
332 ch->ch_i2c.ic_acquire_bus = ki2c_i2c_acquire_bus;
333 ch->ch_i2c.ic_release_bus = ki2c_i2c_release_bus;
334 ch->ch_i2c.ic_exec = ki2c_i2c_exec;
335
336 ch->ch_ki2c = sc;
337 }
338
339 /*
340 * Different systems have different I2C device tree topologies.
341 *
342 * Some systems use a scheme like this:
343 *
344 * /u3@0,f8000000/i2c@f8001000/temp-monitor@98
345 * /u3@0,f8000000/i2c@f8001000/fan@15e
346 *
347 * Here, we see the channel encoded in bit #8 of the address.
348 *
349 * Other systems use a scheme like this:
350 *
351 * /ht@0,f2000000/pci@4000,0,0/mac-io@7/i2c@18000/i2c-bus@0
352 * /ht@0,f2000000/pci@4000,0,0/mac-io@7/i2c@18000/i2c-bus@0/codec@8c
353 *
354 * /u4@0,f8000000/i2c@f8001000/i2c-bus@1
355 * /u4@0,f8000000/i2c@f8001000/i2c-bus@1/temp-monitor@94
356 *
357 * Here, a separate device tree node represents the channel.
358 * Note that in BOTH cases, the I2C address of the devices are
359 * shifted left by 1 (as it would be on the wire to leave room
360 * for the read/write bit).
361 *
362 * So, what we're going to do here is look for i2c-bus nodes. If
363 * we find them, we remember those phandles, and will use them for
364 * device enumeration. If we don't, then we will use the controller
365 * phandle for device enumeration and filter based on the channel
366 * bit in the "reg" property.
367 */
368 int i2c_bus_phandles[KI2C_MAX_I2C_CHANNELS] = { 0 };
369 bool separate_nodes_scheme = false;
370 for (child = OF_child(node); child != 0; child = OF_peer(child)) {
371 OF_getprop(child, "name", name, sizeof(name));
372 if (strcmp(name, "i2c-bus") == 0) {
373 separate_nodes_scheme = true;
374 if (of_getprop_uint32(child, "reg", &channel) == -1) {
375 continue;
376 }
377 if (channel >= KI2C_MAX_I2C_CHANNELS) {
378 continue;
379 }
380 i2c_bus_phandles[channel] = child;
381 }
382 }
383
384 /*
385 * Set up our handle implementation (we provide our own
386 * i2c enumeration call).
387 */
388 devhandle = device_handle(self);
389 devhandle_impl_inherit(&sc->sc_devhandle_impl, devhandle.impl);
390 sc->sc_devhandle_impl.lookup_device_call =
391 ki2c_devhandle_lookup_device_call;
392
393 for (i = 0; i < KI2C_MAX_I2C_CHANNELS; i++) {
394 int locs[I2CBUSCF_NLOCS];
395
396 ch = &sc->sc_channels[i];
397
398 if (separate_nodes_scheme) {
399 if (i2c_bus_phandles[i] == 0) {
400 /*
401 * This wasn't represented (either at all
402 * or not correctly) in the device tree,
403 * so skip attaching the "iic" instance.
404 */
405 continue;
406 }
407 devhandle = devhandle_from_of(i2c_bus_phandles[i]);
408 } else {
409 devhandle = device_handle(self);
410 }
411 devhandle.impl = &sc->sc_devhandle_impl;
412
413 locs[I2CBUSCF_BUS] = ch->ch_i2c.ic_channel;
414
415 memset(&iba, 0, sizeof(iba));
416 iba.iba_tag = &ch->ch_i2c;
417 config_found(sc->sc_dev, &iba, iicbus_print_multi,
418 CFARGS(.submatch = config_stdsubmatch,
419 .locators = locs,
420 .devhandle = devhandle));
421 }
422
423 }
424
425 static int
426 ki2c_intr(struct ki2c_softc *sc)
427 {
428 u_int isr, x;
429
430 isr = ki2c_readreg(sc, ISR);
431 if (isr & I2C_INT_ADDR) {
432 #if 0
433 if ((ki2c_readreg(sc, STATUS) & I2C_ST_LASTAAK) == 0) {
434 /* No slave responded. */
435 sc->sc_flags |= I2C_ERROR;
436 goto out;
437 }
438 #endif
439
440 if (sc->sc_flags & I2C_READING) {
441 if (sc->sc_resid > 1) {
442 x = ki2c_readreg(sc, CONTROL);
443 x |= I2C_CT_AAK;
444 ki2c_writereg(sc, CONTROL, x);
445 }
446 } else {
447 ki2c_writereg(sc, DATA, *sc->sc_data++);
448 sc->sc_resid--;
449 }
450 }
451
452 if (isr & I2C_INT_DATA) {
453 if (sc->sc_flags & I2C_READING) {
454 *sc->sc_data++ = ki2c_readreg(sc, DATA);
455 sc->sc_resid--;
456
457 if (sc->sc_resid == 0) { /* Completed */
458 ki2c_writereg(sc, CONTROL, 0);
459 goto out;
460 }
461 } else {
462 #if 0
463 if ((ki2c_readreg(sc, STATUS) & I2C_ST_LASTAAK) == 0) {
464 /* No slave responded. */
465 sc->sc_flags |= I2C_ERROR;
466 goto out;
467 }
468 #endif
469
470 if (sc->sc_resid == 0) {
471 x = ki2c_readreg(sc, CONTROL) | I2C_CT_STOP;
472 ki2c_writereg(sc, CONTROL, x);
473 } else {
474 ki2c_writereg(sc, DATA, *sc->sc_data++);
475 sc->sc_resid--;
476 }
477 }
478 }
479
480 out:
481 if (isr & I2C_INT_STOP) {
482 ki2c_writereg(sc, CONTROL, 0);
483 sc->sc_flags &= ~I2C_BUSY;
484 }
485
486 ki2c_writereg(sc, ISR, isr);
487
488 return 1;
489 }
490
491 static int
492 ki2c_poll(struct ki2c_softc *sc, int timo)
493 {
494 while (sc->sc_flags & I2C_BUSY) {
495 if (ki2c_readreg(sc, ISR))
496 ki2c_intr(sc);
497 timo -= 100;
498 if (timo < 0) {
499 DPRINTF("i2c_poll: timeout\n");
500 return ETIMEDOUT;
501 }
502 delay(100);
503 }
504 return 0;
505 }
506
507 static int
508 ki2c_start(struct ki2c_softc *sc, int addr, int subaddr, void *data, int len)
509 {
510 int rw = (sc->sc_flags & I2C_READING) ? 1 : 0;
511 int error, timo, x;
512
513 KASSERT((addr & 1) == 0);
514
515 sc->sc_data = data;
516 sc->sc_resid = len;
517 sc->sc_flags |= I2C_BUSY;
518
519 timo = 1000 + len * 200;
520
521 /* XXX TAS3001 sometimes takes 50ms to finish writing registers. */
522 /* if (addr == 0x68) */
523 timo += 100000;
524
525 ki2c_writereg(sc, ADDR, addr | rw);
526 ki2c_writereg(sc, SUBADDR, subaddr);
527
528 x = ki2c_readreg(sc, CONTROL) | I2C_CT_ADDR;
529 ki2c_writereg(sc, CONTROL, x);
530
531 if ((error = ki2c_poll(sc, timo)) != 0)
532 return error;
533
534 if (sc->sc_flags & I2C_ERROR) {
535 DPRINTF("I2C_ERROR\n");
536 return EIO;
537 }
538 return 0;
539 }
540
541 static int
542 ki2c_read(struct ki2c_softc *sc, int addr, int subaddr, void *data, int len)
543 {
544 sc->sc_flags = I2C_READING;
545 DPRINTF("ki2c_read: %02x %d\n", addr, len);
546 return ki2c_start(sc, addr, subaddr, data, len);
547 }
548
549 static int
550 ki2c_write(struct ki2c_softc *sc, int addr, int subaddr, void *data, int len)
551 {
552 sc->sc_flags = 0;
553 DPRINTF("ki2c_write: %02x %d\n",addr,len);
554 return ki2c_start(sc, addr, subaddr, data, len);
555 }
556
557 static int
558 ki2c_i2c_acquire_bus(void * const v, int const flags)
559 {
560 struct ki2c_channel *ch = v;
561 struct ki2c_softc *sc = ch->ch_ki2c;
562
563 if (flags & I2C_F_POLL) {
564 if (! mutex_tryenter(&sc->sc_ctrl_lock)) {
565 return EBUSY;
566 }
567 } else {
568 mutex_enter(&sc->sc_ctrl_lock);
569 }
570 return 0;
571 }
572
573 static void
574 ki2c_i2c_release_bus(void * const v, int const flags)
575 {
576 struct ki2c_channel *ch = v;
577 struct ki2c_softc *sc = ch->ch_ki2c;
578
579 mutex_exit(&sc->sc_ctrl_lock);
580 }
581
582 int
583 ki2c_i2c_exec(void *cookie, i2c_op_t op, i2c_addr_t addr, const void *vcmd,
584 size_t cmdlen, void *vbuf, size_t buflen, int flags)
585 {
586 struct ki2c_channel *ch = cookie;
587 struct ki2c_softc *sc = ch->ch_ki2c;
588 int i, error;
589 size_t w_len;
590 uint8_t *wp;
591 uint8_t wrbuf[I2C_EXEC_MAX_CMDLEN + I2C_EXEC_MAX_CMDLEN];
592 uint8_t channel;
593
594 /*
595 * We don't have any idea if the ki2c controller can execute
596 * i2c quick_{read,write} operations, so if someone tries one,
597 * return an error.
598 */
599 if (cmdlen == 0 && buflen == 0)
600 return ENOTSUP;
601
602 /* Don't support 10-bit addressing. */
603 if (addr > 0x7f)
604 return ENOTSUP;
605
606 channel = ch->ch_channel == 1 ? 0x10 : 0x00;
607
608 /* we handle the subaddress stuff ourselves */
609 ki2c_setmode(sc, channel | I2C_STDMODE);
610 ki2c_setspeed(sc, I2C_50kHz);
611
612 /* Write-buffer defaults to vcmd */
613 wp = (uint8_t *)(__UNCONST(vcmd));
614 w_len = cmdlen;
615
616 /*
617 * Concatenate vcmd and vbuf for write operations
618 *
619 * Drivers written specifically for ki2c might already do this,
620 * but "generic" i2c drivers still provide separate arguments
621 * for the cmd and buf parts of iic_smbus_write_{byte,word}.
622 */
623 if (I2C_OP_WRITE_P(op) && buflen != 0) {
624 if (cmdlen == 0) {
625 wp = (uint8_t *)vbuf;
626 w_len = buflen;
627 } else {
628 KASSERT((cmdlen + buflen) <= sizeof(wrbuf));
629 wp = (uint8_t *)(__UNCONST(vcmd));
630 w_len = 0;
631 for (i = 0; i < cmdlen; i++)
632 wrbuf[w_len++] = *wp++;
633 wp = (uint8_t *)vbuf;
634 for (i = 0; i < buflen; i++)
635 wrbuf[w_len++] = *wp++;
636 wp = wrbuf;
637 }
638 }
639
640 if (w_len > 0) {
641 error = ki2c_write(sc, addr << 1, 0, wp, w_len);
642 if (error) {
643 return error;
644 }
645 }
646
647 if (I2C_OP_READ_P(op)) {
648 error = ki2c_read(sc, addr << 1, 0, vbuf, buflen);
649 if (error) {
650 return error;
651 }
652 }
653 return 0;
654 }
655