pm_direct.h revision 1.12 1 1.12 dsl /* $NetBSD: pm_direct.h,v 1.12 2009/03/14 14:46:01 dsl Exp $ */
2 1.1 tsubai
3 1.1 tsubai /*
4 1.1 tsubai * Copyright (C) 1997 Takashi Hamada
5 1.1 tsubai * All rights reserved.
6 1.1 tsubai *
7 1.1 tsubai * Redistribution and use in source and binary forms, with or without
8 1.1 tsubai * modification, are permitted provided that the following conditions
9 1.1 tsubai * are met:
10 1.1 tsubai * 1. Redistributions of source code must retain the above copyright
11 1.1 tsubai * notice, this list of conditions and the following disclaimer.
12 1.1 tsubai * 2. Redistributions in binary form must reproduce the above copyright
13 1.1 tsubai * notice, this list of conditions and the following disclaimer in the
14 1.1 tsubai * documentation and/or other materials provided with the distribution.
15 1.1 tsubai * 3. All advertising materials mentioning features or use of this software
16 1.1 tsubai * must display the following acknowledgement:
17 1.1 tsubai * This product includes software developed by Takashi Hamada.
18 1.1 tsubai * 4. The name of the author may not be used to endorse or promote products
19 1.1 tsubai * derived from this software without specific prior written permission.
20 1.1 tsubai *
21 1.1 tsubai * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
22 1.1 tsubai * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
23 1.1 tsubai * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
24 1.1 tsubai * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
25 1.1 tsubai * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
26 1.1 tsubai * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
27 1.1 tsubai * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
28 1.1 tsubai * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
29 1.1 tsubai * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
30 1.1 tsubai * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
31 1.1 tsubai */
32 1.1 tsubai /* From: pm_direct.h 1.0 01/02/97 Takashi Hamada */
33 1.1 tsubai
34 1.1 tsubai /*
35 1.1 tsubai * Public declarations that other routines may need.
36 1.1 tsubai */
37 1.1 tsubai
38 1.1 tsubai /* data structure of the command of the Power Manager */
39 1.1 tsubai typedef struct {
40 1.1 tsubai short command; /* command of the Power Manager */
41 1.1 tsubai short num_data; /* number of data */
42 1.1 tsubai char *s_buf; /* pointer to buffer for sending */
43 1.1 tsubai char *r_buf; /* pointer to buffer for receiving */
44 1.7 briggs char data[128]; /* data buffer (is it too much?) */
45 1.7 briggs /* null command seen w/ 120 data bytes */
46 1.1 tsubai } PMData;
47 1.1 tsubai
48 1.12 dsl int pmgrop(PMData *);
49 1.12 dsl int pm_intr(void *);
50 1.12 dsl void pm_init(void);
51 1.12 dsl void pm_adb_restart(void);
52 1.12 dsl void pm_adb_poweroff(void);
53 1.12 dsl void pm_read_date_time(u_long *);
54 1.12 dsl void pm_set_date_time(u_long);
55 1.6 itojun
56 1.6 itojun struct pmu_battery_info
57 1.6 itojun {
58 1.6 itojun unsigned int flags;
59 1.6 itojun unsigned int cur_charge;
60 1.6 itojun unsigned int max_charge;
61 1.6 itojun signed int draw;
62 1.6 itojun unsigned int voltage;
63 1.8 briggs unsigned int secs_remaining;
64 1.6 itojun };
65 1.6 itojun
66 1.12 dsl int pm_battery_info(int, struct pmu_battery_info *);
67 1.6 itojun
68 1.12 dsl int pm_read_nvram(int);
69 1.12 dsl void pm_write_nvram(int, int);
70 1.12 dsl int pm_read_brightness(void);
71 1.12 dsl void pm_set_brightness(int);
72 1.12 dsl void pm_init_brightness(void);
73 1.12 dsl void pm_eject_pcmcia(int);
74 1.2 tsubai
75 1.2 tsubai /* PMU commands */
76 1.2 tsubai #define PMU_POWER_OFF 0x7e /* Turn Power off */
77 1.2 tsubai #define PMU_RESET_CPU 0xd0 /* Reset CPU */
78 1.2 tsubai
79 1.2 tsubai #define PMU_SET_RTC 0x30 /* Set realtime clock */
80 1.2 tsubai #define PMU_READ_RTC 0x38 /* Read realtime clock */
81 1.2 tsubai
82 1.2 tsubai #define PMU_WRITE_PRAM 0x32 /* Write PRAM */
83 1.2 tsubai #define PMU_READ_PRAM 0x3a /* Read PRAM */
84 1.2 tsubai
85 1.2 tsubai #define PMU_WRITE_NVRAM 0x33 /* Write NVRAM */
86 1.2 tsubai #define PMU_READ_NVRAM 0x3b /* Read NVRAM */
87 1.2 tsubai
88 1.2 tsubai #define PMU_EJECT_PCMCIA 0x4c /* Eject PCMCIA slot */
89 1.2 tsubai
90 1.2 tsubai #define PMU_SET_BRIGHTNESS 0x41 /* Set backlight brightness */
91 1.2 tsubai #define PMU_READ_BRIGHTNESS 0xd9 /* Read brightness button position */
92 1.6 itojun
93 1.6 itojun #define PMU_POWER_EVENTS 0x8f /* Send power-event commands to PMU */
94 1.6 itojun #define PMU_SYSTEM_READY 0xdf /* tell PMU we are awake */
95 1.6 itojun
96 1.8 briggs #define PMU_BATTERY_STATE 0x6b /* Read old battery state */
97 1.6 itojun #define PMU_SMART_BATTERY_STATE 0x6f /* Read battery state */
98 1.6 itojun
99 1.8 briggs #define PMU_ADB_CMD 0x20 /* Send ADB packet */
100 1.8 briggs #define PMU_ADB_POLL_OFF 0x21 /* Disable ADB auto-poll */
101 1.8 briggs #define PMU_SET_VOL 0x40 /* Set volume button position */
102 1.8 briggs #define PMU_GET_VOL 0x48 /* Get volume button position */
103 1.8 briggs #define PMU_SET_IMASK 0x70 /* Set interrupt mask */
104 1.8 briggs #define PMU_INT_ACK 0x78 /* Read interrupt bits */
105 1.8 briggs #define PMU_CPU_SPEED 0x7d /* Control CPU speed on some models */
106 1.8 briggs #define PMU_SLEEP 0x7f /* Put CPU to sleep */
107 1.8 briggs #define PMU_I2C_CMD 0x9a /* i2c commands */
108 1.8 briggs #define PMU_GET_LID_STATE 0xdc /* Report lid state */
109 1.8 briggs #define PMU_GET_VERSION 0xea /* Identify thyself */
110 1.8 briggs
111 1.6 itojun /* Bits in PMU interrupt and interrupt mask bytes */
112 1.6 itojun #define PMU_INT_ADB_AUTO 0x04 /* ADB autopoll, when PMU_INT_ADB */
113 1.6 itojun #define PMU_INT_PCEJECT 0x04 /* PC-card eject buttons */
114 1.6 itojun #define PMU_INT_SNDBRT 0x08 /* sound/brightness up/down buttons */
115 1.6 itojun #define PMU_INT_ADB 0x10 /* ADB autopoll or reply data */
116 1.6 itojun #define PMU_INT_BATTERY 0x20
117 1.6 itojun #define PMU_INT_WAKEUP 0x40
118 1.6 itojun #define PMU_INT_TICK 0x80 /* 1-second tick interrupt */
119 1.6 itojun
120 1.6 itojun /* Bits to use with the PMU_POWER_CTRL0 command */
121 1.6 itojun #define PMU_POW0_ON 0x80 /* OR this to power ON the device */
122 1.6 itojun #define PMU_POW0_OFF 0x00 /* leave bit 7 to 0 to power it OFF */
123 1.6 itojun
124 1.6 itojun /* Bits to use with the PMU_POWER_CTRL command */
125 1.6 itojun #define PMU_POW_ON 0x80 /* OR this to power ON the device */
126 1.6 itojun #define PMU_POW_OFF 0x00 /* leave bit 7 to 0 to power it OFF */
127 1.6 itojun #define PMU_POW_BACKLIGHT 0x01 /* backlight power */
128 1.6 itojun #define PMU_POW_CHARGER 0x02 /* battery charger power */
129 1.6 itojun #define PMU_POW_IRLED 0x04 /* IR led power (on wallstreet) */
130 1.6 itojun #define PMU_POW_MEDIABAY 0x08 /* media bay power (wallstreet/lombard ?) */
131 1.6 itojun
132 1.8 briggs /* Bits from PMU_GET_LID_STATE or PMU_INT_ENVIRONMENT on core99 */
133 1.8 briggs #define PMU_ENV_LID_CLOSED 0x01 /* The lid is closed */
134 1.8 briggs
135 1.6 itojun /* PMU PMU_POWER_EVENTS commands */
136 1.6 itojun enum {
137 1.6 itojun PMU_PWR_GET_POWERUP_EVENTS = 0x00,
138 1.6 itojun PMU_PWR_SET_POWERUP_EVENTS = 0x01,
139 1.6 itojun PMU_PWR_CLR_POWERUP_EVENTS = 0x02,
140 1.6 itojun PMU_PWR_GET_WAKEUP_EVENTS = 0x03,
141 1.6 itojun PMU_PWR_SET_WAKEUP_EVENTS = 0x04,
142 1.6 itojun PMU_PWR_CLR_WAKEUP_EVENTS = 0x05,
143 1.6 itojun };
144 1.6 itojun
145 1.6 itojun /* PMU Power Information */
146 1.6 itojun
147 1.6 itojun #define PMU_PWR_AC_PRESENT (1 << 0)
148 1.8 briggs #define PMU_PWR_BATT_CHARGING (1 << 1)
149 1.6 itojun #define PMU_PWR_BATT_PRESENT (1 << 2)
150 1.8 briggs #define PMU_PWR_PCHARGE_RESET (1 << 6)
151 1.6 itojun
152