valkyriefb.c revision 1.2.2.1 1 /* $NetBSD: valkyriefb.c,v 1.2.2.1 2014/08/20 00:03:11 tls Exp $ */
2
3 /*
4 * Copyright (c) 2012 Michael Lorenz
5 * All rights reserved.
6 *
7 * Redistribution and use in source and binary forms, with or without
8 * modification, are permitted provided that the following conditions
9 * are met:
10 * 1. Redistributions of source code must retain the above copyright
11 * notice, this list of conditions and the following disclaimer.
12 * 2. Redistributions in binary form must reproduce the above copyright
13 * notice, this list of conditions and the following disclaimer in the
14 * documentation and/or other materials provided with the distribution.
15 *
16 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
17 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
18 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
19 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
20 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
21 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
22 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
23 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
24 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
25 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
26 */
27
28 /*
29 * A console driver for Apple's Valkyrie onboard video controller, found in
30 * for example the Performa 6360
31 * This should be easy enough to adapt to mac68k but I don't have the hardware
32 */
33
34 #include <sys/cdefs.h>
35 __KERNEL_RCSID(0, "$NetBSD: valkyriefb.c,v 1.2.2.1 2014/08/20 00:03:11 tls Exp $");
36
37 #include <sys/param.h>
38 #include <sys/systm.h>
39 #include <sys/kernel.h>
40 #include <sys/device.h>
41
42 #include <dev/ofw/openfirm.h>
43
44 #include <machine/autoconf.h>
45
46 #include <dev/wscons/wsdisplayvar.h>
47 #include <dev/wscons/wsconsio.h>
48 #include <dev/wsfont/wsfont.h>
49 #include <dev/rasops/rasops.h>
50 #include <dev/wscons/wsdisplay_vconsvar.h>
51
52 #include <dev/videomode/videomode.h>
53
54 #include <arch/macppc/dev/valkyriefbreg.h>
55 #include <arch/macppc/dev/videopllvar.h>
56
57 #include "opt_wsemul.h"
58 #include "opt_valkyriefb.h"
59
60 #include "videopll.h"
61 #if NVIDEOPLL < 1
62 #error "valkyriefb requires videopll at iic"
63 #endif
64
65 struct valkyriefb_softc {
66 device_t sc_dev;
67 int sc_node;
68 uint8_t *sc_base;
69 uint8_t *sc_fbaddr;
70
71 int sc_depth;
72 int sc_width, sc_height, sc_linebytes;
73 const struct videomode *sc_videomode;
74 uint8_t sc_modereg;
75
76 int sc_mode;
77 uint32_t sc_bg;
78
79 u_char sc_cmap_red[256];
80 u_char sc_cmap_green[256];
81 u_char sc_cmap_blue[256];
82
83 struct vcons_data vd;
84 };
85
86 struct valkyriefb_mode {
87 int width;
88 int height;
89 uint8_t mode;
90 };
91
92 /*
93 * Translate screen resolutions to values for Valkyrie's mode register.
94 * These numbers seem to roughly correspond to MacOS video mode numbers
95 * there are many numbers that result in the same resolution which in MacOS
96 * only differ by the display refresh rate, which isn't set by Valkyrie at
97 * all, instead there's a PLL chip hooked to cuda's i2c bus. It doesn't seem
98 * to matter which number we use as long as the resolution is right and we
99 * program the PLL for the right pixel clock
100 */
101 static struct valkyriefb_mode modetab[] = {
102 { 640, 480, 6 },
103 { 800, 600, 12 },
104 { 832, 624, 9 },
105 { 1024, 768, 14},
106 };
107
108 static struct vcons_screen valkyriefb_console_screen;
109
110 static int valkyriefb_match(device_t, cfdata_t, void *);
111 static void valkyriefb_attach(device_t, device_t, void *);
112 static int valkyriefb_init(device_t);
113 static int valkyriefb_set_mode(struct valkyriefb_softc *,
114 const struct videomode *, int);
115
116 CFATTACH_DECL_NEW(valkyriefb, sizeof(struct valkyriefb_softc),
117 valkyriefb_match, valkyriefb_attach, NULL, NULL);
118
119 struct wsscreen_descr valkyriefb_defaultscreen = {
120 "default",
121 0, 0,
122 NULL,
123 8, 16,
124 WSSCREEN_WSCOLORS | WSSCREEN_HILIT,
125 NULL,
126 };
127
128 const struct wsscreen_descr *_valkyriefb_scrlist[] = {
129 &valkyriefb_defaultscreen,
130 /* XXX other formats, graphics screen? */
131 };
132
133 struct wsscreen_list valkyriefb_screenlist = {
134 sizeof(_valkyriefb_scrlist) / sizeof(struct wsscreen_descr *),
135 _valkyriefb_scrlist
136 };
137
138 static int valkyriefb_ioctl(void *, void *, u_long, void *, int,
139 struct lwp *);
140 static paddr_t valkyriefb_mmap(void *, void *, off_t, int);
141
142 static void valkyriefb_init_screen(void *, struct vcons_screen *, int,
143 long *);
144
145
146 struct wsdisplay_accessops valkyriefb_accessops = {
147 valkyriefb_ioctl,
148 valkyriefb_mmap,
149 NULL,
150 NULL,
151 NULL,
152 NULL, /* load_font */
153 NULL, /* polls */
154 NULL, /* scroll */
155 };
156
157 static inline void
158 valkyriefb_write_reg(struct valkyriefb_softc *sc, int reg, uint8_t val)
159 {
160 *(sc->sc_base + VAL_REGS_OFFSET + reg) = val;
161 __asm("eieio; sync;");
162 }
163
164 static inline uint8_t
165 valkyriefb_read_reg(struct valkyriefb_softc *sc, int reg)
166 {
167 return *(sc->sc_base + VAL_REGS_OFFSET + reg);
168 }
169
170 static void
171 valkyriefb_write_cmap(struct valkyriefb_softc *sc,
172 int reg, uint8_t r, uint8_t g, uint8_t b)
173 {
174 *(sc->sc_base + VAL_CMAP_OFFSET + VAL_CMAP_ADDR) = reg;
175 __asm("eieio; sync;");
176 *(sc->sc_base + VAL_CMAP_OFFSET + VAL_CMAP_LUT) = r;
177 __asm("eieio; sync;");
178 *(sc->sc_base + VAL_CMAP_OFFSET + VAL_CMAP_LUT) = g;
179 __asm("eieio; sync;");
180 *(sc->sc_base + VAL_CMAP_OFFSET + VAL_CMAP_LUT) = b;
181 __asm("eieio; sync;");
182 }
183
184 static int
185 valkyriefb_match(device_t parent, cfdata_t cf, void *aux)
186 {
187 struct confargs *ca = aux;
188
189 if (strcmp(ca->ca_name, "valkyrie") != 0)
190 return 0;
191 return 1;
192 }
193
194 static void
195 valkyriefb_attach(device_t parent, device_t self, void *aux)
196 {
197 struct valkyriefb_softc *sc = device_private(self);
198 struct confargs *ca = aux;
199
200 sc->sc_dev = self;
201 sc->sc_node = ca->ca_node;
202
203 aprint_normal(" address 0x%08x\n", ca->ca_reg[0]);
204 aprint_verbose_dev(sc->sc_dev, "waiting for videopll...\n");
205 sc->sc_base = (uint8_t *)ca->ca_reg[0];
206 #ifdef VALKYRIEFB_DEBUG
207 for (i = 0; i < 0x40; i += 8) {
208 aprint_error_dev(sc->sc_dev, "%02x: %02x\n", i,
209 valkyriefb_read_reg(sc, i));
210 }
211 #endif
212 config_finalize_register(sc->sc_dev, valkyriefb_init);
213 sc->sc_fbaddr = (uint8_t *)(sc->sc_base + 0x1000);
214 }
215
216 static int
217 valkyriefb_init(device_t self)
218 {
219 struct valkyriefb_softc *sc = device_private(self);
220 const struct videomode *mode;
221 struct rasops_info *ri;
222 prop_dictionary_t dict;
223 struct wsemuldisplaydev_attach_args aa;
224 bool console = FALSE;
225 long defattr;
226
227 mode = pick_mode_by_ref(800, 600, 60);
228 if (mode == NULL)
229 return 0;
230
231 valkyriefb_set_mode(sc, mode, 8);
232
233 vcons_init(&sc->vd, sc, &valkyriefb_defaultscreen,
234 &valkyriefb_accessops);
235 sc->vd.init_screen = valkyriefb_init_screen;
236
237 dict = device_properties(sc->sc_dev);
238 prop_dictionary_get_bool(dict, "is_console", &console);
239
240 ri = &valkyriefb_console_screen.scr_ri;
241 vcons_init_screen(&sc->vd, &valkyriefb_console_screen, 1, &defattr);
242 memset(sc->sc_base + 0x1000, ri->ri_devcmap[(defattr >> 16) & 0xf],
243 sc->sc_width * sc->sc_linebytes);
244 valkyriefb_console_screen.scr_flags |= VCONS_SCREEN_IS_STATIC;
245
246 valkyriefb_defaultscreen.textops = &ri->ri_ops;
247 valkyriefb_defaultscreen.capabilities = ri->ri_caps;
248 valkyriefb_defaultscreen.nrows = ri->ri_rows;
249 valkyriefb_defaultscreen.ncols = ri->ri_cols;
250 if (console) {
251 wsdisplay_cnattach(&valkyriefb_defaultscreen, ri, 0, 0,
252 defattr);
253 vcons_replay_msgbuf(&valkyriefb_console_screen);
254 }
255 aa.console = console;
256 aa.scrdata = &valkyriefb_screenlist;
257 aa.accessops = &valkyriefb_accessops;
258 aa.accesscookie = &sc->vd;
259
260 config_found(self, &aa, wsemuldisplaydevprint);
261
262 return 0;
263 }
264
265 static int
266 valkyriefb_set_mode(struct valkyriefb_softc *sc,
267 const struct videomode *mode, int depth)
268 {
269 int i;
270 uint8_t modereg, tmp;
271
272 /* first find the parameter for the mode register */
273 i = 0;
274 while ((i < __arraycount(modetab)) &&
275 (modetab[i].width != mode->hdisplay) &&
276 (modetab[i].height != mode->vdisplay))
277 i++;
278 if (i >= __arraycount(modetab)) {
279 aprint_error_dev(sc->sc_dev,
280 "Can't find a mode register value for %s\n", mode->name);
281 return EINVAL;
282 } else
283 modereg = modetab[i].mode;
284
285 /* check if we have enough video memory */
286 if ((mode->hdisplay * mode->vdisplay * (depth >> 3)) > 0x100000) {
287 aprint_error_dev(sc->sc_dev, "Not enough video RAM for %s\n",
288 mode->name);
289 return EINVAL;
290 }
291
292 /* reject depths other than 8 or 16 */
293 if ((depth != 8) && (depth != 16)) {
294 aprint_error_dev(sc->sc_dev,
295 "Depth [%d] is unsupported for %s\n", depth, mode->name);
296 return EINVAL;
297 }
298
299 /* now start programming the chip */
300 valkyriefb_write_reg(sc, VAL_STATUS, 0);
301 delay(100);
302 valkyriefb_write_reg(sc, VAL_MODE, modereg | VAL_MODE_STOP);
303
304 if (depth == 8) {
305 sc->sc_depth = 8;
306 valkyriefb_write_reg(sc, VAL_DEPTH, VAL_DEPTH_8);
307 for (i = 0; i < 256; i++) {
308 tmp = i & 0xe0;
309 /*
310 * replicate bits so 0xe0 maps to a red value of 0xff
311 * in order to make white look actually white
312 */
313 tmp |= (tmp >> 3) | (tmp >> 6);
314 sc->sc_cmap_red[i] = tmp;
315
316 tmp = (i & 0x1c) << 3;
317 tmp |= (tmp >> 3) | (tmp >> 6);
318 sc->sc_cmap_green[i] = tmp;
319
320 tmp = (i & 0x03) << 6;
321 tmp |= tmp >> 2;
322 tmp |= tmp >> 4;
323 sc->sc_cmap_blue[i] = tmp;
324
325 valkyriefb_write_cmap(sc, i, sc->sc_cmap_red[i],
326 sc->sc_cmap_green[i], sc->sc_cmap_blue[i]);
327 }
328 } else if (depth == 16) {
329 sc->sc_depth = 16;
330 valkyriefb_write_reg(sc, VAL_DEPTH, VAL_DEPTH_16);
331 /* does the palette have any effect in 16bit? */
332 }
333
334 videopll_set_freq(mode->dot_clock);
335 delay(100);
336 valkyriefb_write_reg(sc, VAL_MODE, modereg);
337
338 sc->sc_modereg = modereg;
339 sc->sc_videomode = mode;
340 sc->sc_width = mode->hdisplay;
341 sc->sc_height = mode->vdisplay;
342 sc->sc_linebytes = mode->hdisplay * (sc->sc_depth >> 3);
343 aprint_normal_dev(sc->sc_dev, "switched to %d x %d in %d bit colour\n",
344 sc->sc_width, sc->sc_height, sc->sc_depth);
345 return 0;
346 }
347
348 static int
349 valkyriefb_ioctl(void *v, void *vs, u_long cmd, void *data, int flag,
350 struct lwp *l)
351 {
352 struct vcons_data *vd = v;
353 struct valkyriefb_softc *sc = vd->cookie;
354 struct wsdisplay_fbinfo *wdf;
355 struct vcons_screen *ms = vd->active;
356
357 switch (cmd) {
358 case WSDISPLAYIO_GTYPE:
359 *(u_int *)data = WSDISPLAY_TYPE_VALKYRIE;
360 return 0;
361
362 case WSDISPLAYIO_GINFO:
363 wdf = (void *)data;
364 wdf->height = ms->scr_ri.ri_height;
365 wdf->width = ms->scr_ri.ri_width;
366 wdf->depth = ms->scr_ri.ri_depth;
367 wdf->cmsize = 256;
368 return 0;
369 #if 0
370 case WSDISPLAYIO_GETCMAP:
371 return valkyriefb_getcmap(sc,
372 (struct wsdisplay_cmap *)data);
373
374 case WSDISPLAYIO_PUTCMAP:
375 return valkyriefb_putcmap(sc,
376 (struct wsdisplay_cmap *)data);
377 #endif
378
379 case WSDISPLAYIO_SMODE: {
380 int new_mode = *(int*)data;
381 if (new_mode != sc->sc_mode) {
382 sc->sc_mode = new_mode;
383 if (new_mode == WSDISPLAYIO_MODE_EMUL) {
384 vcons_redraw_screen(ms);
385 }
386 }
387 }
388 return 0;
389 }
390 return EPASSTHROUGH;
391 }
392
393 static paddr_t
394 valkyriefb_mmap(void *v, void *vs, off_t offset, int prot)
395 {
396 struct vcons_data *vd = v;
397 struct valkyriefb_softc *sc = vd->cookie;
398 paddr_t pa;
399
400 /* 'regular' framebuffer mmap()ing */
401 if (offset < 0x100000) {
402 pa = (paddr_t)(sc->sc_base + 0x1000 + offset);
403 return pa;
404 }
405 return -1;
406 }
407
408 static void
409 valkyriefb_init_screen(void *cookie, struct vcons_screen *scr,
410 int existing, long *defattr)
411 {
412 struct valkyriefb_softc *sc = cookie;
413 struct rasops_info *ri = &scr->scr_ri;
414
415 memset(ri, 0, sizeof(struct rasops_info));
416 ri->ri_depth = sc->sc_depth;
417 ri->ri_width = sc->sc_width;
418 ri->ri_height = sc->sc_height;
419 ri->ri_stride = sc->sc_linebytes;
420 ri->ri_flg = RI_CENTER | RI_8BIT_IS_RGB | RI_ENABLE_ALPHA;
421 ri->ri_bits = sc->sc_fbaddr;
422
423 scr->scr_flags |= VCONS_DONT_READ;
424
425 rasops_init(ri, 0, 0);
426 ri->ri_caps = WSSCREEN_WSCOLORS;
427
428 rasops_reconfig(ri, sc->sc_height / ri->ri_font->fontheight,
429 sc->sc_width / ri->ri_font->fontwidth);
430
431 ri->ri_hw = scr;
432 }
433