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wdc_obio.c revision 1.1
      1 /*	$NetBSD: wdc_obio.c,v 1.1 1998/12/10 20:10:03 tsubai Exp $	*/
      2 
      3 /*-
      4  * Copyright (c) 1998 The NetBSD Foundation, Inc.
      5  * All rights reserved.
      6  *
      7  * This code is derived from software contributed to The NetBSD Foundation
      8  * by Charles M. Hannum and by Onno van der Linden.
      9  *
     10  * Redistribution and use in source and binary forms, with or without
     11  * modification, are permitted provided that the following conditions
     12  * are met:
     13  * 1. Redistributions of source code must retain the above copyright
     14  *    notice, this list of conditions and the following disclaimer.
     15  * 2. Redistributions in binary form must reproduce the above copyright
     16  *    notice, this list of conditions and the following disclaimer in the
     17  *    documentation and/or other materials provided with the distribution.
     18  * 3. All advertising materials mentioning features or use of this software
     19  *    must display the following acknowledgement:
     20  *        This product includes software developed by the NetBSD
     21  *        Foundation, Inc. and its contributors.
     22  * 4. Neither the name of The NetBSD Foundation nor the names of its
     23  *    contributors may be used to endorse or promote products derived
     24  *    from this software without specific prior written permission.
     25  *
     26  * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
     27  * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
     28  * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
     29  * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
     30  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
     31  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
     32  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
     33  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
     34  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
     35  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
     36  * POSSIBILITY OF SUCH DAMAGE.
     37  */
     38 
     39 #include <sys/param.h>
     40 #include <sys/systm.h>
     41 #include <sys/device.h>
     42 #include <sys/malloc.h>
     43 
     44 #include <vm/vm.h>
     45 
     46 #include <machine/bus.h>
     47 #include <machine/autoconf.h>
     48 
     49 #include <dev/ata/atavar.h>
     50 #include <dev/ic/wdcvar.h>
     51 
     52 #include <macppc/dev/dbdma.h>
     53 
     54 #define WDC_REG_NPORTS		8
     55 #define WDC_AUXREG_OFFSET	0x16
     56 #define WDC_DEFAULT_PIO_IRQ	13	/* XXX */
     57 #define WDC_DEFAULT_DMA_IRQ	2	/* XXX */
     58 
     59 #define WDC_OPTIONS_DMA 0x01
     60 
     61 /*
     62  * XXX This code currently doesn't even try to allow 32-bit data port use.
     63  */
     64 
     65 struct wdc_obio_softc {
     66 	struct wdc_softc sc_wdcdev;
     67 	struct channel_softc *wdc_chanptr;
     68 	struct channel_softc wdc_channel;
     69 	dbdma_regmap_t *sc_dmareg;
     70 	dbdma_command_t	*sc_dmacmd;
     71 };
     72 
     73 int	wdc_obio_probe	__P((struct device *, struct cfdata *, void *));
     74 void	wdc_obio_attach	__P((struct device *, struct device *, void *));
     75 
     76 struct cfattach wdc_obio_ca = {
     77 	sizeof(struct wdc_obio_softc), wdc_obio_probe, wdc_obio_attach
     78 };
     79 
     80 static int	wdc_obio_dma_init __P((void *, int, int, void *, size_t, int));
     81 static void 	wdc_obio_dma_start __P((void *, int, int, int));
     82 static int	wdc_obio_dma_finish __P((void *, int, int, int));
     83 
     84 int
     85 wdc_obio_probe(parent, match, aux)
     86 	struct device *parent;
     87 	struct cfdata *match;
     88 	void *aux;
     89 {
     90 	struct confargs *ca = aux;
     91 
     92 	if (strcmp(ca->ca_name, "ATA") == 0 ||
     93 	    strcmp(ca->ca_name, "ata") == 0 ||
     94 	    strcmp(ca->ca_name, "ide") == 0)
     95 		return 1;
     96 
     97 	return 0;
     98 }
     99 
    100 void
    101 wdc_obio_attach(parent, self, aux)
    102 	struct device *parent, *self;
    103 	void *aux;
    104 {
    105 	struct wdc_obio_softc *sc = (void *)self;
    106 	struct confargs *ca = aux;
    107 	struct channel_softc *chp = &sc->wdc_channel;
    108 	int piointr, dmaintr;
    109 	int use_dma = 0;
    110 
    111 	piointr = dmaintr = -1;
    112 
    113 	if (sc->sc_wdcdev.sc_dev.dv_cfdata->cf_flags & WDC_OPTIONS_DMA) {
    114 		if (ca->ca_nreg >= 16 || ca->ca_nintr == -1)
    115 			use_dma = 1;	/* XXX Don't work yet. */
    116 	}
    117 
    118 	if (ca->ca_nintr == -1) {
    119 		piointr = WDC_DEFAULT_PIO_IRQ;
    120 		dmaintr = WDC_DEFAULT_DMA_IRQ;
    121 		printf(" irq property not found; using %d,%d",
    122 			piointr, dmaintr);
    123 	}
    124 
    125 	if (ca->ca_nintr >= 4 && ca->ca_nreg >= 8) {
    126 		piointr = ca->ca_intr[0];
    127 		printf(" irq %d", piointr);
    128 	}
    129 	if (ca->ca_nintr >= 8 && use_dma) {
    130 		dmaintr = ca->ca_intr[1];
    131 		printf(",%d", dmaintr);
    132 	}
    133 
    134 	if (piointr == -1) {
    135 		printf(": couldn't get irq property\n");
    136 		return;
    137 	}
    138 
    139 	if (use_dma)
    140 		printf(": DMA transfer");
    141 
    142 	printf("\n");
    143 
    144 	chp->cmd_iot = chp->ctl_iot =
    145 		macppc_make_bus_space_tag(ca->ca_baseaddr + ca->ca_reg[0], 4);
    146 
    147 	if (bus_space_map(chp->cmd_iot, 0, WDC_REG_NPORTS, 0, &chp->cmd_ioh) ||
    148 	    bus_space_subregion(chp->cmd_iot, chp->cmd_ioh,
    149 			WDC_AUXREG_OFFSET, 1, &chp->ctl_ioh)) {
    150 		printf("%s: couldn't map registers\n",
    151 			sc->sc_wdcdev.sc_dev.dv_xname);
    152 		return;
    153 	}
    154 #if 0
    155 	chp->data32iot = chp->cmd_iot;
    156 	chp->data32ioh = chp->cmd_ioh;
    157 #endif
    158 
    159 	intr_establish(piointr, IST_LEVEL, IPL_BIO, wdcintr, chp);
    160 
    161 	if (use_dma) {
    162 		if (dmaintr != -1)
    163 			intr_establish(dmaintr, IST_LEVEL, IPL_BIO,
    164 				       wdcintr, chp);
    165 
    166 		sc->sc_dmacmd = dbdma_alloc(sizeof(dbdma_command_t) * 20);
    167 		sc->sc_dmareg = mapiodev(ca->ca_baseaddr + ca->ca_reg[2],
    168 					 ca->ca_reg[3]);
    169 		sc->sc_wdcdev.cap |= WDC_CAPABILITY_DMA;
    170 	}
    171 	sc->sc_wdcdev.cap |= WDC_CAPABILITY_DATA16;
    172 	sc->sc_wdcdev.PIO_cap = 0;
    173 	sc->wdc_chanptr = chp;
    174 	sc->sc_wdcdev.channels = &sc->wdc_chanptr;
    175 	sc->sc_wdcdev.nchannels = 1;
    176 	sc->sc_wdcdev.dma_arg = sc;
    177 	sc->sc_wdcdev.dma_init = wdc_obio_dma_init;
    178 	sc->sc_wdcdev.dma_start = wdc_obio_dma_start;
    179 	sc->sc_wdcdev.dma_finish = wdc_obio_dma_finish;
    180 	chp->channel = 0;
    181 	chp->wdc = &sc->sc_wdcdev;
    182 	chp->ch_queue = malloc(sizeof(struct channel_queue),
    183 		M_DEVBUF, M_NOWAIT);
    184 	if (chp->ch_queue == NULL) {
    185 		printf("%s: can't allocate memory for command queue",
    186 		sc->sc_wdcdev.sc_dev.dv_xname);
    187 		return;
    188 	}
    189 
    190 	wdcattach(chp);
    191 }
    192 
    193 static int
    194 wdc_obio_dma_init(v, channel, drive, databuf, datalen, read)
    195 	void *v;
    196 	void *databuf;
    197 	size_t datalen;
    198 	int read;
    199 {
    200 	struct wdc_obio_softc *sc = v;
    201 	vaddr_t va = (vaddr_t)databuf;
    202 	dbdma_command_t *cmdp;
    203 	u_int cmd;
    204 
    205 #ifdef DIAGNOSTIC
    206 	if (va & PGOFSET)
    207 		panic("wdc_obio: databuf not page aligned");
    208 	if (datalen > 65536)
    209 		panic("wdc_obio: datalen too large");
    210 #endif
    211 
    212 	cmdp = sc->sc_dmacmd;
    213 	cmd = read ? DBDMA_CMD_IN_MORE : DBDMA_CMD_OUT_MORE;
    214 	while (datalen > NBPG) {
    215 		DBDMA_BUILD(cmdp, cmd, 0, NBPG, vtophys(va),
    216 			DBDMA_INT_NEVER, DBDMA_WAIT_NEVER, DBDMA_BRANCH_NEVER);
    217 		datalen -= NBPG;
    218 		va += NBPG;
    219 		cmdp++;
    220 	}
    221 
    222 	/* the last page (datalen <= NBPG here) */
    223 	cmd = read ? DBDMA_CMD_IN_LAST : DBDMA_CMD_OUT_LAST;
    224 	DBDMA_BUILD(cmdp, cmd, 0, datalen, vtophys(va),
    225 		DBDMA_INT_ALWAYS, DBDMA_WAIT_NEVER, DBDMA_BRANCH_NEVER);
    226 	cmdp++;
    227 
    228 	DBDMA_BUILD(cmdp, DBDMA_CMD_STOP, 0, 0, 0,
    229 		DBDMA_INT_NEVER, DBDMA_WAIT_NEVER, DBDMA_BRANCH_NEVER);
    230 
    231 	return 0;
    232 }
    233 
    234 static void
    235 wdc_obio_dma_start(v, channel, drive, read)
    236 	void *v;
    237 	int channel, drive;
    238 {
    239 	struct wdc_obio_softc *sc = v;
    240 
    241 	dbdma_start(sc->sc_dmareg, sc->sc_dmacmd);
    242 }
    243 
    244 static int
    245 wdc_obio_dma_finish(v, channel, drive, read)
    246 	void *v;
    247 	int channel, drive;
    248 	int read;
    249 {
    250 	/* nothing to do */
    251 	return 0;
    252 }
    253