wdc_obio.c revision 1.3 1 /* $NetBSD: wdc_obio.c,v 1.3 1999/05/01 10:23:42 tsubai Exp $ */
2
3 /*-
4 * Copyright (c) 1998 The NetBSD Foundation, Inc.
5 * All rights reserved.
6 *
7 * This code is derived from software contributed to The NetBSD Foundation
8 * by Charles M. Hannum and by Onno van der Linden.
9 *
10 * Redistribution and use in source and binary forms, with or without
11 * modification, are permitted provided that the following conditions
12 * are met:
13 * 1. Redistributions of source code must retain the above copyright
14 * notice, this list of conditions and the following disclaimer.
15 * 2. Redistributions in binary form must reproduce the above copyright
16 * notice, this list of conditions and the following disclaimer in the
17 * documentation and/or other materials provided with the distribution.
18 * 3. All advertising materials mentioning features or use of this software
19 * must display the following acknowledgement:
20 * This product includes software developed by the NetBSD
21 * Foundation, Inc. and its contributors.
22 * 4. Neither the name of The NetBSD Foundation nor the names of its
23 * contributors may be used to endorse or promote products derived
24 * from this software without specific prior written permission.
25 *
26 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
27 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
28 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
29 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
30 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
31 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
32 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
33 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
34 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
35 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
36 * POSSIBILITY OF SUCH DAMAGE.
37 */
38
39 #include <sys/param.h>
40 #include <sys/systm.h>
41 #include <sys/device.h>
42 #include <sys/malloc.h>
43
44 #include <vm/vm.h>
45
46 #include <machine/bus.h>
47 #include <machine/autoconf.h>
48
49 #include <dev/ata/atavar.h>
50 #include <dev/ic/wdcvar.h>
51
52 #include <macppc/dev/dbdma.h>
53
54 #define WDC_REG_NPORTS 8
55 #define WDC_AUXREG_OFFSET 0x16
56 #define WDC_DEFAULT_PIO_IRQ 13 /* XXX */
57 #define WDC_DEFAULT_DMA_IRQ 2 /* XXX */
58
59 #define WDC_OPTIONS_DMA 0x01
60
61 /*
62 * XXX This code currently doesn't even try to allow 32-bit data port use.
63 */
64
65 struct wdc_obio_softc {
66 struct wdc_softc sc_wdcdev;
67 struct channel_softc *wdc_chanptr;
68 struct channel_softc wdc_channel;
69 dbdma_regmap_t *sc_dmareg;
70 dbdma_command_t *sc_dmacmd;
71 };
72
73 int wdc_obio_probe __P((struct device *, struct cfdata *, void *));
74 void wdc_obio_attach __P((struct device *, struct device *, void *));
75
76 struct cfattach wdc_obio_ca = {
77 sizeof(struct wdc_obio_softc), wdc_obio_probe, wdc_obio_attach
78 };
79
80 static int wdc_obio_dma_init __P((void *, int, int, void *, size_t, int));
81 static void wdc_obio_dma_start __P((void *, int, int, int));
82 static int wdc_obio_dma_finish __P((void *, int, int, int));
83
84 int
85 wdc_obio_probe(parent, match, aux)
86 struct device *parent;
87 struct cfdata *match;
88 void *aux;
89 {
90 struct confargs *ca = aux;
91 char compat[32];
92
93 /* XXX should not use name */
94 if (strcmp(ca->ca_name, "ATA") == 0 ||
95 strcmp(ca->ca_name, "ata") == 0 ||
96 strcmp(ca->ca_name, "ata0") == 0 ||
97 strcmp(ca->ca_name, "ide") == 0)
98 return 1;
99
100 bzero(compat, sizeof(compat));
101 OF_getprop(ca->ca_node, "compatible", compat, sizeof(compat));
102 if (strcmp(compat, "heathrow-ata") == 0)
103 return 1;
104
105 return 0;
106 }
107
108 void
109 wdc_obio_attach(parent, self, aux)
110 struct device *parent, *self;
111 void *aux;
112 {
113 struct wdc_obio_softc *sc = (void *)self;
114 struct confargs *ca = aux;
115 struct channel_softc *chp = &sc->wdc_channel;
116 int piointr, dmaintr;
117 int use_dma = 0;
118
119 piointr = dmaintr = -1;
120
121 if (sc->sc_wdcdev.sc_dev.dv_cfdata->cf_flags & WDC_OPTIONS_DMA) {
122 if (ca->ca_nreg >= 16 || ca->ca_nintr == -1)
123 use_dma = 1; /* XXX Don't work yet. */
124 }
125
126 if (ca->ca_nintr == -1) {
127 piointr = WDC_DEFAULT_PIO_IRQ;
128 dmaintr = WDC_DEFAULT_DMA_IRQ;
129 printf(" irq property not found; using %d,%d",
130 piointr, dmaintr);
131 }
132
133 if (ca->ca_nintr >= 4 && ca->ca_nreg >= 8) {
134 piointr = ca->ca_intr[0];
135 printf(" irq %d", piointr);
136 }
137 if (ca->ca_nintr >= 8 && use_dma) {
138 dmaintr = ca->ca_intr[1];
139 printf(",%d", dmaintr);
140 }
141
142 if (piointr == -1) {
143 printf(": couldn't get irq property\n");
144 return;
145 }
146
147 if (use_dma)
148 printf(": DMA transfer");
149
150 printf("\n");
151
152 chp->cmd_iot = chp->ctl_iot =
153 macppc_make_bus_space_tag(ca->ca_baseaddr + ca->ca_reg[0], 4);
154
155 if (bus_space_map(chp->cmd_iot, 0, WDC_REG_NPORTS, 0, &chp->cmd_ioh) ||
156 bus_space_subregion(chp->cmd_iot, chp->cmd_ioh,
157 WDC_AUXREG_OFFSET, 1, &chp->ctl_ioh)) {
158 printf("%s: couldn't map registers\n",
159 sc->sc_wdcdev.sc_dev.dv_xname);
160 return;
161 }
162 #if 0
163 chp->data32iot = chp->cmd_iot;
164 chp->data32ioh = chp->cmd_ioh;
165 #endif
166
167 intr_establish(piointr, IST_LEVEL, IPL_BIO, wdcintr, chp);
168
169 if (use_dma) {
170 if (dmaintr != -1)
171 intr_establish(dmaintr, IST_LEVEL, IPL_BIO,
172 wdcintr, chp);
173
174 sc->sc_dmacmd = dbdma_alloc(sizeof(dbdma_command_t) * 20);
175 sc->sc_dmareg = mapiodev(ca->ca_baseaddr + ca->ca_reg[2],
176 ca->ca_reg[3]);
177 sc->sc_wdcdev.cap |= WDC_CAPABILITY_DMA;
178 }
179 sc->sc_wdcdev.cap |= WDC_CAPABILITY_DATA16;
180 sc->sc_wdcdev.PIO_cap = 0;
181 sc->wdc_chanptr = chp;
182 sc->sc_wdcdev.channels = &sc->wdc_chanptr;
183 sc->sc_wdcdev.nchannels = 1;
184 sc->sc_wdcdev.dma_arg = sc;
185 sc->sc_wdcdev.dma_init = wdc_obio_dma_init;
186 sc->sc_wdcdev.dma_start = wdc_obio_dma_start;
187 sc->sc_wdcdev.dma_finish = wdc_obio_dma_finish;
188 chp->channel = 0;
189 chp->wdc = &sc->sc_wdcdev;
190 chp->ch_queue = malloc(sizeof(struct channel_queue),
191 M_DEVBUF, M_NOWAIT);
192 if (chp->ch_queue == NULL) {
193 printf("%s: can't allocate memory for command queue",
194 sc->sc_wdcdev.sc_dev.dv_xname);
195 return;
196 }
197
198 wdcattach(chp);
199 }
200
201 static int
202 wdc_obio_dma_init(v, channel, drive, databuf, datalen, read)
203 void *v;
204 void *databuf;
205 size_t datalen;
206 int read;
207 {
208 struct wdc_obio_softc *sc = v;
209 vaddr_t va = (vaddr_t)databuf;
210 dbdma_command_t *cmdp;
211 u_int cmd;
212
213 #ifdef DIAGNOSTIC
214 if (va & PGOFSET)
215 panic("wdc_obio: databuf not page aligned");
216 if (datalen > 65536)
217 panic("wdc_obio: datalen too large");
218 #endif
219
220 cmdp = sc->sc_dmacmd;
221 cmd = read ? DBDMA_CMD_IN_MORE : DBDMA_CMD_OUT_MORE;
222 while (datalen > NBPG) {
223 DBDMA_BUILD(cmdp, cmd, 0, NBPG, vtophys(va),
224 DBDMA_INT_NEVER, DBDMA_WAIT_NEVER, DBDMA_BRANCH_NEVER);
225 datalen -= NBPG;
226 va += NBPG;
227 cmdp++;
228 }
229
230 /* the last page (datalen <= NBPG here) */
231 cmd = read ? DBDMA_CMD_IN_LAST : DBDMA_CMD_OUT_LAST;
232 DBDMA_BUILD(cmdp, cmd, 0, datalen, vtophys(va),
233 DBDMA_INT_ALWAYS, DBDMA_WAIT_NEVER, DBDMA_BRANCH_NEVER);
234 cmdp++;
235
236 DBDMA_BUILD(cmdp, DBDMA_CMD_STOP, 0, 0, 0,
237 DBDMA_INT_NEVER, DBDMA_WAIT_NEVER, DBDMA_BRANCH_NEVER);
238
239 return 0;
240 }
241
242 static void
243 wdc_obio_dma_start(v, channel, drive, read)
244 void *v;
245 int channel, drive;
246 {
247 struct wdc_obio_softc *sc = v;
248
249 dbdma_start(sc->sc_dmareg, sc->sc_dmacmd);
250 }
251
252 static int
253 wdc_obio_dma_finish(v, channel, drive, read)
254 void *v;
255 int channel, drive;
256 int read;
257 {
258 /* nothing to do */
259 return 0;
260 }
261