wdc_obio.c revision 1.4 1 /* $NetBSD: wdc_obio.c,v 1.4 1999/06/14 08:53:06 tsubai Exp $ */
2
3 /*-
4 * Copyright (c) 1998 The NetBSD Foundation, Inc.
5 * All rights reserved.
6 *
7 * This code is derived from software contributed to The NetBSD Foundation
8 * by Charles M. Hannum and by Onno van der Linden.
9 *
10 * Redistribution and use in source and binary forms, with or without
11 * modification, are permitted provided that the following conditions
12 * are met:
13 * 1. Redistributions of source code must retain the above copyright
14 * notice, this list of conditions and the following disclaimer.
15 * 2. Redistributions in binary form must reproduce the above copyright
16 * notice, this list of conditions and the following disclaimer in the
17 * documentation and/or other materials provided with the distribution.
18 * 3. All advertising materials mentioning features or use of this software
19 * must display the following acknowledgement:
20 * This product includes software developed by the NetBSD
21 * Foundation, Inc. and its contributors.
22 * 4. Neither the name of The NetBSD Foundation nor the names of its
23 * contributors may be used to endorse or promote products derived
24 * from this software without specific prior written permission.
25 *
26 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
27 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
28 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
29 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
30 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
31 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
32 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
33 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
34 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
35 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
36 * POSSIBILITY OF SUCH DAMAGE.
37 */
38
39 #include <sys/param.h>
40 #include <sys/systm.h>
41 #include <sys/device.h>
42 #include <sys/malloc.h>
43
44 #include <vm/vm.h>
45
46 #include <machine/bus.h>
47 #include <machine/autoconf.h>
48
49 #include <dev/ata/atavar.h>
50 #include <dev/ic/wdcvar.h>
51
52 #include <macppc/dev/dbdma.h>
53
54 #define WDC_REG_NPORTS 8
55 #define WDC_AUXREG_OFFSET 0x16
56 #define WDC_DEFAULT_PIO_IRQ 13 /* XXX */
57 #define WDC_DEFAULT_DMA_IRQ 2 /* XXX */
58
59 #define WDC_OPTIONS_DMA 0x01
60
61 /*
62 * XXX This code currently doesn't even try to allow 32-bit data port use.
63 */
64
65 struct wdc_obio_softc {
66 struct wdc_softc sc_wdcdev;
67 struct channel_softc *wdc_chanptr;
68 struct channel_softc wdc_channel;
69 dbdma_regmap_t *sc_dmareg;
70 dbdma_command_t *sc_dmacmd;
71 };
72
73 int wdc_obio_probe __P((struct device *, struct cfdata *, void *));
74 void wdc_obio_attach __P((struct device *, struct device *, void *));
75
76 struct cfattach wdc_obio_ca = {
77 sizeof(struct wdc_obio_softc), wdc_obio_probe, wdc_obio_attach
78 };
79
80 static int wdc_obio_dma_init __P((void *, int, int, void *, size_t, int));
81 static void wdc_obio_dma_start __P((void *, int, int, int));
82 static int wdc_obio_dma_finish __P((void *, int, int, int));
83
84 int
85 wdc_obio_probe(parent, match, aux)
86 struct device *parent;
87 struct cfdata *match;
88 void *aux;
89 {
90 struct confargs *ca = aux;
91 char compat[32];
92
93 /* XXX should not use name */
94 if (strcmp(ca->ca_name, "ATA") == 0 ||
95 strcmp(ca->ca_name, "ata") == 0 ||
96 strcmp(ca->ca_name, "ata0") == 0 ||
97 strcmp(ca->ca_name, "ide") == 0)
98 return 1;
99
100 bzero(compat, sizeof(compat));
101 OF_getprop(ca->ca_node, "compatible", compat, sizeof(compat));
102 if (strcmp(compat, "heathrow-ata") == 0)
103 return 1;
104
105 return 0;
106 }
107
108 void
109 wdc_obio_attach(parent, self, aux)
110 struct device *parent, *self;
111 void *aux;
112 {
113 struct wdc_obio_softc *sc = (void *)self;
114 struct confargs *ca = aux;
115 struct channel_softc *chp = &sc->wdc_channel;
116 int intr;
117 int use_dma = 0;
118
119 if (sc->sc_wdcdev.sc_dev.dv_cfdata->cf_flags & WDC_OPTIONS_DMA) {
120 if (ca->ca_nreg >= 16 || ca->ca_nintr == -1)
121 use_dma = 1; /* XXX Don't work yet. */
122 }
123
124 if (ca->ca_nintr >= 4 && ca->ca_nreg >= 8) {
125 intr = ca->ca_intr[0];
126 printf(" irq %d", intr);
127 } else if (ca->ca_nintr == -1) {
128 intr = WDC_DEFAULT_PIO_IRQ;
129 printf(" irq property not found; using %d", intr);
130 } else {
131 printf(": couldn't get irq property\n");
132 return;
133 }
134
135 if (use_dma)
136 printf(": DMA transfer");
137
138 printf("\n");
139
140 chp->cmd_iot = chp->ctl_iot =
141 macppc_make_bus_space_tag(ca->ca_baseaddr + ca->ca_reg[0], 4);
142
143 if (bus_space_map(chp->cmd_iot, 0, WDC_REG_NPORTS, 0, &chp->cmd_ioh) ||
144 bus_space_subregion(chp->cmd_iot, chp->cmd_ioh,
145 WDC_AUXREG_OFFSET, 1, &chp->ctl_ioh)) {
146 printf("%s: couldn't map registers\n",
147 sc->sc_wdcdev.sc_dev.dv_xname);
148 return;
149 }
150 #if 0
151 chp->data32iot = chp->cmd_iot;
152 chp->data32ioh = chp->cmd_ioh;
153 #endif
154
155 intr_establish(intr, IST_LEVEL, IPL_BIO, wdcintr, chp);
156
157 if (use_dma) {
158 sc->sc_dmacmd = dbdma_alloc(sizeof(dbdma_command_t) * 20);
159 sc->sc_dmareg = mapiodev(ca->ca_baseaddr + ca->ca_reg[2],
160 ca->ca_reg[3]);
161 sc->sc_wdcdev.cap |= WDC_CAPABILITY_DMA;
162 }
163 sc->sc_wdcdev.cap |= WDC_CAPABILITY_DATA16;
164 sc->sc_wdcdev.PIO_cap = 0;
165 sc->wdc_chanptr = chp;
166 sc->sc_wdcdev.channels = &sc->wdc_chanptr;
167 sc->sc_wdcdev.nchannels = 1;
168 sc->sc_wdcdev.dma_arg = sc;
169 sc->sc_wdcdev.dma_init = wdc_obio_dma_init;
170 sc->sc_wdcdev.dma_start = wdc_obio_dma_start;
171 sc->sc_wdcdev.dma_finish = wdc_obio_dma_finish;
172 chp->channel = 0;
173 chp->wdc = &sc->sc_wdcdev;
174 chp->ch_queue = malloc(sizeof(struct channel_queue),
175 M_DEVBUF, M_NOWAIT);
176 if (chp->ch_queue == NULL) {
177 printf("%s: can't allocate memory for command queue",
178 sc->sc_wdcdev.sc_dev.dv_xname);
179 return;
180 }
181
182 wdcattach(chp);
183 }
184
185 static int
186 wdc_obio_dma_init(v, channel, drive, databuf, datalen, read)
187 void *v;
188 void *databuf;
189 size_t datalen;
190 int read;
191 {
192 struct wdc_obio_softc *sc = v;
193 vaddr_t va = (vaddr_t)databuf;
194 dbdma_command_t *cmdp;
195 u_int cmd, offset;
196
197 cmdp = sc->sc_dmacmd;
198 cmd = read ? DBDMA_CMD_IN_MORE : DBDMA_CMD_OUT_MORE;
199
200 offset = va & PGOFSET;
201
202 /* if va is not page-aligned, setup the first page */
203 if (offset != 0) {
204 int rest = NBPG - offset; /* the rest of the page */
205
206 if (datalen > rest) { /* if continues to next page */
207 DBDMA_BUILD(cmdp, cmd, 0, rest, vtophys(va),
208 DBDMA_INT_NEVER, DBDMA_WAIT_NEVER,
209 DBDMA_BRANCH_NEVER);
210 datalen -= rest;
211 va += rest;
212 cmdp++;
213 }
214 }
215
216 /* now va is page-aligned */
217 while (datalen > NBPG) {
218 DBDMA_BUILD(cmdp, cmd, 0, NBPG, vtophys(va),
219 DBDMA_INT_NEVER, DBDMA_WAIT_NEVER, DBDMA_BRANCH_NEVER);
220 datalen -= NBPG;
221 va += NBPG;
222 cmdp++;
223 }
224
225 /* the last page (datalen <= NBPG here) */
226 cmd = read ? DBDMA_CMD_IN_LAST : DBDMA_CMD_OUT_LAST;
227 DBDMA_BUILD(cmdp, cmd, 0, datalen, vtophys(va),
228 DBDMA_INT_NEVER, DBDMA_WAIT_NEVER, DBDMA_BRANCH_NEVER);
229 cmdp++;
230
231 DBDMA_BUILD(cmdp, DBDMA_CMD_STOP, 0, 0, 0,
232 DBDMA_INT_NEVER, DBDMA_WAIT_NEVER, DBDMA_BRANCH_NEVER);
233
234 return 0;
235 }
236
237 static void
238 wdc_obio_dma_start(v, channel, drive, read)
239 void *v;
240 int channel, drive;
241 {
242 struct wdc_obio_softc *sc = v;
243
244 dbdma_start(sc->sc_dmareg, sc->sc_dmacmd);
245 }
246
247 static int
248 wdc_obio_dma_finish(v, channel, drive, read)
249 void *v;
250 int channel, drive;
251 int read;
252 {
253 struct wdc_obio_softc *sc = v;
254
255 dbdma_stop(sc->sc_dmareg);
256 return 0;
257 }
258