wdc_obio.c revision 1.5
1 /* $NetBSD: wdc_obio.c,v 1.5 1999/10/04 22:58:10 tsubai Exp $ */ 2 3 /*- 4 * Copyright (c) 1998 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to The NetBSD Foundation 8 * by Charles M. Hannum and by Onno van der Linden. 9 * 10 * Redistribution and use in source and binary forms, with or without 11 * modification, are permitted provided that the following conditions 12 * are met: 13 * 1. Redistributions of source code must retain the above copyright 14 * notice, this list of conditions and the following disclaimer. 15 * 2. Redistributions in binary form must reproduce the above copyright 16 * notice, this list of conditions and the following disclaimer in the 17 * documentation and/or other materials provided with the distribution. 18 * 3. All advertising materials mentioning features or use of this software 19 * must display the following acknowledgement: 20 * This product includes software developed by the NetBSD 21 * Foundation, Inc. and its contributors. 22 * 4. Neither the name of The NetBSD Foundation nor the names of its 23 * contributors may be used to endorse or promote products derived 24 * from this software without specific prior written permission. 25 * 26 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 27 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 28 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 29 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 30 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 31 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 32 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 33 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 34 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 35 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 36 * POSSIBILITY OF SUCH DAMAGE. 37 */ 38 39 #include <sys/param.h> 40 #include <sys/systm.h> 41 #include <sys/device.h> 42 #include <sys/malloc.h> 43 44 #include <vm/vm.h> 45 46 #include <machine/bus.h> 47 #include <machine/autoconf.h> 48 49 #include <dev/ata/atavar.h> 50 #include <dev/ic/wdcvar.h> 51 52 #include <macppc/dev/dbdma.h> 53 54 #define WDC_REG_NPORTS 8 55 #define WDC_AUXREG_OFFSET 0x16 56 #define WDC_DEFAULT_PIO_IRQ 13 /* XXX */ 57 #define WDC_DEFAULT_DMA_IRQ 2 /* XXX */ 58 59 #define WDC_OPTIONS_DMA 0x01 60 61 /* 62 * XXX This code currently doesn't even try to allow 32-bit data port use. 63 */ 64 65 struct wdc_obio_softc { 66 struct wdc_softc sc_wdcdev; 67 struct channel_softc *wdc_chanptr; 68 struct channel_softc wdc_channel; 69 dbdma_regmap_t *sc_dmareg; 70 dbdma_command_t *sc_dmacmd; 71 void *sc_ih; 72 }; 73 74 int wdc_obio_probe __P((struct device *, struct cfdata *, void *)); 75 void wdc_obio_attach __P((struct device *, struct device *, void *)); 76 int wdc_obio_detach __P((struct device *, int)); 77 78 struct cfattach wdc_obio_ca = { 79 sizeof(struct wdc_obio_softc), wdc_obio_probe, wdc_obio_attach, 80 wdc_obio_detach, wdcactivate 81 }; 82 83 static int wdc_obio_dma_init __P((void *, int, int, void *, size_t, int)); 84 static void wdc_obio_dma_start __P((void *, int, int, int)); 85 static int wdc_obio_dma_finish __P((void *, int, int, int)); 86 87 int 88 wdc_obio_probe(parent, match, aux) 89 struct device *parent; 90 struct cfdata *match; 91 void *aux; 92 { 93 struct confargs *ca = aux; 94 char compat[32]; 95 96 /* XXX should not use name */ 97 if (strcmp(ca->ca_name, "ATA") == 0 || 98 strcmp(ca->ca_name, "ata") == 0 || 99 strcmp(ca->ca_name, "ata0") == 0 || 100 strcmp(ca->ca_name, "ide") == 0) 101 return 1; 102 103 bzero(compat, sizeof(compat)); 104 OF_getprop(ca->ca_node, "compatible", compat, sizeof(compat)); 105 if (strcmp(compat, "heathrow-ata") == 0) 106 return 1; 107 108 return 0; 109 } 110 111 void 112 wdc_obio_attach(parent, self, aux) 113 struct device *parent, *self; 114 void *aux; 115 { 116 struct wdc_obio_softc *sc = (void *)self; 117 struct confargs *ca = aux; 118 struct channel_softc *chp = &sc->wdc_channel; 119 int intr; 120 int use_dma = 0; 121 122 if (sc->sc_wdcdev.sc_dev.dv_cfdata->cf_flags & WDC_OPTIONS_DMA) { 123 if (ca->ca_nreg >= 16 || ca->ca_nintr == -1) 124 use_dma = 1; /* XXX Don't work yet. */ 125 } 126 127 if (ca->ca_nintr >= 4 && ca->ca_nreg >= 8) { 128 intr = ca->ca_intr[0]; 129 printf(" irq %d", intr); 130 } else if (ca->ca_nintr == -1) { 131 intr = WDC_DEFAULT_PIO_IRQ; 132 printf(" irq property not found; using %d", intr); 133 } else { 134 printf(": couldn't get irq property\n"); 135 return; 136 } 137 138 if (use_dma) 139 printf(": DMA transfer"); 140 141 printf("\n"); 142 143 chp->cmd_iot = chp->ctl_iot = 144 macppc_make_bus_space_tag(ca->ca_baseaddr + ca->ca_reg[0], 4); 145 146 if (bus_space_map(chp->cmd_iot, 0, WDC_REG_NPORTS, 0, &chp->cmd_ioh) || 147 bus_space_subregion(chp->cmd_iot, chp->cmd_ioh, 148 WDC_AUXREG_OFFSET, 1, &chp->ctl_ioh)) { 149 printf("%s: couldn't map registers\n", 150 sc->sc_wdcdev.sc_dev.dv_xname); 151 return; 152 } 153 #if 0 154 chp->data32iot = chp->cmd_iot; 155 chp->data32ioh = chp->cmd_ioh; 156 #endif 157 158 sc->sc_ih = intr_establish(intr, IST_LEVEL, IPL_BIO, wdcintr, chp); 159 160 if (use_dma) { 161 sc->sc_dmacmd = dbdma_alloc(sizeof(dbdma_command_t) * 20); 162 sc->sc_dmareg = mapiodev(ca->ca_baseaddr + ca->ca_reg[2], 163 ca->ca_reg[3]); 164 sc->sc_wdcdev.cap |= WDC_CAPABILITY_DMA; 165 } 166 sc->sc_wdcdev.cap |= WDC_CAPABILITY_DATA16; 167 sc->sc_wdcdev.PIO_cap = 0; 168 sc->wdc_chanptr = chp; 169 sc->sc_wdcdev.channels = &sc->wdc_chanptr; 170 sc->sc_wdcdev.nchannels = 1; 171 sc->sc_wdcdev.dma_arg = sc; 172 sc->sc_wdcdev.dma_init = wdc_obio_dma_init; 173 sc->sc_wdcdev.dma_start = wdc_obio_dma_start; 174 sc->sc_wdcdev.dma_finish = wdc_obio_dma_finish; 175 chp->channel = 0; 176 chp->wdc = &sc->sc_wdcdev; 177 chp->ch_queue = malloc(sizeof(struct channel_queue), 178 M_DEVBUF, M_NOWAIT); 179 if (chp->ch_queue == NULL) { 180 printf("%s: can't allocate memory for command queue", 181 sc->sc_wdcdev.sc_dev.dv_xname); 182 return; 183 } 184 185 wdcattach(chp); 186 } 187 188 int 189 wdc_obio_detach(self, flags) 190 struct device *self; 191 int flags; 192 { 193 struct wdc_obio_softc *sc = (void *)self; 194 struct channel_softc *chp = &sc->wdc_channel; 195 int error; 196 197 if ((error = wdcdetach(self, flags)) != 0) 198 return error; 199 200 intr_disestablish(sc->sc_ih); 201 202 free(sc->wdc_channel.ch_queue, M_DEVBUF); 203 204 /* Unmap our i/o space. */ 205 bus_space_unmap(chp->cmd_iot, chp->cmd_ioh, WDC_REG_NPORTS); 206 207 /* Unmap DMA registers. */ 208 /* XXX unmapiodev(sc->sc_dmareg); */ 209 /* XXX free(sc->sc_dmacmd); */ 210 211 return 0; 212 } 213 214 static int 215 wdc_obio_dma_init(v, channel, drive, databuf, datalen, read) 216 void *v; 217 void *databuf; 218 size_t datalen; 219 int read; 220 { 221 struct wdc_obio_softc *sc = v; 222 vaddr_t va = (vaddr_t)databuf; 223 dbdma_command_t *cmdp; 224 u_int cmd, offset; 225 226 cmdp = sc->sc_dmacmd; 227 cmd = read ? DBDMA_CMD_IN_MORE : DBDMA_CMD_OUT_MORE; 228 229 offset = va & PGOFSET; 230 231 /* if va is not page-aligned, setup the first page */ 232 if (offset != 0) { 233 int rest = NBPG - offset; /* the rest of the page */ 234 235 if (datalen > rest) { /* if continues to next page */ 236 DBDMA_BUILD(cmdp, cmd, 0, rest, vtophys(va), 237 DBDMA_INT_NEVER, DBDMA_WAIT_NEVER, 238 DBDMA_BRANCH_NEVER); 239 datalen -= rest; 240 va += rest; 241 cmdp++; 242 } 243 } 244 245 /* now va is page-aligned */ 246 while (datalen > NBPG) { 247 DBDMA_BUILD(cmdp, cmd, 0, NBPG, vtophys(va), 248 DBDMA_INT_NEVER, DBDMA_WAIT_NEVER, DBDMA_BRANCH_NEVER); 249 datalen -= NBPG; 250 va += NBPG; 251 cmdp++; 252 } 253 254 /* the last page (datalen <= NBPG here) */ 255 cmd = read ? DBDMA_CMD_IN_LAST : DBDMA_CMD_OUT_LAST; 256 DBDMA_BUILD(cmdp, cmd, 0, datalen, vtophys(va), 257 DBDMA_INT_NEVER, DBDMA_WAIT_NEVER, DBDMA_BRANCH_NEVER); 258 cmdp++; 259 260 DBDMA_BUILD(cmdp, DBDMA_CMD_STOP, 0, 0, 0, 261 DBDMA_INT_NEVER, DBDMA_WAIT_NEVER, DBDMA_BRANCH_NEVER); 262 263 return 0; 264 } 265 266 static void 267 wdc_obio_dma_start(v, channel, drive, read) 268 void *v; 269 int channel, drive; 270 { 271 struct wdc_obio_softc *sc = v; 272 273 dbdma_start(sc->sc_dmareg, sc->sc_dmacmd); 274 } 275 276 static int 277 wdc_obio_dma_finish(v, channel, drive, read) 278 void *v; 279 int channel, drive; 280 int read; 281 { 282 struct wdc_obio_softc *sc = v; 283 284 dbdma_stop(sc->sc_dmareg); 285 return 0; 286 } 287
Indexes created Tue Sep 30 11:09:46 GMT 2025