zs.c revision 1.24 1 1.24 thorpej /* $NetBSD: zs.c,v 1.24 2003/01/01 01:47:30 thorpej Exp $ */
2 1.1 tsubai
3 1.1 tsubai /*
4 1.7 wrstuden * Copyright (c) 1996, 1998 Bill Studenmund
5 1.1 tsubai * Copyright (c) 1995 Gordon W. Ross
6 1.1 tsubai * All rights reserved.
7 1.1 tsubai *
8 1.1 tsubai * Redistribution and use in source and binary forms, with or without
9 1.1 tsubai * modification, are permitted provided that the following conditions
10 1.1 tsubai * are met:
11 1.1 tsubai * 1. Redistributions of source code must retain the above copyright
12 1.1 tsubai * notice, this list of conditions and the following disclaimer.
13 1.1 tsubai * 2. Redistributions in binary form must reproduce the above copyright
14 1.1 tsubai * notice, this list of conditions and the following disclaimer in the
15 1.1 tsubai * documentation and/or other materials provided with the distribution.
16 1.1 tsubai * 3. The name of the author may not be used to endorse or promote products
17 1.1 tsubai * derived from this software without specific prior written permission.
18 1.1 tsubai * 4. All advertising materials mentioning features or use of this software
19 1.1 tsubai * must display the following acknowledgement:
20 1.1 tsubai * This product includes software developed by Gordon Ross
21 1.1 tsubai *
22 1.1 tsubai * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
23 1.1 tsubai * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
24 1.1 tsubai * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
25 1.1 tsubai * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
26 1.1 tsubai * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
27 1.1 tsubai * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
28 1.1 tsubai * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
29 1.1 tsubai * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
30 1.1 tsubai * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
31 1.1 tsubai * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
32 1.1 tsubai */
33 1.1 tsubai
34 1.1 tsubai /*
35 1.1 tsubai * Zilog Z8530 Dual UART driver (machine-dependent part)
36 1.1 tsubai *
37 1.1 tsubai * Runs two serial lines per chip using slave drivers.
38 1.1 tsubai * Plain tty/async lines use the zs_async slave.
39 1.1 tsubai * Sun keyboard/mouse uses the zs_kbd/zs_ms slaves.
40 1.1 tsubai * Other ports use their own mice & keyboard slaves.
41 1.1 tsubai *
42 1.1 tsubai * Credits & history:
43 1.1 tsubai *
44 1.1 tsubai * With NetBSD 1.1, port-mac68k started using a port of the port-sparc
45 1.1 tsubai * (port-sun3?) zs.c driver (which was in turn based on code in the
46 1.1 tsubai * Berkeley 4.4 Lite release). Bill Studenmund did the port, with
47 1.1 tsubai * help from Allen Briggs and Gordon Ross <gwr (at) netbsd.org>. Noud de
48 1.1 tsubai * Brouwer field-tested the driver at a local ISP.
49 1.1 tsubai *
50 1.1 tsubai * Bill Studenmund and Gordon Ross then ported the machine-independant
51 1.1 tsubai * z8530 driver to work with port-mac68k. NetBSD 1.2 contained an
52 1.1 tsubai * intermediate version (mac68k using a local, patched version of
53 1.1 tsubai * the m.i. drivers), with NetBSD 1.3 containing a full version.
54 1.1 tsubai */
55 1.3 jonathan
56 1.3 jonathan #include "opt_ddb.h"
57 1.19 dbj #include "opt_kgdb.h"
58 1.1 tsubai
59 1.1 tsubai #include <sys/param.h>
60 1.1 tsubai #include <sys/systm.h>
61 1.1 tsubai #include <sys/proc.h>
62 1.1 tsubai #include <sys/device.h>
63 1.1 tsubai #include <sys/conf.h>
64 1.1 tsubai #include <sys/file.h>
65 1.1 tsubai #include <sys/ioctl.h>
66 1.1 tsubai #include <sys/tty.h>
67 1.1 tsubai #include <sys/time.h>
68 1.1 tsubai #include <sys/kernel.h>
69 1.1 tsubai #include <sys/syslog.h>
70 1.19 dbj #ifdef KGDB
71 1.19 dbj #include <sys/kgdb.h>
72 1.19 dbj #endif
73 1.1 tsubai
74 1.1 tsubai #include <dev/cons.h>
75 1.1 tsubai #include <dev/ofw/openfirm.h>
76 1.1 tsubai #include <dev/ic/z8530reg.h>
77 1.1 tsubai
78 1.1 tsubai #include <machine/z8530var.h>
79 1.1 tsubai #include <machine/autoconf.h>
80 1.1 tsubai #include <machine/cpu.h>
81 1.1 tsubai #include <machine/pio.h>
82 1.1 tsubai
83 1.1 tsubai /* Are these in a header file anywhere? */
84 1.1 tsubai /* Booter flags interface */
85 1.1 tsubai #define ZSMAC_RAW 0x01
86 1.1 tsubai #define ZSMAC_LOCALTALK 0x02
87 1.11 mycroft
88 1.1 tsubai #include "zsc.h" /* get the # of zs chips defined */
89 1.1 tsubai
90 1.1 tsubai /*
91 1.1 tsubai * Some warts needed by z8530tty.c -
92 1.1 tsubai */
93 1.1 tsubai int zs_def_cflag = (CREAD | CS8 | HUPCL);
94 1.1 tsubai
95 1.1 tsubai /*
96 1.1 tsubai * abort detection on console will now timeout after iterating on a loop
97 1.1 tsubai * the following # of times. Cheep hack. Also, abort detection is turned
98 1.1 tsubai * off after a timeout (i.e. maybe there's not a terminal hooked up).
99 1.1 tsubai */
100 1.1 tsubai #define ZSABORT_DELAY 3000000
101 1.1 tsubai
102 1.1 tsubai struct zsdevice {
103 1.1 tsubai /* Yes, they are backwards. */
104 1.1 tsubai struct zschan zs_chan_b;
105 1.1 tsubai struct zschan zs_chan_a;
106 1.1 tsubai };
107 1.1 tsubai
108 1.1 tsubai /* Flags from cninit() */
109 1.1 tsubai static int zs_hwflags[NZSC][2];
110 1.1 tsubai /* Default speed for each channel */
111 1.1 tsubai static int zs_defspeed[NZSC][2] = {
112 1.1 tsubai { 38400, /* tty00 */
113 1.1 tsubai 38400 }, /* tty01 */
114 1.1 tsubai };
115 1.15 tsubai
116 1.1 tsubai /* console stuff */
117 1.1 tsubai void *zs_conschan = 0;
118 1.1 tsubai #ifdef ZS_CONSOLE_ABORT
119 1.1 tsubai int zs_cons_canabort = 1;
120 1.1 tsubai #else
121 1.1 tsubai int zs_cons_canabort = 0;
122 1.1 tsubai #endif /* ZS_CONSOLE_ABORT*/
123 1.1 tsubai
124 1.1 tsubai /* device to which the console is attached--if serial. */
125 1.1 tsubai /* Mac stuff */
126 1.1 tsubai
127 1.13 tsubai static int zs_get_speed __P((struct zs_chanstate *));
128 1.1 tsubai
129 1.1 tsubai /*
130 1.1 tsubai * Even though zsparam will set up the clock multiples, etc., we
131 1.1 tsubai * still set them here as: 1) mice & keyboards don't use zsparam,
132 1.1 tsubai * and 2) the console stuff uses these defaults before device
133 1.1 tsubai * attach.
134 1.1 tsubai */
135 1.1 tsubai
136 1.1 tsubai static u_char zs_init_reg[16] = {
137 1.1 tsubai 0, /* 0: CMD (reset, etc.) */
138 1.1 tsubai 0, /* 1: No interrupts yet. */
139 1.1 tsubai 0, /* IVECT */
140 1.1 tsubai ZSWR3_RX_8 | ZSWR3_RX_ENABLE,
141 1.1 tsubai ZSWR4_CLK_X16 | ZSWR4_ONESB | ZSWR4_EVENP,
142 1.1 tsubai ZSWR5_TX_8 | ZSWR5_TX_ENABLE,
143 1.1 tsubai 0, /* 6: TXSYNC/SYNCLO */
144 1.1 tsubai 0, /* 7: RXSYNC/SYNCHI */
145 1.1 tsubai 0, /* 8: alias for data port */
146 1.1 tsubai ZSWR9_MASTER_IE,
147 1.1 tsubai 0, /*10: Misc. TX/RX control bits */
148 1.1 tsubai ZSWR11_TXCLK_BAUD | ZSWR11_RXCLK_BAUD,
149 1.11 mycroft ((PCLK/32)/38400)-2, /*12: BAUDLO (default=38400) */
150 1.11 mycroft 0, /*13: BAUDHI (default=38400) */
151 1.12 wrstuden ZSWR14_BAUD_ENA,
152 1.10 mycroft ZSWR15_BREAK_IE,
153 1.1 tsubai };
154 1.1 tsubai
155 1.1 tsubai /****************************************************************
156 1.1 tsubai * Autoconfig
157 1.1 tsubai ****************************************************************/
158 1.1 tsubai
159 1.1 tsubai /* Definition of the driver for autoconfig. */
160 1.1 tsubai static int zsc_match __P((struct device *, struct cfdata *, void *));
161 1.1 tsubai static void zsc_attach __P((struct device *, struct device *, void *));
162 1.1 tsubai static int zsc_print __P((void *, const char *name));
163 1.1 tsubai
164 1.23 thorpej CFATTACH_DECL(zsc, sizeof(struct zsc_softc),
165 1.23 thorpej zsc_match, zsc_attach, NULL, NULL);
166 1.1 tsubai
167 1.1 tsubai extern struct cfdriver zsc_cd;
168 1.1 tsubai
169 1.1 tsubai int zshard __P((void *));
170 1.1 tsubai int zssoft __P((void *));
171 1.1 tsubai #ifdef ZS_TXDMA
172 1.1 tsubai static int zs_txdma_int __P((void *));
173 1.1 tsubai #endif
174 1.1 tsubai
175 1.1 tsubai void zscnprobe __P((struct consdev *));
176 1.1 tsubai void zscninit __P((struct consdev *));
177 1.1 tsubai int zscngetc __P((dev_t));
178 1.1 tsubai void zscnputc __P((dev_t, int));
179 1.1 tsubai void zscnpollc __P((dev_t, int));
180 1.1 tsubai
181 1.1 tsubai /*
182 1.1 tsubai * Is the zs chip present?
183 1.1 tsubai */
184 1.1 tsubai static int
185 1.1 tsubai zsc_match(parent, cf, aux)
186 1.1 tsubai struct device *parent;
187 1.1 tsubai struct cfdata *cf;
188 1.1 tsubai void *aux;
189 1.1 tsubai {
190 1.1 tsubai struct confargs *ca = aux;
191 1.1 tsubai int unit = cf->cf_unit;
192 1.1 tsubai
193 1.1 tsubai if (strcmp(ca->ca_name, "escc") != 0)
194 1.1 tsubai return 0;
195 1.1 tsubai
196 1.1 tsubai if (unit > 1)
197 1.1 tsubai return 0;
198 1.1 tsubai
199 1.1 tsubai return 1;
200 1.1 tsubai }
201 1.1 tsubai
202 1.1 tsubai /*
203 1.1 tsubai * Attach a found zs.
204 1.1 tsubai *
205 1.1 tsubai * Match slave number to zs unit number, so that misconfiguration will
206 1.1 tsubai * not set up the keyboard as ttya, etc.
207 1.1 tsubai */
208 1.1 tsubai static void
209 1.1 tsubai zsc_attach(parent, self, aux)
210 1.1 tsubai struct device *parent;
211 1.1 tsubai struct device *self;
212 1.1 tsubai void *aux;
213 1.1 tsubai {
214 1.1 tsubai struct zsc_softc *zsc = (void *)self;
215 1.1 tsubai struct confargs *ca = aux;
216 1.1 tsubai struct zsc_attach_args zsc_args;
217 1.1 tsubai volatile struct zschan *zc;
218 1.1 tsubai struct xzs_chanstate *xcs;
219 1.1 tsubai struct zs_chanstate *cs;
220 1.15 tsubai struct zsdevice *zsd;
221 1.1 tsubai int zsc_unit, channel;
222 1.1 tsubai int s, chip, theflags;
223 1.1 tsubai int node, intr[2][3];
224 1.1 tsubai u_int regs[6];
225 1.1 tsubai
226 1.15 tsubai chip = 0;
227 1.1 tsubai zsc_unit = zsc->zsc_dev.dv_unit;
228 1.1 tsubai
229 1.8 tsubai ca->ca_reg[0] += ca->ca_baseaddr;
230 1.15 tsubai zsd = mapiodev(ca->ca_reg[0], ca->ca_reg[1]);
231 1.8 tsubai
232 1.8 tsubai node = OF_child(ca->ca_node); /* ch-a */
233 1.1 tsubai
234 1.1 tsubai for (channel = 0; channel < 2; channel++) {
235 1.8 tsubai if (OF_getprop(node, "AAPL,interrupts",
236 1.9 tsubai intr[channel], sizeof(intr[0])) == -1 &&
237 1.8 tsubai OF_getprop(node, "interrupts",
238 1.9 tsubai intr[channel], sizeof(intr[0])) == -1) {
239 1.8 tsubai printf(": cannot find interrupt property\n");
240 1.8 tsubai return;
241 1.8 tsubai }
242 1.8 tsubai
243 1.8 tsubai if (OF_getprop(node, "reg", regs, sizeof(regs)) < 24) {
244 1.8 tsubai printf(": cannot find reg property\n");
245 1.8 tsubai return;
246 1.8 tsubai }
247 1.1 tsubai regs[2] += ca->ca_baseaddr;
248 1.1 tsubai regs[4] += ca->ca_baseaddr;
249 1.1 tsubai #ifdef ZS_TXDMA
250 1.1 tsubai zsc->zsc_txdmareg[channel] = mapiodev(regs[2], regs[3]);
251 1.1 tsubai zsc->zsc_txdmacmd[channel] =
252 1.1 tsubai dbdma_alloc(sizeof(dbdma_command_t) * 3);
253 1.18 wiz memset(zsc->zsc_txdmacmd[channel], 0,
254 1.18 wiz sizeof(dbdma_command_t) * 3);
255 1.1 tsubai dbdma_reset(zsc->zsc_txdmareg[channel]);
256 1.1 tsubai #endif
257 1.1 tsubai node = OF_peer(node); /* ch-b */
258 1.1 tsubai }
259 1.1 tsubai
260 1.1 tsubai printf(": irq %d,%d\n", intr[0][0], intr[1][0]);
261 1.1 tsubai
262 1.1 tsubai /*
263 1.1 tsubai * Initialize software state for each channel.
264 1.1 tsubai */
265 1.1 tsubai for (channel = 0; channel < 2; channel++) {
266 1.1 tsubai zsc_args.channel = channel;
267 1.1 tsubai zsc_args.hwflags = zs_hwflags[zsc_unit][channel];
268 1.1 tsubai xcs = &zsc->xzsc_xcs_store[channel];
269 1.1 tsubai cs = &xcs->xzs_cs;
270 1.1 tsubai zsc->zsc_cs[channel] = cs;
271 1.1 tsubai
272 1.1 tsubai cs->cs_channel = channel;
273 1.1 tsubai cs->cs_private = NULL;
274 1.1 tsubai cs->cs_ops = &zsops_null;
275 1.1 tsubai
276 1.15 tsubai zc = (channel == 0) ? &zsd->zs_chan_a : &zsd->zs_chan_b;
277 1.15 tsubai
278 1.1 tsubai cs->cs_reg_csr = &zc->zc_csr;
279 1.1 tsubai cs->cs_reg_data = &zc->zc_data;
280 1.1 tsubai
281 1.18 wiz memcpy(cs->cs_creg, zs_init_reg, 16);
282 1.18 wiz memcpy(cs->cs_preg, zs_init_reg, 16);
283 1.1 tsubai
284 1.1 tsubai /* Current BAUD rate generator clock. */
285 1.11 mycroft cs->cs_brg_clk = PCLK / 16; /* RTxC is 230400*16, so use 230400 */
286 1.13 tsubai if (zsc_args.hwflags & ZS_HWFLAG_CONSOLE)
287 1.13 tsubai cs->cs_defspeed = zs_get_speed(cs);
288 1.13 tsubai else
289 1.13 tsubai cs->cs_defspeed = zs_defspeed[zsc_unit][channel];
290 1.1 tsubai cs->cs_defcflag = zs_def_cflag;
291 1.1 tsubai
292 1.1 tsubai /* Make these correspond to cs_defcflag (-crtscts) */
293 1.1 tsubai cs->cs_rr0_dcd = ZSRR0_DCD;
294 1.1 tsubai cs->cs_rr0_cts = 0;
295 1.1 tsubai cs->cs_wr5_dtr = ZSWR5_DTR;
296 1.1 tsubai cs->cs_wr5_rts = 0;
297 1.1 tsubai
298 1.1 tsubai #ifdef __notyet__
299 1.1 tsubai cs->cs_slave_type = ZS_SLAVE_NONE;
300 1.1 tsubai #endif
301 1.1 tsubai
302 1.1 tsubai /* Define BAUD rate stuff. */
303 1.11 mycroft xcs->cs_clocks[0].clk = PCLK;
304 1.7 wrstuden xcs->cs_clocks[0].flags = ZSC_RTXBRG | ZSC_RTXDIV;
305 1.1 tsubai xcs->cs_clocks[1].flags =
306 1.1 tsubai ZSC_RTXBRG | ZSC_RTXDIV | ZSC_VARIABLE | ZSC_EXTERN;
307 1.1 tsubai xcs->cs_clocks[2].flags = ZSC_TRXDIV | ZSC_VARIABLE;
308 1.1 tsubai xcs->cs_clock_count = 3;
309 1.1 tsubai if (channel == 0) {
310 1.1 tsubai theflags = 0; /*mac68k_machine.modem_flags;*/
311 1.6 tsubai /*xcs->cs_clocks[1].clk = mac68k_machine.modem_dcd_clk;*/
312 1.6 tsubai /*xcs->cs_clocks[2].clk = mac68k_machine.modem_cts_clk;*/
313 1.6 tsubai xcs->cs_clocks[1].clk = 0;
314 1.1 tsubai xcs->cs_clocks[2].clk = 0;
315 1.1 tsubai } else {
316 1.1 tsubai theflags = 0; /*mac68k_machine.print_flags;*/
317 1.1 tsubai xcs->cs_clocks[1].flags = ZSC_VARIABLE;
318 1.1 tsubai /*
319 1.1 tsubai * Yes, we aren't defining ANY clock source enables for the
320 1.1 tsubai * printer's DCD clock in. The hardware won't let us
321 1.1 tsubai * use it. But a clock will freak out the chip, so we
322 1.1 tsubai * let you set it, telling us to bar interrupts on the line.
323 1.1 tsubai */
324 1.6 tsubai /*xcs->cs_clocks[1].clk = mac68k_machine.print_dcd_clk;*/
325 1.6 tsubai /*xcs->cs_clocks[2].clk = mac68k_machine.print_cts_clk;*/
326 1.6 tsubai xcs->cs_clocks[1].clk = 0;
327 1.1 tsubai xcs->cs_clocks[2].clk = 0;
328 1.1 tsubai }
329 1.1 tsubai if (xcs->cs_clocks[1].clk)
330 1.1 tsubai zsc_args.hwflags |= ZS_HWFLAG_NO_DCD;
331 1.1 tsubai if (xcs->cs_clocks[2].clk)
332 1.1 tsubai zsc_args.hwflags |= ZS_HWFLAG_NO_CTS;
333 1.1 tsubai
334 1.1 tsubai /* Set defaults in our "extended" chanstate. */
335 1.1 tsubai xcs->cs_csource = 0;
336 1.1 tsubai xcs->cs_psource = 0;
337 1.1 tsubai xcs->cs_cclk_flag = 0; /* Nothing fancy by default */
338 1.1 tsubai xcs->cs_pclk_flag = 0;
339 1.1 tsubai
340 1.1 tsubai if (theflags & ZSMAC_RAW) {
341 1.1 tsubai zsc_args.hwflags |= ZS_HWFLAG_RAW;
342 1.1 tsubai printf(" (raw defaults)");
343 1.1 tsubai }
344 1.1 tsubai
345 1.1 tsubai /*
346 1.1 tsubai * XXX - This might be better done with a "stub" driver
347 1.1 tsubai * (to replace zstty) that ignores LocalTalk for now.
348 1.1 tsubai */
349 1.1 tsubai if (theflags & ZSMAC_LOCALTALK) {
350 1.1 tsubai printf(" shielding from LocalTalk");
351 1.1 tsubai cs->cs_defspeed = 1;
352 1.1 tsubai cs->cs_creg[ZSRR_BAUDLO] = cs->cs_preg[ZSRR_BAUDLO] = 0xff;
353 1.1 tsubai cs->cs_creg[ZSRR_BAUDHI] = cs->cs_preg[ZSRR_BAUDHI] = 0xff;
354 1.1 tsubai zs_write_reg(cs, ZSRR_BAUDLO, 0xff);
355 1.1 tsubai zs_write_reg(cs, ZSRR_BAUDHI, 0xff);
356 1.1 tsubai /*
357 1.1 tsubai * If we might have LocalTalk, then make sure we have the
358 1.1 tsubai * Baud rate low-enough to not do any damage.
359 1.1 tsubai */
360 1.1 tsubai }
361 1.1 tsubai
362 1.1 tsubai /*
363 1.1 tsubai * We used to disable chip interrupts here, but we now
364 1.1 tsubai * do that in zscnprobe, just in case MacOS left the chip on.
365 1.1 tsubai */
366 1.1 tsubai
367 1.1 tsubai xcs->cs_chip = chip;
368 1.1 tsubai
369 1.1 tsubai /* Stash away a copy of the final H/W flags. */
370 1.1 tsubai xcs->cs_hwflags = zsc_args.hwflags;
371 1.1 tsubai
372 1.1 tsubai /*
373 1.1 tsubai * Look for a child driver for this channel.
374 1.1 tsubai * The child attach will setup the hardware.
375 1.1 tsubai */
376 1.1 tsubai if (!config_found(self, (void *)&zsc_args, zsc_print)) {
377 1.1 tsubai /* No sub-driver. Just reset it. */
378 1.1 tsubai u_char reset = (channel == 0) ?
379 1.1 tsubai ZSWR9_A_RESET : ZSWR9_B_RESET;
380 1.1 tsubai s = splzs();
381 1.1 tsubai zs_write_reg(cs, 9, reset);
382 1.1 tsubai splx(s);
383 1.1 tsubai }
384 1.1 tsubai }
385 1.1 tsubai
386 1.1 tsubai /* XXX - Now safe to install interrupt handlers. */
387 1.1 tsubai intr_establish(intr[0][0], IST_LEVEL, IPL_TTY, zshard, NULL);
388 1.1 tsubai intr_establish(intr[1][0], IST_LEVEL, IPL_TTY, zshard, NULL);
389 1.1 tsubai #ifdef ZS_TXDMA
390 1.1 tsubai intr_establish(intr[0][1], IST_LEVEL, IPL_TTY, zs_txdma_int, (void *)0);
391 1.1 tsubai intr_establish(intr[1][1], IST_LEVEL, IPL_TTY, zs_txdma_int, (void *)1);
392 1.1 tsubai #endif
393 1.1 tsubai
394 1.1 tsubai /*
395 1.1 tsubai * Set the master interrupt enable and interrupt vector.
396 1.1 tsubai * (common to both channels, do it on A)
397 1.1 tsubai */
398 1.1 tsubai cs = zsc->zsc_cs[0];
399 1.1 tsubai s = splzs();
400 1.1 tsubai /* interrupt vector */
401 1.1 tsubai zs_write_reg(cs, 2, zs_init_reg[2]);
402 1.1 tsubai /* master interrupt control (enable) */
403 1.1 tsubai zs_write_reg(cs, 9, zs_init_reg[9]);
404 1.1 tsubai splx(s);
405 1.1 tsubai }
406 1.1 tsubai
407 1.1 tsubai static int
408 1.1 tsubai zsc_print(aux, name)
409 1.1 tsubai void *aux;
410 1.1 tsubai const char *name;
411 1.1 tsubai {
412 1.1 tsubai struct zsc_attach_args *args = aux;
413 1.1 tsubai
414 1.1 tsubai if (name != NULL)
415 1.24 thorpej aprint_normal("%s: ", name);
416 1.1 tsubai
417 1.1 tsubai if (args->channel != -1)
418 1.24 thorpej aprint_normal(" channel %d", args->channel);
419 1.1 tsubai
420 1.1 tsubai return UNCONF;
421 1.6 tsubai }
422 1.6 tsubai
423 1.6 tsubai int
424 1.6 tsubai zsmdioctl(cs, cmd, data)
425 1.6 tsubai struct zs_chanstate *cs;
426 1.6 tsubai u_long cmd;
427 1.6 tsubai caddr_t data;
428 1.6 tsubai {
429 1.6 tsubai switch (cmd) {
430 1.6 tsubai default:
431 1.20 atatat return (EPASSTHROUGH);
432 1.6 tsubai }
433 1.6 tsubai return (0);
434 1.6 tsubai }
435 1.6 tsubai
436 1.6 tsubai void
437 1.6 tsubai zsmd_setclock(cs)
438 1.6 tsubai struct zs_chanstate *cs;
439 1.6 tsubai {
440 1.16 matt #ifdef NOTYET
441 1.6 tsubai struct xzs_chanstate *xcs = (void *)cs;
442 1.6 tsubai
443 1.6 tsubai if (cs->cs_channel != 0)
444 1.6 tsubai return;
445 1.6 tsubai
446 1.6 tsubai /*
447 1.6 tsubai * If the new clock has the external bit set, then select the
448 1.6 tsubai * external source.
449 1.6 tsubai */
450 1.16 matt via_set_modem((xcs->cs_pclk_flag & ZSC_EXTERN) ? 1 : 0);
451 1.16 matt #endif
452 1.1 tsubai }
453 1.1 tsubai
454 1.1 tsubai static int zssoftpending;
455 1.1 tsubai
456 1.1 tsubai /*
457 1.1 tsubai * Our ZS chips all share a common, autovectored interrupt,
458 1.1 tsubai * so we have to look at all of them on each interrupt.
459 1.1 tsubai */
460 1.1 tsubai int
461 1.1 tsubai zshard(arg)
462 1.1 tsubai void *arg;
463 1.1 tsubai {
464 1.1 tsubai register struct zsc_softc *zsc;
465 1.1 tsubai register int unit, rval;
466 1.1 tsubai
467 1.1 tsubai rval = 0;
468 1.1 tsubai for (unit = 0; unit < zsc_cd.cd_ndevs; unit++) {
469 1.1 tsubai zsc = zsc_cd.cd_devs[unit];
470 1.1 tsubai if (zsc == NULL)
471 1.1 tsubai continue;
472 1.1 tsubai rval |= zsc_intr_hard(zsc);
473 1.1 tsubai if ((zsc->zsc_cs[0]->cs_softreq) ||
474 1.1 tsubai (zsc->zsc_cs[1]->cs_softreq))
475 1.1 tsubai {
476 1.1 tsubai /* zsc_req_softint(zsc); */
477 1.1 tsubai /* We are at splzs here, so no need to lock. */
478 1.1 tsubai if (zssoftpending == 0) {
479 1.1 tsubai zssoftpending = 1;
480 1.1 tsubai setsoftserial();
481 1.1 tsubai }
482 1.1 tsubai }
483 1.1 tsubai }
484 1.1 tsubai return (rval);
485 1.1 tsubai }
486 1.1 tsubai
487 1.1 tsubai /*
488 1.1 tsubai * Similar scheme as for zshard (look at all of them)
489 1.1 tsubai */
490 1.1 tsubai int
491 1.1 tsubai zssoft(arg)
492 1.1 tsubai void *arg;
493 1.1 tsubai {
494 1.1 tsubai register struct zsc_softc *zsc;
495 1.1 tsubai register int unit;
496 1.1 tsubai
497 1.1 tsubai /* This is not the only ISR on this IPL. */
498 1.1 tsubai if (zssoftpending == 0)
499 1.1 tsubai return (0);
500 1.1 tsubai
501 1.1 tsubai /*
502 1.1 tsubai * The soft intr. bit will be set by zshard only if
503 1.1 tsubai * the variable zssoftpending is zero.
504 1.1 tsubai */
505 1.1 tsubai zssoftpending = 0;
506 1.1 tsubai
507 1.1 tsubai for (unit = 0; unit < zsc_cd.cd_ndevs; ++unit) {
508 1.1 tsubai zsc = zsc_cd.cd_devs[unit];
509 1.1 tsubai if (zsc == NULL)
510 1.1 tsubai continue;
511 1.1 tsubai (void) zsc_intr_soft(zsc);
512 1.1 tsubai }
513 1.1 tsubai return (1);
514 1.1 tsubai }
515 1.1 tsubai
516 1.1 tsubai #ifdef ZS_TXDMA
517 1.1 tsubai int
518 1.1 tsubai zs_txdma_int(arg)
519 1.1 tsubai void *arg;
520 1.1 tsubai {
521 1.1 tsubai int ch = (int)arg;
522 1.1 tsubai struct zsc_softc *zsc;
523 1.1 tsubai struct zs_chanstate *cs;
524 1.1 tsubai int unit = 0; /* XXX */
525 1.1 tsubai extern int zstty_txdma_int();
526 1.1 tsubai
527 1.1 tsubai zsc = zsc_cd.cd_devs[unit];
528 1.1 tsubai if (zsc == NULL)
529 1.1 tsubai panic("zs_txdma_int");
530 1.1 tsubai
531 1.1 tsubai cs = zsc->zsc_cs[ch];
532 1.1 tsubai zstty_txdma_int(cs);
533 1.1 tsubai
534 1.1 tsubai if (cs->cs_softreq) {
535 1.1 tsubai if (zssoftpending == 0) {
536 1.1 tsubai zssoftpending = 1;
537 1.1 tsubai setsoftserial();
538 1.1 tsubai }
539 1.1 tsubai }
540 1.1 tsubai return 1;
541 1.1 tsubai }
542 1.1 tsubai
543 1.1 tsubai void
544 1.1 tsubai zs_dma_setup(cs, pa, len)
545 1.1 tsubai struct zs_chanstate *cs;
546 1.1 tsubai caddr_t pa;
547 1.1 tsubai int len;
548 1.1 tsubai {
549 1.1 tsubai struct zsc_softc *zsc;
550 1.1 tsubai dbdma_command_t *cmdp;
551 1.1 tsubai int ch = cs->cs_channel;
552 1.1 tsubai
553 1.1 tsubai zsc = zsc_cd.cd_devs[ch];
554 1.1 tsubai cmdp = zsc->zsc_txdmacmd[ch];
555 1.1 tsubai
556 1.1 tsubai DBDMA_BUILD(cmdp, DBDMA_CMD_OUT_LAST, 0, len, kvtop(pa),
557 1.1 tsubai DBDMA_INT_ALWAYS, DBDMA_WAIT_NEVER, DBDMA_BRANCH_NEVER);
558 1.1 tsubai cmdp++;
559 1.1 tsubai DBDMA_BUILD(cmdp, DBDMA_CMD_STOP, 0, 0, 0,
560 1.1 tsubai DBDMA_INT_NEVER, DBDMA_WAIT_NEVER, DBDMA_BRANCH_NEVER);
561 1.1 tsubai
562 1.1 tsubai __asm __volatile("eieio");
563 1.1 tsubai
564 1.1 tsubai dbdma_start(zsc->zsc_txdmareg[ch], zsc->zsc_txdmacmd[ch]);
565 1.1 tsubai }
566 1.1 tsubai #endif
567 1.1 tsubai
568 1.1 tsubai /*
569 1.13 tsubai * Compute the current baud rate given a ZS channel.
570 1.13 tsubai * XXX Assume internal BRG.
571 1.1 tsubai */
572 1.1 tsubai int
573 1.13 tsubai zs_get_speed(cs)
574 1.13 tsubai struct zs_chanstate *cs;
575 1.1 tsubai {
576 1.13 tsubai int tconst;
577 1.1 tsubai
578 1.13 tsubai tconst = zs_read_reg(cs, 12);
579 1.13 tsubai tconst |= zs_read_reg(cs, 13) << 8;
580 1.13 tsubai return TCONST_TO_BPS(cs->cs_brg_clk, tconst);
581 1.1 tsubai }
582 1.13 tsubai
583 1.13 tsubai #ifndef ZS_TOLERANCE
584 1.13 tsubai #define ZS_TOLERANCE 51
585 1.13 tsubai /* 5% in tenths of a %, plus 1 so that exactly 5% will be ok. */
586 1.13 tsubai #endif
587 1.1 tsubai
588 1.1 tsubai /*
589 1.1 tsubai * Search through the signal sources in the channel, and
590 1.1 tsubai * pick the best one for the baud rate requested. Return
591 1.1 tsubai * a -1 if not achievable in tolerance. Otherwise return 0
592 1.1 tsubai * and fill in the values.
593 1.1 tsubai *
594 1.1 tsubai * This routine draws inspiration from the Atari port's zs.c
595 1.1 tsubai * driver in NetBSD 1.1 which did the same type of source switching.
596 1.1 tsubai * Tolerance code inspired by comspeed routine in isa/com.c.
597 1.1 tsubai *
598 1.1 tsubai * By Bill Studenmund, 1996-05-12
599 1.1 tsubai */
600 1.1 tsubai int
601 1.1 tsubai zs_set_speed(cs, bps)
602 1.1 tsubai struct zs_chanstate *cs;
603 1.1 tsubai int bps; /* bits per second */
604 1.1 tsubai {
605 1.1 tsubai struct xzs_chanstate *xcs = (void *) cs;
606 1.1 tsubai int i, tc, tc0 = 0, tc1, s, sf = 0;
607 1.1 tsubai int src, rate0, rate1, err, tol;
608 1.1 tsubai
609 1.1 tsubai if (bps == 0)
610 1.1 tsubai return (0);
611 1.1 tsubai
612 1.1 tsubai src = -1; /* no valid source yet */
613 1.1 tsubai tol = ZS_TOLERANCE;
614 1.1 tsubai
615 1.1 tsubai /*
616 1.1 tsubai * Step through all the sources and see which one matches
617 1.1 tsubai * the best. A source has to match BETTER than tol to be chosen.
618 1.1 tsubai * Thus if two sources give the same error, the first one will be
619 1.1 tsubai * chosen. Also, allow for the possability that one source might run
620 1.1 tsubai * both the BRG and the direct divider (i.e. RTxC).
621 1.1 tsubai */
622 1.1 tsubai for (i = 0; i < xcs->cs_clock_count; i++) {
623 1.1 tsubai if (xcs->cs_clocks[i].clk <= 0)
624 1.17 wiz continue; /* skip non-existent or bad clocks */
625 1.1 tsubai if (xcs->cs_clocks[i].flags & ZSC_BRG) {
626 1.1 tsubai /* check out BRG at /16 */
627 1.1 tsubai tc1 = BPS_TO_TCONST(xcs->cs_clocks[i].clk >> 4, bps);
628 1.1 tsubai if (tc1 >= 0) {
629 1.1 tsubai rate1 = TCONST_TO_BPS(xcs->cs_clocks[i].clk >> 4, tc1);
630 1.1 tsubai err = abs(((rate1 - bps)*1000)/bps);
631 1.1 tsubai if (err < tol) {
632 1.1 tsubai tol = err;
633 1.1 tsubai src = i;
634 1.1 tsubai sf = xcs->cs_clocks[i].flags & ~ZSC_DIV;
635 1.1 tsubai tc0 = tc1;
636 1.1 tsubai rate0 = rate1;
637 1.1 tsubai }
638 1.1 tsubai }
639 1.1 tsubai }
640 1.1 tsubai if (xcs->cs_clocks[i].flags & ZSC_DIV) {
641 1.1 tsubai /*
642 1.1 tsubai * Check out either /1, /16, /32, or /64
643 1.1 tsubai * Note: for /1, you'd better be using a synchronized
644 1.1 tsubai * clock!
645 1.1 tsubai */
646 1.1 tsubai int b0 = xcs->cs_clocks[i].clk, e0 = abs(b0-bps);
647 1.1 tsubai int b1 = b0 >> 4, e1 = abs(b1-bps);
648 1.1 tsubai int b2 = b1 >> 1, e2 = abs(b2-bps);
649 1.1 tsubai int b3 = b2 >> 1, e3 = abs(b3-bps);
650 1.1 tsubai
651 1.1 tsubai if (e0 < e1 && e0 < e2 && e0 < e3) {
652 1.1 tsubai err = e0;
653 1.1 tsubai rate1 = b0;
654 1.1 tsubai tc1 = ZSWR4_CLK_X1;
655 1.1 tsubai } else if (e0 > e1 && e1 < e2 && e1 < e3) {
656 1.1 tsubai err = e1;
657 1.1 tsubai rate1 = b1;
658 1.1 tsubai tc1 = ZSWR4_CLK_X16;
659 1.1 tsubai } else if (e0 > e2 && e1 > e2 && e2 < e3) {
660 1.1 tsubai err = e2;
661 1.1 tsubai rate1 = b2;
662 1.1 tsubai tc1 = ZSWR4_CLK_X32;
663 1.1 tsubai } else {
664 1.1 tsubai err = e3;
665 1.1 tsubai rate1 = b3;
666 1.1 tsubai tc1 = ZSWR4_CLK_X64;
667 1.1 tsubai }
668 1.1 tsubai
669 1.1 tsubai err = (err * 1000)/bps;
670 1.1 tsubai if (err < tol) {
671 1.1 tsubai tol = err;
672 1.1 tsubai src = i;
673 1.1 tsubai sf = xcs->cs_clocks[i].flags & ~ZSC_BRG;
674 1.1 tsubai tc0 = tc1;
675 1.1 tsubai rate0 = rate1;
676 1.1 tsubai }
677 1.1 tsubai }
678 1.1 tsubai }
679 1.1 tsubai #ifdef ZSMACDEBUG
680 1.1 tsubai zsprintf("Checking for rate %d. Found source #%d.\n",bps, src);
681 1.1 tsubai #endif
682 1.1 tsubai if (src == -1)
683 1.1 tsubai return (EINVAL); /* no can do */
684 1.1 tsubai
685 1.1 tsubai /*
686 1.1 tsubai * The M.I. layer likes to keep cs_brg_clk current, even though
687 1.1 tsubai * we are the only ones who should be touching the BRG's rate.
688 1.1 tsubai *
689 1.1 tsubai * Note: we are assuming that any ZSC_EXTERN signal source comes in
690 1.1 tsubai * on the RTxC pin. Correct for the mac68k obio zsc.
691 1.1 tsubai */
692 1.1 tsubai if (sf & ZSC_EXTERN)
693 1.1 tsubai cs->cs_brg_clk = xcs->cs_clocks[i].clk >> 4;
694 1.1 tsubai else
695 1.11 mycroft cs->cs_brg_clk = PCLK / 16;
696 1.1 tsubai
697 1.1 tsubai /*
698 1.1 tsubai * Now we have a source, so set it up.
699 1.1 tsubai */
700 1.1 tsubai s = splzs();
701 1.1 tsubai xcs->cs_psource = src;
702 1.1 tsubai xcs->cs_pclk_flag = sf;
703 1.1 tsubai bps = rate0;
704 1.1 tsubai if (sf & ZSC_BRG) {
705 1.1 tsubai cs->cs_preg[4] = ZSWR4_CLK_X16;
706 1.1 tsubai cs->cs_preg[11]= ZSWR11_RXCLK_BAUD | ZSWR11_TXCLK_BAUD;
707 1.1 tsubai if (sf & ZSC_PCLK) {
708 1.1 tsubai cs->cs_preg[14] = ZSWR14_BAUD_ENA | ZSWR14_BAUD_FROM_PCLK;
709 1.1 tsubai } else {
710 1.1 tsubai cs->cs_preg[14] = ZSWR14_BAUD_ENA;
711 1.1 tsubai }
712 1.1 tsubai tc = tc0;
713 1.1 tsubai } else {
714 1.1 tsubai cs->cs_preg[4] = tc0;
715 1.1 tsubai if (sf & ZSC_RTXDIV) {
716 1.1 tsubai cs->cs_preg[11] = ZSWR11_RXCLK_RTXC | ZSWR11_TXCLK_RTXC;
717 1.1 tsubai } else {
718 1.1 tsubai cs->cs_preg[11] = ZSWR11_RXCLK_TRXC | ZSWR11_TXCLK_TRXC;
719 1.1 tsubai }
720 1.1 tsubai cs->cs_preg[14]= 0;
721 1.1 tsubai tc = 0xffff;
722 1.1 tsubai }
723 1.1 tsubai /* Set the BAUD rate divisor. */
724 1.1 tsubai cs->cs_preg[12] = tc;
725 1.1 tsubai cs->cs_preg[13] = tc >> 8;
726 1.1 tsubai splx(s);
727 1.1 tsubai
728 1.1 tsubai #ifdef ZSMACDEBUG
729 1.1 tsubai zsprintf("Rate is %7d, tc is %7d, source no. %2d, flags %4x\n", \
730 1.1 tsubai bps, tc, src, sf);
731 1.1 tsubai zsprintf("Registers are: 4 %x, 11 %x, 14 %x\n\n",
732 1.1 tsubai cs->cs_preg[4], cs->cs_preg[11], cs->cs_preg[14]);
733 1.1 tsubai #endif
734 1.1 tsubai
735 1.1 tsubai cs->cs_preg[5] |= ZSWR5_RTS; /* Make sure the drivers are on! */
736 1.1 tsubai
737 1.1 tsubai /* Caller will stuff the pending registers. */
738 1.1 tsubai return (0);
739 1.1 tsubai }
740 1.1 tsubai
741 1.1 tsubai int
742 1.1 tsubai zs_set_modes(cs, cflag)
743 1.1 tsubai struct zs_chanstate *cs;
744 1.1 tsubai int cflag; /* bits per second */
745 1.1 tsubai {
746 1.1 tsubai struct xzs_chanstate *xcs = (void*)cs;
747 1.1 tsubai int s;
748 1.1 tsubai
749 1.1 tsubai /*
750 1.1 tsubai * Make sure we don't enable hfc on a signal line we're ignoring.
751 1.1 tsubai * As we enable CTS interrupts only if we have CRTSCTS or CDTRCTS,
752 1.1 tsubai * this code also effectivly turns off ZSWR15_CTS_IE.
753 1.1 tsubai *
754 1.1 tsubai * Also, disable DCD interrupts if we've been told to ignore
755 1.1 tsubai * the DCD pin. Happens on mac68k because the input line for
756 1.1 tsubai * DCD can also be used as a clock input. (Just set CLOCAL.)
757 1.1 tsubai *
758 1.1 tsubai * If someone tries to turn an invalid flow mode on, Just Say No
759 1.1 tsubai * (Suggested by gwr)
760 1.1 tsubai */
761 1.1 tsubai if ((cflag & CDTRCTS) && (cflag & (CRTSCTS | MDMBUF)))
762 1.1 tsubai return (EINVAL);
763 1.1 tsubai if (xcs->cs_hwflags & ZS_HWFLAG_NO_DCD) {
764 1.1 tsubai if (cflag & MDMBUF)
765 1.1 tsubai return (EINVAL);
766 1.1 tsubai cflag |= CLOCAL;
767 1.1 tsubai }
768 1.1 tsubai if ((xcs->cs_hwflags & ZS_HWFLAG_NO_CTS) && (cflag & (CRTSCTS | CDTRCTS)))
769 1.1 tsubai return (EINVAL);
770 1.1 tsubai
771 1.1 tsubai /*
772 1.1 tsubai * Output hardware flow control on the chip is horrendous:
773 1.1 tsubai * if carrier detect drops, the receiver is disabled, and if
774 1.1 tsubai * CTS drops, the transmitter is stoped IN MID CHARACTER!
775 1.1 tsubai * Therefore, NEVER set the HFC bit, and instead use the
776 1.1 tsubai * status interrupt to detect CTS changes.
777 1.1 tsubai */
778 1.1 tsubai s = splzs();
779 1.1 tsubai if ((cflag & (CLOCAL | MDMBUF)) != 0)
780 1.1 tsubai cs->cs_rr0_dcd = 0;
781 1.1 tsubai else
782 1.1 tsubai cs->cs_rr0_dcd = ZSRR0_DCD;
783 1.1 tsubai /*
784 1.1 tsubai * The mac hardware only has one output, DTR (HSKo in Mac
785 1.1 tsubai * parlance). In HFC mode, we use it for the functions
786 1.1 tsubai * typically served by RTS and DTR on other ports, so we
787 1.1 tsubai * have to fake the upper layer out some.
788 1.1 tsubai *
789 1.1 tsubai * CRTSCTS we use CTS as an input which tells us when to shut up.
790 1.1 tsubai * We make no effort to shut up the other side of the connection.
791 1.1 tsubai * DTR is used to hang up the modem.
792 1.1 tsubai *
793 1.1 tsubai * In CDTRCTS, we use CTS to tell us to stop, but we use DTR to
794 1.1 tsubai * shut up the other side.
795 1.1 tsubai */
796 1.1 tsubai if ((cflag & CRTSCTS) != 0) {
797 1.1 tsubai cs->cs_wr5_dtr = ZSWR5_DTR;
798 1.1 tsubai cs->cs_wr5_rts = 0;
799 1.1 tsubai cs->cs_rr0_cts = ZSRR0_CTS;
800 1.1 tsubai } else if ((cflag & CDTRCTS) != 0) {
801 1.1 tsubai cs->cs_wr5_dtr = 0;
802 1.1 tsubai cs->cs_wr5_rts = ZSWR5_DTR;
803 1.1 tsubai cs->cs_rr0_cts = ZSRR0_CTS;
804 1.1 tsubai } else if ((cflag & MDMBUF) != 0) {
805 1.1 tsubai cs->cs_wr5_dtr = 0;
806 1.1 tsubai cs->cs_wr5_rts = ZSWR5_DTR;
807 1.1 tsubai cs->cs_rr0_cts = ZSRR0_DCD;
808 1.1 tsubai } else {
809 1.1 tsubai cs->cs_wr5_dtr = ZSWR5_DTR;
810 1.1 tsubai cs->cs_wr5_rts = 0;
811 1.1 tsubai cs->cs_rr0_cts = 0;
812 1.1 tsubai }
813 1.1 tsubai splx(s);
814 1.1 tsubai
815 1.1 tsubai /* Caller will stuff the pending registers. */
816 1.1 tsubai return (0);
817 1.1 tsubai }
818 1.1 tsubai
819 1.1 tsubai
820 1.1 tsubai /*
821 1.1 tsubai * Read or write the chip with suitable delays.
822 1.1 tsubai * MacII hardware has the delay built in.
823 1.1 tsubai * No need for extra delay. :-) However, some clock-chirped
824 1.1 tsubai * macs, or zsc's on serial add-on boards might need it.
825 1.1 tsubai */
826 1.1 tsubai #define ZS_DELAY()
827 1.1 tsubai
828 1.1 tsubai u_char
829 1.1 tsubai zs_read_reg(cs, reg)
830 1.1 tsubai struct zs_chanstate *cs;
831 1.1 tsubai u_char reg;
832 1.1 tsubai {
833 1.1 tsubai u_char val;
834 1.1 tsubai
835 1.1 tsubai out8(cs->cs_reg_csr, reg);
836 1.1 tsubai ZS_DELAY();
837 1.1 tsubai val = in8(cs->cs_reg_csr);
838 1.1 tsubai ZS_DELAY();
839 1.1 tsubai return val;
840 1.1 tsubai }
841 1.1 tsubai
842 1.1 tsubai void
843 1.1 tsubai zs_write_reg(cs, reg, val)
844 1.1 tsubai struct zs_chanstate *cs;
845 1.1 tsubai u_char reg, val;
846 1.1 tsubai {
847 1.1 tsubai out8(cs->cs_reg_csr, reg);
848 1.1 tsubai ZS_DELAY();
849 1.1 tsubai out8(cs->cs_reg_csr, val);
850 1.1 tsubai ZS_DELAY();
851 1.1 tsubai }
852 1.1 tsubai
853 1.1 tsubai u_char zs_read_csr(cs)
854 1.1 tsubai struct zs_chanstate *cs;
855 1.1 tsubai {
856 1.1 tsubai register u_char val;
857 1.1 tsubai
858 1.1 tsubai val = in8(cs->cs_reg_csr);
859 1.1 tsubai ZS_DELAY();
860 1.1 tsubai /* make up for the fact CTS is wired backwards */
861 1.1 tsubai val ^= ZSRR0_CTS;
862 1.1 tsubai return val;
863 1.1 tsubai }
864 1.1 tsubai
865 1.1 tsubai void zs_write_csr(cs, val)
866 1.1 tsubai struct zs_chanstate *cs;
867 1.1 tsubai u_char val;
868 1.1 tsubai {
869 1.1 tsubai /* Note, the csr does not write CTS... */
870 1.1 tsubai out8(cs->cs_reg_csr, val);
871 1.1 tsubai ZS_DELAY();
872 1.1 tsubai }
873 1.1 tsubai
874 1.1 tsubai u_char zs_read_data(cs)
875 1.1 tsubai struct zs_chanstate *cs;
876 1.1 tsubai {
877 1.1 tsubai register u_char val;
878 1.1 tsubai
879 1.1 tsubai val = in8(cs->cs_reg_data);
880 1.1 tsubai ZS_DELAY();
881 1.1 tsubai return val;
882 1.1 tsubai }
883 1.1 tsubai
884 1.1 tsubai void zs_write_data(cs, val)
885 1.1 tsubai struct zs_chanstate *cs;
886 1.1 tsubai u_char val;
887 1.1 tsubai {
888 1.1 tsubai out8(cs->cs_reg_data, val);
889 1.1 tsubai ZS_DELAY();
890 1.1 tsubai }
891 1.1 tsubai
892 1.1 tsubai /****************************************************************
893 1.1 tsubai * Console support functions (powermac specific!)
894 1.1 tsubai * Note: this code is allowed to know about the layout of
895 1.1 tsubai * the chip registers, and uses that to keep things simple.
896 1.1 tsubai * XXX - I think I like the mvme167 code better. -gwr
897 1.1 tsubai * XXX - Well :-P :-) -wrs
898 1.1 tsubai ****************************************************************/
899 1.1 tsubai
900 1.1 tsubai #define zscnpollc nullcnpollc
901 1.1 tsubai cons_decl(zs);
902 1.1 tsubai
903 1.4 tsubai static int stdin, stdout;
904 1.4 tsubai
905 1.1 tsubai /*
906 1.1 tsubai * Console functions.
907 1.1 tsubai */
908 1.1 tsubai
909 1.1 tsubai /*
910 1.1 tsubai * zscnprobe is the routine which gets called as the kernel is trying to
911 1.1 tsubai * figure out where the console should be. Each io driver which might
912 1.1 tsubai * be the console (as defined in mac68k/conf.c) gets probed. The probe
913 1.1 tsubai * fills in the consdev structure. Important parts are the device #,
914 1.1 tsubai * and the console priority. Values are CN_DEAD (don't touch me),
915 1.1 tsubai * CN_NORMAL (I'm here, but elsewhere might be better), CN_INTERNAL
916 1.1 tsubai * (the video, better than CN_NORMAL), and CN_REMOTE (pick me!)
917 1.1 tsubai *
918 1.1 tsubai * As the mac's a bit different, we do extra work here. We mainly check
919 1.1 tsubai * to see if we have serial echo going on. Also chould check for default
920 1.1 tsubai * speeds.
921 1.1 tsubai */
922 1.1 tsubai
923 1.1 tsubai /*
924 1.1 tsubai * Polled input char.
925 1.1 tsubai */
926 1.1 tsubai int
927 1.19 dbj zs_getc(v)
928 1.19 dbj void *v;
929 1.1 tsubai {
930 1.19 dbj register volatile struct zschan *zc = v;
931 1.1 tsubai register int s, c, rr0;
932 1.1 tsubai
933 1.1 tsubai s = splhigh();
934 1.1 tsubai /* Wait for a character to arrive. */
935 1.1 tsubai do {
936 1.1 tsubai rr0 = in8(&zc->zc_csr);
937 1.1 tsubai ZS_DELAY();
938 1.1 tsubai } while ((rr0 & ZSRR0_RX_READY) == 0);
939 1.1 tsubai
940 1.1 tsubai c = in8(&zc->zc_data);
941 1.1 tsubai ZS_DELAY();
942 1.1 tsubai splx(s);
943 1.1 tsubai
944 1.1 tsubai /*
945 1.1 tsubai * This is used by the kd driver to read scan codes,
946 1.1 tsubai * so don't translate '\r' ==> '\n' here...
947 1.1 tsubai */
948 1.1 tsubai return (c);
949 1.1 tsubai }
950 1.1 tsubai
951 1.1 tsubai /*
952 1.1 tsubai * Polled output char.
953 1.1 tsubai */
954 1.1 tsubai void
955 1.19 dbj zs_putc(v, c)
956 1.19 dbj void *v;
957 1.1 tsubai int c;
958 1.1 tsubai {
959 1.19 dbj register volatile struct zschan *zc = v;
960 1.1 tsubai register int s, rr0;
961 1.1 tsubai register long wait = 0;
962 1.1 tsubai
963 1.1 tsubai s = splhigh();
964 1.1 tsubai /* Wait for transmitter to become ready. */
965 1.1 tsubai do {
966 1.1 tsubai rr0 = in8(&zc->zc_csr);
967 1.1 tsubai ZS_DELAY();
968 1.1 tsubai } while (((rr0 & ZSRR0_TX_READY) == 0) && (wait++ < 1000000));
969 1.1 tsubai
970 1.1 tsubai if ((rr0 & ZSRR0_TX_READY) != 0) {
971 1.1 tsubai out8(&zc->zc_data, c);
972 1.1 tsubai ZS_DELAY();
973 1.1 tsubai }
974 1.1 tsubai splx(s);
975 1.1 tsubai }
976 1.1 tsubai
977 1.1 tsubai
978 1.1 tsubai /*
979 1.1 tsubai * Polled console input putchar.
980 1.1 tsubai */
981 1.1 tsubai int
982 1.1 tsubai zscngetc(dev)
983 1.1 tsubai dev_t dev;
984 1.1 tsubai {
985 1.1 tsubai register volatile struct zschan *zc = zs_conschan;
986 1.1 tsubai register int c;
987 1.1 tsubai
988 1.4 tsubai if (zc) {
989 1.19 dbj c = zs_getc((void *)zc);
990 1.4 tsubai } else {
991 1.4 tsubai char ch = 0;
992 1.4 tsubai OF_read(stdin, &ch, 1);
993 1.4 tsubai c = ch;
994 1.4 tsubai }
995 1.4 tsubai return c;
996 1.1 tsubai }
997 1.1 tsubai
998 1.1 tsubai /*
999 1.1 tsubai * Polled console output putchar.
1000 1.1 tsubai */
1001 1.1 tsubai void
1002 1.1 tsubai zscnputc(dev, c)
1003 1.1 tsubai dev_t dev;
1004 1.1 tsubai int c;
1005 1.1 tsubai {
1006 1.1 tsubai register volatile struct zschan *zc = zs_conschan;
1007 1.1 tsubai
1008 1.4 tsubai if (zc) {
1009 1.19 dbj zs_putc((void *)zc, c);
1010 1.4 tsubai } else {
1011 1.4 tsubai char ch = c;
1012 1.4 tsubai OF_write(stdout, &ch, 1);
1013 1.4 tsubai }
1014 1.1 tsubai }
1015 1.1 tsubai
1016 1.1 tsubai /*
1017 1.1 tsubai * Handle user request to enter kernel debugger.
1018 1.1 tsubai */
1019 1.1 tsubai void
1020 1.1 tsubai zs_abort(cs)
1021 1.1 tsubai struct zs_chanstate *cs;
1022 1.1 tsubai {
1023 1.1 tsubai volatile struct zschan *zc = zs_conschan;
1024 1.1 tsubai int rr0;
1025 1.1 tsubai register long wait = 0;
1026 1.1 tsubai
1027 1.1 tsubai if (zs_cons_canabort == 0)
1028 1.1 tsubai return;
1029 1.1 tsubai
1030 1.1 tsubai /* Wait for end of break to avoid PROM abort. */
1031 1.1 tsubai do {
1032 1.1 tsubai rr0 = in8(&zc->zc_csr);
1033 1.1 tsubai ZS_DELAY();
1034 1.1 tsubai } while ((rr0 & ZSRR0_BREAK) && (wait++ < ZSABORT_DELAY));
1035 1.1 tsubai
1036 1.1 tsubai if (wait > ZSABORT_DELAY) {
1037 1.1 tsubai zs_cons_canabort = 0;
1038 1.1 tsubai /* If we time out, turn off the abort ability! */
1039 1.1 tsubai }
1040 1.1 tsubai
1041 1.19 dbj #if defined(KGDB)
1042 1.19 dbj kgdb_connect(1);
1043 1.19 dbj #elif defined(DDB)
1044 1.1 tsubai Debugger();
1045 1.1 tsubai #endif
1046 1.1 tsubai }
1047 1.1 tsubai
1048 1.2 tsubai extern int ofccngetc __P((dev_t));
1049 1.2 tsubai extern void ofccnputc __P((dev_t, int));
1050 1.1 tsubai
1051 1.1 tsubai struct consdev consdev_zs = {
1052 1.1 tsubai zscnprobe,
1053 1.1 tsubai zscninit,
1054 1.4 tsubai zscngetc,
1055 1.4 tsubai zscnputc,
1056 1.1 tsubai zscnpollc,
1057 1.14 thorpej NULL,
1058 1.1 tsubai };
1059 1.1 tsubai
1060 1.1 tsubai void
1061 1.4 tsubai zscnprobe(cp)
1062 1.4 tsubai struct consdev *cp;
1063 1.1 tsubai {
1064 1.4 tsubai int chosen, pkg;
1065 1.4 tsubai int unit = 0;
1066 1.4 tsubai char name[16];
1067 1.21 gehenna extern const struct cdevsw zstty_cdevsw;
1068 1.4 tsubai
1069 1.4 tsubai if ((chosen = OF_finddevice("/chosen")) == -1)
1070 1.4 tsubai return;
1071 1.4 tsubai
1072 1.4 tsubai if (OF_getprop(chosen, "stdin", &stdin, sizeof(stdin)) == -1)
1073 1.4 tsubai return;
1074 1.4 tsubai if (OF_getprop(chosen, "stdout", &stdout, sizeof(stdout)) == -1)
1075 1.4 tsubai return;
1076 1.4 tsubai
1077 1.4 tsubai if ((pkg = OF_instance_to_package(stdin)) == -1)
1078 1.4 tsubai return;
1079 1.1 tsubai
1080 1.18 wiz memset(name, 0, sizeof(name));
1081 1.4 tsubai if (OF_getprop(pkg, "device_type", name, sizeof(name)) == -1)
1082 1.1 tsubai return;
1083 1.1 tsubai
1084 1.4 tsubai if (strcmp(name, "serial") != 0)
1085 1.4 tsubai return;
1086 1.4 tsubai
1087 1.18 wiz memset(name, 0, sizeof(name));
1088 1.4 tsubai if (OF_getprop(pkg, "name", name, sizeof(name)) == -1)
1089 1.1 tsubai return;
1090 1.1 tsubai
1091 1.4 tsubai if (strcmp(name, "ch-b") == 0)
1092 1.4 tsubai unit = 1;
1093 1.4 tsubai
1094 1.21 gehenna cp->cn_dev = makedev(cdevsw_lookup_major(&zstty_cdevsw), unit);
1095 1.4 tsubai cp->cn_pri = CN_REMOTE;
1096 1.1 tsubai }
1097 1.1 tsubai
1098 1.1 tsubai void
1099 1.4 tsubai zscninit(cp)
1100 1.4 tsubai struct consdev *cp;
1101 1.1 tsubai {
1102 1.15 tsubai int escc, escc_ch, obio, zs_offset;
1103 1.15 tsubai int ch = 0;
1104 1.15 tsubai u_int32_t reg[5];
1105 1.4 tsubai char name[16];
1106 1.1 tsubai
1107 1.15 tsubai if ((escc_ch = OF_instance_to_package(stdin)) == -1)
1108 1.1 tsubai return;
1109 1.1 tsubai
1110 1.18 wiz memset(name, 0, sizeof(name));
1111 1.15 tsubai if (OF_getprop(escc_ch, "name", name, sizeof(name)) == -1)
1112 1.1 tsubai return;
1113 1.1 tsubai
1114 1.1 tsubai if (strcmp(name, "ch-b") == 0)
1115 1.15 tsubai ch = 1;
1116 1.15 tsubai
1117 1.15 tsubai if (OF_getprop(escc_ch, "reg", reg, sizeof(reg)) < 4)
1118 1.15 tsubai return;
1119 1.15 tsubai zs_offset = reg[0];
1120 1.15 tsubai
1121 1.15 tsubai escc = OF_parent(escc_ch);
1122 1.15 tsubai obio = OF_parent(escc);
1123 1.15 tsubai
1124 1.15 tsubai if (OF_getprop(obio, "assigned-addresses", reg, sizeof(reg)) < 12)
1125 1.15 tsubai return;
1126 1.15 tsubai zs_conschan = (void *)(reg[2] + zs_offset);
1127 1.1 tsubai
1128 1.15 tsubai zs_hwflags[0][ch] = ZS_HWFLAG_CONSOLE;
1129 1.1 tsubai }
1130