zs.c revision 1.38 1 1.38 tsutsui /* $NetBSD: zs.c,v 1.38 2006/11/02 19:41:34 tsutsui Exp $ */
2 1.1 tsubai
3 1.1 tsubai /*
4 1.7 wrstuden * Copyright (c) 1996, 1998 Bill Studenmund
5 1.1 tsubai * Copyright (c) 1995 Gordon W. Ross
6 1.1 tsubai * All rights reserved.
7 1.1 tsubai *
8 1.1 tsubai * Redistribution and use in source and binary forms, with or without
9 1.1 tsubai * modification, are permitted provided that the following conditions
10 1.1 tsubai * are met:
11 1.1 tsubai * 1. Redistributions of source code must retain the above copyright
12 1.1 tsubai * notice, this list of conditions and the following disclaimer.
13 1.1 tsubai * 2. Redistributions in binary form must reproduce the above copyright
14 1.1 tsubai * notice, this list of conditions and the following disclaimer in the
15 1.1 tsubai * documentation and/or other materials provided with the distribution.
16 1.1 tsubai * 3. The name of the author may not be used to endorse or promote products
17 1.1 tsubai * derived from this software without specific prior written permission.
18 1.1 tsubai * 4. All advertising materials mentioning features or use of this software
19 1.1 tsubai * must display the following acknowledgement:
20 1.1 tsubai * This product includes software developed by Gordon Ross
21 1.1 tsubai *
22 1.1 tsubai * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
23 1.1 tsubai * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
24 1.1 tsubai * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
25 1.1 tsubai * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
26 1.1 tsubai * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
27 1.1 tsubai * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
28 1.1 tsubai * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
29 1.1 tsubai * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
30 1.1 tsubai * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
31 1.1 tsubai * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
32 1.1 tsubai */
33 1.1 tsubai
34 1.1 tsubai /*
35 1.1 tsubai * Zilog Z8530 Dual UART driver (machine-dependent part)
36 1.1 tsubai *
37 1.1 tsubai * Runs two serial lines per chip using slave drivers.
38 1.1 tsubai * Plain tty/async lines use the zs_async slave.
39 1.1 tsubai * Sun keyboard/mouse uses the zs_kbd/zs_ms slaves.
40 1.1 tsubai * Other ports use their own mice & keyboard slaves.
41 1.1 tsubai *
42 1.1 tsubai * Credits & history:
43 1.1 tsubai *
44 1.1 tsubai * With NetBSD 1.1, port-mac68k started using a port of the port-sparc
45 1.1 tsubai * (port-sun3?) zs.c driver (which was in turn based on code in the
46 1.1 tsubai * Berkeley 4.4 Lite release). Bill Studenmund did the port, with
47 1.28 keihan * help from Allen Briggs and Gordon Ross <gwr (at) NetBSD.org>. Noud de
48 1.1 tsubai * Brouwer field-tested the driver at a local ISP.
49 1.1 tsubai *
50 1.1 tsubai * Bill Studenmund and Gordon Ross then ported the machine-independant
51 1.1 tsubai * z8530 driver to work with port-mac68k. NetBSD 1.2 contained an
52 1.1 tsubai * intermediate version (mac68k using a local, patched version of
53 1.1 tsubai * the m.i. drivers), with NetBSD 1.3 containing a full version.
54 1.1 tsubai */
55 1.27 lukem
56 1.27 lukem #include <sys/cdefs.h>
57 1.38 tsutsui __KERNEL_RCSID(0, "$NetBSD: zs.c,v 1.38 2006/11/02 19:41:34 tsutsui Exp $");
58 1.3 jonathan
59 1.3 jonathan #include "opt_ddb.h"
60 1.19 dbj #include "opt_kgdb.h"
61 1.1 tsubai
62 1.1 tsubai #include <sys/param.h>
63 1.1 tsubai #include <sys/systm.h>
64 1.1 tsubai #include <sys/proc.h>
65 1.1 tsubai #include <sys/device.h>
66 1.1 tsubai #include <sys/conf.h>
67 1.1 tsubai #include <sys/file.h>
68 1.1 tsubai #include <sys/ioctl.h>
69 1.1 tsubai #include <sys/tty.h>
70 1.1 tsubai #include <sys/time.h>
71 1.1 tsubai #include <sys/kernel.h>
72 1.1 tsubai #include <sys/syslog.h>
73 1.19 dbj #ifdef KGDB
74 1.19 dbj #include <sys/kgdb.h>
75 1.19 dbj #endif
76 1.1 tsubai
77 1.1 tsubai #include <dev/cons.h>
78 1.1 tsubai #include <dev/ofw/openfirm.h>
79 1.1 tsubai #include <dev/ic/z8530reg.h>
80 1.1 tsubai
81 1.1 tsubai #include <machine/z8530var.h>
82 1.1 tsubai #include <machine/autoconf.h>
83 1.1 tsubai #include <machine/cpu.h>
84 1.1 tsubai #include <machine/pio.h>
85 1.1 tsubai
86 1.1 tsubai /* Are these in a header file anywhere? */
87 1.1 tsubai /* Booter flags interface */
88 1.1 tsubai #define ZSMAC_RAW 0x01
89 1.1 tsubai #define ZSMAC_LOCALTALK 0x02
90 1.11 mycroft
91 1.1 tsubai /*
92 1.1 tsubai * Some warts needed by z8530tty.c -
93 1.1 tsubai */
94 1.1 tsubai int zs_def_cflag = (CREAD | CS8 | HUPCL);
95 1.1 tsubai
96 1.1 tsubai /*
97 1.1 tsubai * abort detection on console will now timeout after iterating on a loop
98 1.1 tsubai * the following # of times. Cheep hack. Also, abort detection is turned
99 1.1 tsubai * off after a timeout (i.e. maybe there's not a terminal hooked up).
100 1.1 tsubai */
101 1.1 tsubai #define ZSABORT_DELAY 3000000
102 1.1 tsubai
103 1.1 tsubai struct zsdevice {
104 1.1 tsubai /* Yes, they are backwards. */
105 1.1 tsubai struct zschan zs_chan_b;
106 1.1 tsubai struct zschan zs_chan_a;
107 1.1 tsubai };
108 1.1 tsubai
109 1.31 chs static int zs_defspeed[2] = {
110 1.31 chs 38400, /* ttyZ0 */
111 1.31 chs 38400, /* ttyZ1 */
112 1.1 tsubai };
113 1.15 tsubai
114 1.1 tsubai /* console stuff */
115 1.1 tsubai void *zs_conschan = 0;
116 1.32 matt int zs_conschannel = -1;
117 1.1 tsubai #ifdef ZS_CONSOLE_ABORT
118 1.1 tsubai int zs_cons_canabort = 1;
119 1.1 tsubai #else
120 1.1 tsubai int zs_cons_canabort = 0;
121 1.1 tsubai #endif /* ZS_CONSOLE_ABORT*/
122 1.1 tsubai
123 1.1 tsubai /* device to which the console is attached--if serial. */
124 1.1 tsubai /* Mac stuff */
125 1.1 tsubai
126 1.30 chs static int zs_get_speed(struct zs_chanstate *);
127 1.1 tsubai
128 1.1 tsubai /*
129 1.1 tsubai * Even though zsparam will set up the clock multiples, etc., we
130 1.1 tsubai * still set them here as: 1) mice & keyboards don't use zsparam,
131 1.1 tsubai * and 2) the console stuff uses these defaults before device
132 1.1 tsubai * attach.
133 1.1 tsubai */
134 1.1 tsubai
135 1.1 tsubai static u_char zs_init_reg[16] = {
136 1.1 tsubai 0, /* 0: CMD (reset, etc.) */
137 1.1 tsubai 0, /* 1: No interrupts yet. */
138 1.1 tsubai 0, /* IVECT */
139 1.1 tsubai ZSWR3_RX_8 | ZSWR3_RX_ENABLE,
140 1.1 tsubai ZSWR4_CLK_X16 | ZSWR4_ONESB | ZSWR4_EVENP,
141 1.1 tsubai ZSWR5_TX_8 | ZSWR5_TX_ENABLE,
142 1.1 tsubai 0, /* 6: TXSYNC/SYNCLO */
143 1.1 tsubai 0, /* 7: RXSYNC/SYNCHI */
144 1.1 tsubai 0, /* 8: alias for data port */
145 1.1 tsubai ZSWR9_MASTER_IE,
146 1.1 tsubai 0, /*10: Misc. TX/RX control bits */
147 1.1 tsubai ZSWR11_TXCLK_BAUD | ZSWR11_RXCLK_BAUD,
148 1.11 mycroft ((PCLK/32)/38400)-2, /*12: BAUDLO (default=38400) */
149 1.11 mycroft 0, /*13: BAUDHI (default=38400) */
150 1.12 wrstuden ZSWR14_BAUD_ENA,
151 1.10 mycroft ZSWR15_BREAK_IE,
152 1.1 tsubai };
153 1.1 tsubai
154 1.1 tsubai /****************************************************************
155 1.1 tsubai * Autoconfig
156 1.1 tsubai ****************************************************************/
157 1.1 tsubai
158 1.1 tsubai /* Definition of the driver for autoconfig. */
159 1.30 chs static int zsc_match(struct device *, struct cfdata *, void *);
160 1.30 chs static void zsc_attach(struct device *, struct device *, void *);
161 1.30 chs static int zsc_print(void *, const char *);
162 1.1 tsubai
163 1.23 thorpej CFATTACH_DECL(zsc, sizeof(struct zsc_softc),
164 1.23 thorpej zsc_match, zsc_attach, NULL, NULL);
165 1.1 tsubai
166 1.1 tsubai extern struct cfdriver zsc_cd;
167 1.1 tsubai
168 1.31 chs int zsc_attached;
169 1.31 chs
170 1.30 chs int zshard(void *);
171 1.30 chs int zssoft(void *);
172 1.1 tsubai #ifdef ZS_TXDMA
173 1.30 chs static int zs_txdma_int(void *);
174 1.1 tsubai #endif
175 1.1 tsubai
176 1.30 chs void zscnprobe(struct consdev *);
177 1.30 chs void zscninit(struct consdev *);
178 1.30 chs int zscngetc(dev_t);
179 1.30 chs void zscnputc(dev_t, int);
180 1.30 chs void zscnpollc(dev_t, int);
181 1.1 tsubai
182 1.1 tsubai /*
183 1.1 tsubai * Is the zs chip present?
184 1.1 tsubai */
185 1.1 tsubai static int
186 1.30 chs zsc_match(struct device *parent, struct cfdata *cf, void *aux)
187 1.1 tsubai {
188 1.1 tsubai struct confargs *ca = aux;
189 1.1 tsubai
190 1.1 tsubai if (strcmp(ca->ca_name, "escc") != 0)
191 1.1 tsubai return 0;
192 1.1 tsubai
193 1.31 chs if (zsc_attached)
194 1.1 tsubai return 0;
195 1.1 tsubai
196 1.1 tsubai return 1;
197 1.1 tsubai }
198 1.1 tsubai
199 1.1 tsubai /*
200 1.1 tsubai * Attach a found zs.
201 1.1 tsubai *
202 1.1 tsubai * Match slave number to zs unit number, so that misconfiguration will
203 1.1 tsubai * not set up the keyboard as ttya, etc.
204 1.1 tsubai */
205 1.1 tsubai static void
206 1.30 chs zsc_attach(struct device *parent, struct device *self, void *aux)
207 1.1 tsubai {
208 1.1 tsubai struct zsc_softc *zsc = (void *)self;
209 1.1 tsubai struct confargs *ca = aux;
210 1.1 tsubai struct zsc_attach_args zsc_args;
211 1.1 tsubai volatile struct zschan *zc;
212 1.1 tsubai struct xzs_chanstate *xcs;
213 1.1 tsubai struct zs_chanstate *cs;
214 1.15 tsubai struct zsdevice *zsd;
215 1.31 chs int channel;
216 1.1 tsubai int s, chip, theflags;
217 1.1 tsubai int node, intr[2][3];
218 1.1 tsubai u_int regs[6];
219 1.1 tsubai
220 1.31 chs zsc_attached = 1;
221 1.31 chs
222 1.15 tsubai chip = 0;
223 1.8 tsubai ca->ca_reg[0] += ca->ca_baseaddr;
224 1.15 tsubai zsd = mapiodev(ca->ca_reg[0], ca->ca_reg[1]);
225 1.8 tsubai
226 1.8 tsubai node = OF_child(ca->ca_node); /* ch-a */
227 1.1 tsubai
228 1.1 tsubai for (channel = 0; channel < 2; channel++) {
229 1.8 tsubai if (OF_getprop(node, "AAPL,interrupts",
230 1.9 tsubai intr[channel], sizeof(intr[0])) == -1 &&
231 1.8 tsubai OF_getprop(node, "interrupts",
232 1.9 tsubai intr[channel], sizeof(intr[0])) == -1) {
233 1.8 tsubai printf(": cannot find interrupt property\n");
234 1.8 tsubai return;
235 1.8 tsubai }
236 1.8 tsubai
237 1.8 tsubai if (OF_getprop(node, "reg", regs, sizeof(regs)) < 24) {
238 1.8 tsubai printf(": cannot find reg property\n");
239 1.8 tsubai return;
240 1.8 tsubai }
241 1.1 tsubai regs[2] += ca->ca_baseaddr;
242 1.1 tsubai regs[4] += ca->ca_baseaddr;
243 1.1 tsubai #ifdef ZS_TXDMA
244 1.1 tsubai zsc->zsc_txdmareg[channel] = mapiodev(regs[2], regs[3]);
245 1.1 tsubai zsc->zsc_txdmacmd[channel] =
246 1.1 tsubai dbdma_alloc(sizeof(dbdma_command_t) * 3);
247 1.18 wiz memset(zsc->zsc_txdmacmd[channel], 0,
248 1.18 wiz sizeof(dbdma_command_t) * 3);
249 1.1 tsubai dbdma_reset(zsc->zsc_txdmareg[channel]);
250 1.1 tsubai #endif
251 1.1 tsubai node = OF_peer(node); /* ch-b */
252 1.1 tsubai }
253 1.1 tsubai
254 1.1 tsubai printf(": irq %d,%d\n", intr[0][0], intr[1][0]);
255 1.1 tsubai
256 1.1 tsubai /*
257 1.1 tsubai * Initialize software state for each channel.
258 1.1 tsubai */
259 1.1 tsubai for (channel = 0; channel < 2; channel++) {
260 1.1 tsubai zsc_args.channel = channel;
261 1.31 chs zsc_args.hwflags = (channel == zs_conschannel ?
262 1.31 chs ZS_HWFLAG_CONSOLE : 0);
263 1.1 tsubai xcs = &zsc->xzsc_xcs_store[channel];
264 1.1 tsubai cs = &xcs->xzs_cs;
265 1.1 tsubai zsc->zsc_cs[channel] = cs;
266 1.1 tsubai
267 1.25 pk simple_lock_init(&cs->cs_lock);
268 1.1 tsubai cs->cs_channel = channel;
269 1.1 tsubai cs->cs_private = NULL;
270 1.1 tsubai cs->cs_ops = &zsops_null;
271 1.1 tsubai
272 1.15 tsubai zc = (channel == 0) ? &zsd->zs_chan_a : &zsd->zs_chan_b;
273 1.15 tsubai
274 1.1 tsubai cs->cs_reg_csr = &zc->zc_csr;
275 1.1 tsubai cs->cs_reg_data = &zc->zc_data;
276 1.1 tsubai
277 1.18 wiz memcpy(cs->cs_creg, zs_init_reg, 16);
278 1.18 wiz memcpy(cs->cs_preg, zs_init_reg, 16);
279 1.1 tsubai
280 1.1 tsubai /* Current BAUD rate generator clock. */
281 1.11 mycroft cs->cs_brg_clk = PCLK / 16; /* RTxC is 230400*16, so use 230400 */
282 1.13 tsubai if (zsc_args.hwflags & ZS_HWFLAG_CONSOLE)
283 1.13 tsubai cs->cs_defspeed = zs_get_speed(cs);
284 1.13 tsubai else
285 1.31 chs cs->cs_defspeed = zs_defspeed[channel];
286 1.1 tsubai cs->cs_defcflag = zs_def_cflag;
287 1.1 tsubai
288 1.1 tsubai /* Make these correspond to cs_defcflag (-crtscts) */
289 1.1 tsubai cs->cs_rr0_dcd = ZSRR0_DCD;
290 1.1 tsubai cs->cs_rr0_cts = 0;
291 1.1 tsubai cs->cs_wr5_dtr = ZSWR5_DTR;
292 1.1 tsubai cs->cs_wr5_rts = 0;
293 1.1 tsubai
294 1.1 tsubai #ifdef __notyet__
295 1.1 tsubai cs->cs_slave_type = ZS_SLAVE_NONE;
296 1.1 tsubai #endif
297 1.1 tsubai
298 1.1 tsubai /* Define BAUD rate stuff. */
299 1.11 mycroft xcs->cs_clocks[0].clk = PCLK;
300 1.7 wrstuden xcs->cs_clocks[0].flags = ZSC_RTXBRG | ZSC_RTXDIV;
301 1.1 tsubai xcs->cs_clocks[1].flags =
302 1.1 tsubai ZSC_RTXBRG | ZSC_RTXDIV | ZSC_VARIABLE | ZSC_EXTERN;
303 1.1 tsubai xcs->cs_clocks[2].flags = ZSC_TRXDIV | ZSC_VARIABLE;
304 1.1 tsubai xcs->cs_clock_count = 3;
305 1.1 tsubai if (channel == 0) {
306 1.1 tsubai theflags = 0; /*mac68k_machine.modem_flags;*/
307 1.6 tsubai /*xcs->cs_clocks[1].clk = mac68k_machine.modem_dcd_clk;*/
308 1.6 tsubai /*xcs->cs_clocks[2].clk = mac68k_machine.modem_cts_clk;*/
309 1.6 tsubai xcs->cs_clocks[1].clk = 0;
310 1.1 tsubai xcs->cs_clocks[2].clk = 0;
311 1.1 tsubai } else {
312 1.1 tsubai theflags = 0; /*mac68k_machine.print_flags;*/
313 1.1 tsubai xcs->cs_clocks[1].flags = ZSC_VARIABLE;
314 1.1 tsubai /*
315 1.1 tsubai * Yes, we aren't defining ANY clock source enables for the
316 1.1 tsubai * printer's DCD clock in. The hardware won't let us
317 1.1 tsubai * use it. But a clock will freak out the chip, so we
318 1.1 tsubai * let you set it, telling us to bar interrupts on the line.
319 1.1 tsubai */
320 1.6 tsubai /*xcs->cs_clocks[1].clk = mac68k_machine.print_dcd_clk;*/
321 1.6 tsubai /*xcs->cs_clocks[2].clk = mac68k_machine.print_cts_clk;*/
322 1.6 tsubai xcs->cs_clocks[1].clk = 0;
323 1.1 tsubai xcs->cs_clocks[2].clk = 0;
324 1.1 tsubai }
325 1.1 tsubai if (xcs->cs_clocks[1].clk)
326 1.1 tsubai zsc_args.hwflags |= ZS_HWFLAG_NO_DCD;
327 1.1 tsubai if (xcs->cs_clocks[2].clk)
328 1.1 tsubai zsc_args.hwflags |= ZS_HWFLAG_NO_CTS;
329 1.1 tsubai
330 1.1 tsubai /* Set defaults in our "extended" chanstate. */
331 1.1 tsubai xcs->cs_csource = 0;
332 1.1 tsubai xcs->cs_psource = 0;
333 1.1 tsubai xcs->cs_cclk_flag = 0; /* Nothing fancy by default */
334 1.1 tsubai xcs->cs_pclk_flag = 0;
335 1.1 tsubai
336 1.1 tsubai if (theflags & ZSMAC_RAW) {
337 1.1 tsubai zsc_args.hwflags |= ZS_HWFLAG_RAW;
338 1.1 tsubai printf(" (raw defaults)");
339 1.1 tsubai }
340 1.1 tsubai
341 1.1 tsubai /*
342 1.1 tsubai * XXX - This might be better done with a "stub" driver
343 1.1 tsubai * (to replace zstty) that ignores LocalTalk for now.
344 1.1 tsubai */
345 1.1 tsubai if (theflags & ZSMAC_LOCALTALK) {
346 1.1 tsubai printf(" shielding from LocalTalk");
347 1.1 tsubai cs->cs_defspeed = 1;
348 1.1 tsubai cs->cs_creg[ZSRR_BAUDLO] = cs->cs_preg[ZSRR_BAUDLO] = 0xff;
349 1.1 tsubai cs->cs_creg[ZSRR_BAUDHI] = cs->cs_preg[ZSRR_BAUDHI] = 0xff;
350 1.1 tsubai zs_write_reg(cs, ZSRR_BAUDLO, 0xff);
351 1.1 tsubai zs_write_reg(cs, ZSRR_BAUDHI, 0xff);
352 1.1 tsubai /*
353 1.1 tsubai * If we might have LocalTalk, then make sure we have the
354 1.1 tsubai * Baud rate low-enough to not do any damage.
355 1.1 tsubai */
356 1.1 tsubai }
357 1.1 tsubai
358 1.1 tsubai /*
359 1.1 tsubai * We used to disable chip interrupts here, but we now
360 1.1 tsubai * do that in zscnprobe, just in case MacOS left the chip on.
361 1.1 tsubai */
362 1.1 tsubai
363 1.1 tsubai xcs->cs_chip = chip;
364 1.1 tsubai
365 1.1 tsubai /* Stash away a copy of the final H/W flags. */
366 1.1 tsubai xcs->cs_hwflags = zsc_args.hwflags;
367 1.1 tsubai
368 1.1 tsubai /*
369 1.1 tsubai * Look for a child driver for this channel.
370 1.1 tsubai * The child attach will setup the hardware.
371 1.1 tsubai */
372 1.1 tsubai if (!config_found(self, (void *)&zsc_args, zsc_print)) {
373 1.1 tsubai /* No sub-driver. Just reset it. */
374 1.1 tsubai u_char reset = (channel == 0) ?
375 1.1 tsubai ZSWR9_A_RESET : ZSWR9_B_RESET;
376 1.1 tsubai s = splzs();
377 1.1 tsubai zs_write_reg(cs, 9, reset);
378 1.1 tsubai splx(s);
379 1.1 tsubai }
380 1.1 tsubai }
381 1.1 tsubai
382 1.1 tsubai /* XXX - Now safe to install interrupt handlers. */
383 1.1 tsubai intr_establish(intr[0][0], IST_LEVEL, IPL_TTY, zshard, NULL);
384 1.1 tsubai intr_establish(intr[1][0], IST_LEVEL, IPL_TTY, zshard, NULL);
385 1.1 tsubai #ifdef ZS_TXDMA
386 1.1 tsubai intr_establish(intr[0][1], IST_LEVEL, IPL_TTY, zs_txdma_int, (void *)0);
387 1.1 tsubai intr_establish(intr[1][1], IST_LEVEL, IPL_TTY, zs_txdma_int, (void *)1);
388 1.1 tsubai #endif
389 1.1 tsubai
390 1.29 matt zsc->zsc_si = softintr_establish(IPL_SOFTSERIAL,
391 1.29 matt (void (*)(void *)) zsc_intr_soft, zsc);
392 1.29 matt
393 1.1 tsubai /*
394 1.1 tsubai * Set the master interrupt enable and interrupt vector.
395 1.1 tsubai * (common to both channels, do it on A)
396 1.1 tsubai */
397 1.1 tsubai cs = zsc->zsc_cs[0];
398 1.1 tsubai s = splzs();
399 1.1 tsubai /* interrupt vector */
400 1.1 tsubai zs_write_reg(cs, 2, zs_init_reg[2]);
401 1.1 tsubai /* master interrupt control (enable) */
402 1.1 tsubai zs_write_reg(cs, 9, zs_init_reg[9]);
403 1.1 tsubai splx(s);
404 1.1 tsubai }
405 1.1 tsubai
406 1.1 tsubai static int
407 1.30 chs zsc_print(void *aux, const char *name)
408 1.1 tsubai {
409 1.1 tsubai struct zsc_attach_args *args = aux;
410 1.1 tsubai
411 1.1 tsubai if (name != NULL)
412 1.24 thorpej aprint_normal("%s: ", name);
413 1.1 tsubai
414 1.1 tsubai if (args->channel != -1)
415 1.24 thorpej aprint_normal(" channel %d", args->channel);
416 1.1 tsubai
417 1.1 tsubai return UNCONF;
418 1.6 tsubai }
419 1.6 tsubai
420 1.6 tsubai int
421 1.30 chs zsmdioctl(struct zs_chanstate *cs, u_long cmd, caddr_t data)
422 1.6 tsubai {
423 1.6 tsubai switch (cmd) {
424 1.6 tsubai default:
425 1.20 atatat return (EPASSTHROUGH);
426 1.6 tsubai }
427 1.6 tsubai return (0);
428 1.6 tsubai }
429 1.6 tsubai
430 1.6 tsubai void
431 1.30 chs zsmd_setclock(struct zs_chanstate *cs)
432 1.6 tsubai {
433 1.16 matt #ifdef NOTYET
434 1.6 tsubai struct xzs_chanstate *xcs = (void *)cs;
435 1.6 tsubai
436 1.6 tsubai if (cs->cs_channel != 0)
437 1.6 tsubai return;
438 1.6 tsubai
439 1.6 tsubai /*
440 1.6 tsubai * If the new clock has the external bit set, then select the
441 1.6 tsubai * external source.
442 1.6 tsubai */
443 1.16 matt via_set_modem((xcs->cs_pclk_flag & ZSC_EXTERN) ? 1 : 0);
444 1.16 matt #endif
445 1.1 tsubai }
446 1.1 tsubai
447 1.1 tsubai /*
448 1.1 tsubai * Our ZS chips all share a common, autovectored interrupt,
449 1.1 tsubai * so we have to look at all of them on each interrupt.
450 1.1 tsubai */
451 1.1 tsubai int
452 1.30 chs zshard(void *arg)
453 1.1 tsubai {
454 1.30 chs struct zsc_softc *zsc;
455 1.30 chs int unit, rval;
456 1.1 tsubai
457 1.1 tsubai rval = 0;
458 1.1 tsubai for (unit = 0; unit < zsc_cd.cd_ndevs; unit++) {
459 1.1 tsubai zsc = zsc_cd.cd_devs[unit];
460 1.1 tsubai if (zsc == NULL)
461 1.1 tsubai continue;
462 1.1 tsubai rval |= zsc_intr_hard(zsc);
463 1.1 tsubai if ((zsc->zsc_cs[0]->cs_softreq) ||
464 1.38 tsutsui (zsc->zsc_cs[1]->cs_softreq))
465 1.29 matt softintr_schedule(zsc->zsc_si);
466 1.1 tsubai }
467 1.1 tsubai return (rval);
468 1.1 tsubai }
469 1.1 tsubai
470 1.1 tsubai #ifdef ZS_TXDMA
471 1.1 tsubai int
472 1.30 chs zs_txdma_int(void *arg)
473 1.1 tsubai {
474 1.1 tsubai int ch = (int)arg;
475 1.1 tsubai struct zsc_softc *zsc;
476 1.1 tsubai struct zs_chanstate *cs;
477 1.1 tsubai int unit = 0; /* XXX */
478 1.1 tsubai
479 1.1 tsubai zsc = zsc_cd.cd_devs[unit];
480 1.1 tsubai if (zsc == NULL)
481 1.1 tsubai panic("zs_txdma_int");
482 1.1 tsubai
483 1.1 tsubai cs = zsc->zsc_cs[ch];
484 1.1 tsubai zstty_txdma_int(cs);
485 1.1 tsubai
486 1.38 tsutsui if (cs->cs_softreq)
487 1.29 matt softintr_schedule(zsc->zsc_si);
488 1.38 tsutsui
489 1.1 tsubai return 1;
490 1.1 tsubai }
491 1.1 tsubai
492 1.1 tsubai void
493 1.30 chs zs_dma_setup(struct zs_chanstate *cs, caddr_t pa, int len)
494 1.1 tsubai {
495 1.1 tsubai struct zsc_softc *zsc;
496 1.1 tsubai dbdma_command_t *cmdp;
497 1.1 tsubai int ch = cs->cs_channel;
498 1.1 tsubai
499 1.1 tsubai zsc = zsc_cd.cd_devs[ch];
500 1.1 tsubai cmdp = zsc->zsc_txdmacmd[ch];
501 1.1 tsubai
502 1.1 tsubai DBDMA_BUILD(cmdp, DBDMA_CMD_OUT_LAST, 0, len, kvtop(pa),
503 1.1 tsubai DBDMA_INT_ALWAYS, DBDMA_WAIT_NEVER, DBDMA_BRANCH_NEVER);
504 1.1 tsubai cmdp++;
505 1.1 tsubai DBDMA_BUILD(cmdp, DBDMA_CMD_STOP, 0, 0, 0,
506 1.1 tsubai DBDMA_INT_NEVER, DBDMA_WAIT_NEVER, DBDMA_BRANCH_NEVER);
507 1.1 tsubai
508 1.35 perry __asm volatile("eieio");
509 1.1 tsubai
510 1.1 tsubai dbdma_start(zsc->zsc_txdmareg[ch], zsc->zsc_txdmacmd[ch]);
511 1.1 tsubai }
512 1.1 tsubai #endif
513 1.1 tsubai
514 1.1 tsubai /*
515 1.13 tsubai * Compute the current baud rate given a ZS channel.
516 1.13 tsubai * XXX Assume internal BRG.
517 1.1 tsubai */
518 1.1 tsubai int
519 1.30 chs zs_get_speed(struct zs_chanstate *cs)
520 1.1 tsubai {
521 1.13 tsubai int tconst;
522 1.1 tsubai
523 1.13 tsubai tconst = zs_read_reg(cs, 12);
524 1.13 tsubai tconst |= zs_read_reg(cs, 13) << 8;
525 1.13 tsubai return TCONST_TO_BPS(cs->cs_brg_clk, tconst);
526 1.1 tsubai }
527 1.13 tsubai
528 1.13 tsubai #ifndef ZS_TOLERANCE
529 1.13 tsubai #define ZS_TOLERANCE 51
530 1.13 tsubai /* 5% in tenths of a %, plus 1 so that exactly 5% will be ok. */
531 1.13 tsubai #endif
532 1.1 tsubai
533 1.1 tsubai /*
534 1.1 tsubai * Search through the signal sources in the channel, and
535 1.1 tsubai * pick the best one for the baud rate requested. Return
536 1.1 tsubai * a -1 if not achievable in tolerance. Otherwise return 0
537 1.1 tsubai * and fill in the values.
538 1.1 tsubai *
539 1.1 tsubai * This routine draws inspiration from the Atari port's zs.c
540 1.1 tsubai * driver in NetBSD 1.1 which did the same type of source switching.
541 1.1 tsubai * Tolerance code inspired by comspeed routine in isa/com.c.
542 1.1 tsubai *
543 1.1 tsubai * By Bill Studenmund, 1996-05-12
544 1.1 tsubai */
545 1.1 tsubai int
546 1.30 chs zs_set_speed(struct zs_chanstate *cs, int bps)
547 1.1 tsubai {
548 1.1 tsubai struct xzs_chanstate *xcs = (void *) cs;
549 1.1 tsubai int i, tc, tc0 = 0, tc1, s, sf = 0;
550 1.1 tsubai int src, rate0, rate1, err, tol;
551 1.1 tsubai
552 1.1 tsubai if (bps == 0)
553 1.1 tsubai return (0);
554 1.1 tsubai
555 1.1 tsubai src = -1; /* no valid source yet */
556 1.1 tsubai tol = ZS_TOLERANCE;
557 1.1 tsubai
558 1.1 tsubai /*
559 1.1 tsubai * Step through all the sources and see which one matches
560 1.1 tsubai * the best. A source has to match BETTER than tol to be chosen.
561 1.1 tsubai * Thus if two sources give the same error, the first one will be
562 1.1 tsubai * chosen. Also, allow for the possability that one source might run
563 1.1 tsubai * both the BRG and the direct divider (i.e. RTxC).
564 1.1 tsubai */
565 1.1 tsubai for (i = 0; i < xcs->cs_clock_count; i++) {
566 1.1 tsubai if (xcs->cs_clocks[i].clk <= 0)
567 1.17 wiz continue; /* skip non-existent or bad clocks */
568 1.1 tsubai if (xcs->cs_clocks[i].flags & ZSC_BRG) {
569 1.1 tsubai /* check out BRG at /16 */
570 1.1 tsubai tc1 = BPS_TO_TCONST(xcs->cs_clocks[i].clk >> 4, bps);
571 1.1 tsubai if (tc1 >= 0) {
572 1.1 tsubai rate1 = TCONST_TO_BPS(xcs->cs_clocks[i].clk >> 4, tc1);
573 1.1 tsubai err = abs(((rate1 - bps)*1000)/bps);
574 1.1 tsubai if (err < tol) {
575 1.1 tsubai tol = err;
576 1.1 tsubai src = i;
577 1.1 tsubai sf = xcs->cs_clocks[i].flags & ~ZSC_DIV;
578 1.1 tsubai tc0 = tc1;
579 1.1 tsubai rate0 = rate1;
580 1.1 tsubai }
581 1.1 tsubai }
582 1.1 tsubai }
583 1.1 tsubai if (xcs->cs_clocks[i].flags & ZSC_DIV) {
584 1.1 tsubai /*
585 1.1 tsubai * Check out either /1, /16, /32, or /64
586 1.1 tsubai * Note: for /1, you'd better be using a synchronized
587 1.1 tsubai * clock!
588 1.1 tsubai */
589 1.1 tsubai int b0 = xcs->cs_clocks[i].clk, e0 = abs(b0-bps);
590 1.1 tsubai int b1 = b0 >> 4, e1 = abs(b1-bps);
591 1.1 tsubai int b2 = b1 >> 1, e2 = abs(b2-bps);
592 1.1 tsubai int b3 = b2 >> 1, e3 = abs(b3-bps);
593 1.1 tsubai
594 1.1 tsubai if (e0 < e1 && e0 < e2 && e0 < e3) {
595 1.1 tsubai err = e0;
596 1.1 tsubai rate1 = b0;
597 1.1 tsubai tc1 = ZSWR4_CLK_X1;
598 1.1 tsubai } else if (e0 > e1 && e1 < e2 && e1 < e3) {
599 1.1 tsubai err = e1;
600 1.1 tsubai rate1 = b1;
601 1.1 tsubai tc1 = ZSWR4_CLK_X16;
602 1.1 tsubai } else if (e0 > e2 && e1 > e2 && e2 < e3) {
603 1.1 tsubai err = e2;
604 1.1 tsubai rate1 = b2;
605 1.1 tsubai tc1 = ZSWR4_CLK_X32;
606 1.1 tsubai } else {
607 1.1 tsubai err = e3;
608 1.1 tsubai rate1 = b3;
609 1.1 tsubai tc1 = ZSWR4_CLK_X64;
610 1.1 tsubai }
611 1.1 tsubai
612 1.1 tsubai err = (err * 1000)/bps;
613 1.1 tsubai if (err < tol) {
614 1.1 tsubai tol = err;
615 1.1 tsubai src = i;
616 1.1 tsubai sf = xcs->cs_clocks[i].flags & ~ZSC_BRG;
617 1.1 tsubai tc0 = tc1;
618 1.1 tsubai rate0 = rate1;
619 1.1 tsubai }
620 1.1 tsubai }
621 1.1 tsubai }
622 1.1 tsubai #ifdef ZSMACDEBUG
623 1.1 tsubai zsprintf("Checking for rate %d. Found source #%d.\n",bps, src);
624 1.1 tsubai #endif
625 1.1 tsubai if (src == -1)
626 1.1 tsubai return (EINVAL); /* no can do */
627 1.1 tsubai
628 1.1 tsubai /*
629 1.1 tsubai * The M.I. layer likes to keep cs_brg_clk current, even though
630 1.1 tsubai * we are the only ones who should be touching the BRG's rate.
631 1.1 tsubai *
632 1.1 tsubai * Note: we are assuming that any ZSC_EXTERN signal source comes in
633 1.1 tsubai * on the RTxC pin. Correct for the mac68k obio zsc.
634 1.1 tsubai */
635 1.1 tsubai if (sf & ZSC_EXTERN)
636 1.1 tsubai cs->cs_brg_clk = xcs->cs_clocks[i].clk >> 4;
637 1.1 tsubai else
638 1.11 mycroft cs->cs_brg_clk = PCLK / 16;
639 1.1 tsubai
640 1.1 tsubai /*
641 1.1 tsubai * Now we have a source, so set it up.
642 1.1 tsubai */
643 1.1 tsubai s = splzs();
644 1.1 tsubai xcs->cs_psource = src;
645 1.1 tsubai xcs->cs_pclk_flag = sf;
646 1.1 tsubai bps = rate0;
647 1.1 tsubai if (sf & ZSC_BRG) {
648 1.1 tsubai cs->cs_preg[4] = ZSWR4_CLK_X16;
649 1.1 tsubai cs->cs_preg[11]= ZSWR11_RXCLK_BAUD | ZSWR11_TXCLK_BAUD;
650 1.1 tsubai if (sf & ZSC_PCLK) {
651 1.1 tsubai cs->cs_preg[14] = ZSWR14_BAUD_ENA | ZSWR14_BAUD_FROM_PCLK;
652 1.1 tsubai } else {
653 1.1 tsubai cs->cs_preg[14] = ZSWR14_BAUD_ENA;
654 1.1 tsubai }
655 1.1 tsubai tc = tc0;
656 1.1 tsubai } else {
657 1.1 tsubai cs->cs_preg[4] = tc0;
658 1.1 tsubai if (sf & ZSC_RTXDIV) {
659 1.1 tsubai cs->cs_preg[11] = ZSWR11_RXCLK_RTXC | ZSWR11_TXCLK_RTXC;
660 1.1 tsubai } else {
661 1.1 tsubai cs->cs_preg[11] = ZSWR11_RXCLK_TRXC | ZSWR11_TXCLK_TRXC;
662 1.1 tsubai }
663 1.1 tsubai cs->cs_preg[14]= 0;
664 1.1 tsubai tc = 0xffff;
665 1.1 tsubai }
666 1.1 tsubai /* Set the BAUD rate divisor. */
667 1.1 tsubai cs->cs_preg[12] = tc;
668 1.1 tsubai cs->cs_preg[13] = tc >> 8;
669 1.1 tsubai splx(s);
670 1.1 tsubai
671 1.1 tsubai #ifdef ZSMACDEBUG
672 1.1 tsubai zsprintf("Rate is %7d, tc is %7d, source no. %2d, flags %4x\n", \
673 1.1 tsubai bps, tc, src, sf);
674 1.1 tsubai zsprintf("Registers are: 4 %x, 11 %x, 14 %x\n\n",
675 1.1 tsubai cs->cs_preg[4], cs->cs_preg[11], cs->cs_preg[14]);
676 1.1 tsubai #endif
677 1.1 tsubai
678 1.1 tsubai cs->cs_preg[5] |= ZSWR5_RTS; /* Make sure the drivers are on! */
679 1.1 tsubai
680 1.1 tsubai /* Caller will stuff the pending registers. */
681 1.1 tsubai return (0);
682 1.1 tsubai }
683 1.1 tsubai
684 1.1 tsubai int
685 1.30 chs zs_set_modes(struct zs_chanstate *cs, int cflag)
686 1.1 tsubai {
687 1.1 tsubai struct xzs_chanstate *xcs = (void*)cs;
688 1.1 tsubai int s;
689 1.1 tsubai
690 1.1 tsubai /*
691 1.1 tsubai * Make sure we don't enable hfc on a signal line we're ignoring.
692 1.1 tsubai * As we enable CTS interrupts only if we have CRTSCTS or CDTRCTS,
693 1.1 tsubai * this code also effectivly turns off ZSWR15_CTS_IE.
694 1.1 tsubai *
695 1.1 tsubai * Also, disable DCD interrupts if we've been told to ignore
696 1.1 tsubai * the DCD pin. Happens on mac68k because the input line for
697 1.1 tsubai * DCD can also be used as a clock input. (Just set CLOCAL.)
698 1.1 tsubai *
699 1.1 tsubai * If someone tries to turn an invalid flow mode on, Just Say No
700 1.1 tsubai * (Suggested by gwr)
701 1.1 tsubai */
702 1.1 tsubai if ((cflag & CDTRCTS) && (cflag & (CRTSCTS | MDMBUF)))
703 1.1 tsubai return (EINVAL);
704 1.1 tsubai if (xcs->cs_hwflags & ZS_HWFLAG_NO_DCD) {
705 1.1 tsubai if (cflag & MDMBUF)
706 1.1 tsubai return (EINVAL);
707 1.1 tsubai cflag |= CLOCAL;
708 1.1 tsubai }
709 1.1 tsubai if ((xcs->cs_hwflags & ZS_HWFLAG_NO_CTS) && (cflag & (CRTSCTS | CDTRCTS)))
710 1.1 tsubai return (EINVAL);
711 1.1 tsubai
712 1.1 tsubai /*
713 1.1 tsubai * Output hardware flow control on the chip is horrendous:
714 1.1 tsubai * if carrier detect drops, the receiver is disabled, and if
715 1.1 tsubai * CTS drops, the transmitter is stoped IN MID CHARACTER!
716 1.1 tsubai * Therefore, NEVER set the HFC bit, and instead use the
717 1.1 tsubai * status interrupt to detect CTS changes.
718 1.1 tsubai */
719 1.1 tsubai s = splzs();
720 1.1 tsubai if ((cflag & (CLOCAL | MDMBUF)) != 0)
721 1.1 tsubai cs->cs_rr0_dcd = 0;
722 1.1 tsubai else
723 1.1 tsubai cs->cs_rr0_dcd = ZSRR0_DCD;
724 1.1 tsubai /*
725 1.1 tsubai * The mac hardware only has one output, DTR (HSKo in Mac
726 1.1 tsubai * parlance). In HFC mode, we use it for the functions
727 1.1 tsubai * typically served by RTS and DTR on other ports, so we
728 1.1 tsubai * have to fake the upper layer out some.
729 1.1 tsubai *
730 1.1 tsubai * CRTSCTS we use CTS as an input which tells us when to shut up.
731 1.1 tsubai * We make no effort to shut up the other side of the connection.
732 1.1 tsubai * DTR is used to hang up the modem.
733 1.1 tsubai *
734 1.1 tsubai * In CDTRCTS, we use CTS to tell us to stop, but we use DTR to
735 1.1 tsubai * shut up the other side.
736 1.1 tsubai */
737 1.1 tsubai if ((cflag & CRTSCTS) != 0) {
738 1.1 tsubai cs->cs_wr5_dtr = ZSWR5_DTR;
739 1.1 tsubai cs->cs_wr5_rts = 0;
740 1.1 tsubai cs->cs_rr0_cts = ZSRR0_CTS;
741 1.1 tsubai } else if ((cflag & CDTRCTS) != 0) {
742 1.1 tsubai cs->cs_wr5_dtr = 0;
743 1.1 tsubai cs->cs_wr5_rts = ZSWR5_DTR;
744 1.1 tsubai cs->cs_rr0_cts = ZSRR0_CTS;
745 1.1 tsubai } else if ((cflag & MDMBUF) != 0) {
746 1.1 tsubai cs->cs_wr5_dtr = 0;
747 1.1 tsubai cs->cs_wr5_rts = ZSWR5_DTR;
748 1.1 tsubai cs->cs_rr0_cts = ZSRR0_DCD;
749 1.1 tsubai } else {
750 1.1 tsubai cs->cs_wr5_dtr = ZSWR5_DTR;
751 1.1 tsubai cs->cs_wr5_rts = 0;
752 1.1 tsubai cs->cs_rr0_cts = 0;
753 1.1 tsubai }
754 1.1 tsubai splx(s);
755 1.1 tsubai
756 1.1 tsubai /* Caller will stuff the pending registers. */
757 1.1 tsubai return (0);
758 1.1 tsubai }
759 1.1 tsubai
760 1.1 tsubai
761 1.1 tsubai /*
762 1.1 tsubai * Read or write the chip with suitable delays.
763 1.1 tsubai * MacII hardware has the delay built in.
764 1.1 tsubai * No need for extra delay. :-) However, some clock-chirped
765 1.1 tsubai * macs, or zsc's on serial add-on boards might need it.
766 1.1 tsubai */
767 1.1 tsubai #define ZS_DELAY()
768 1.1 tsubai
769 1.1 tsubai u_char
770 1.30 chs zs_read_reg(struct zs_chanstate *cs, u_char reg)
771 1.1 tsubai {
772 1.1 tsubai u_char val;
773 1.1 tsubai
774 1.1 tsubai out8(cs->cs_reg_csr, reg);
775 1.1 tsubai ZS_DELAY();
776 1.1 tsubai val = in8(cs->cs_reg_csr);
777 1.1 tsubai ZS_DELAY();
778 1.1 tsubai return val;
779 1.1 tsubai }
780 1.1 tsubai
781 1.1 tsubai void
782 1.30 chs zs_write_reg(struct zs_chanstate *cs, u_char reg, u_char val)
783 1.1 tsubai {
784 1.1 tsubai out8(cs->cs_reg_csr, reg);
785 1.1 tsubai ZS_DELAY();
786 1.1 tsubai out8(cs->cs_reg_csr, val);
787 1.1 tsubai ZS_DELAY();
788 1.1 tsubai }
789 1.1 tsubai
790 1.30 chs u_char
791 1.30 chs zs_read_csr(struct zs_chanstate *cs)
792 1.1 tsubai {
793 1.30 chs u_char val;
794 1.1 tsubai
795 1.1 tsubai val = in8(cs->cs_reg_csr);
796 1.1 tsubai ZS_DELAY();
797 1.1 tsubai /* make up for the fact CTS is wired backwards */
798 1.1 tsubai val ^= ZSRR0_CTS;
799 1.1 tsubai return val;
800 1.1 tsubai }
801 1.1 tsubai
802 1.30 chs void
803 1.30 chs zs_write_csr(struct zs_chanstate *cs, u_char val)
804 1.1 tsubai {
805 1.1 tsubai /* Note, the csr does not write CTS... */
806 1.1 tsubai out8(cs->cs_reg_csr, val);
807 1.1 tsubai ZS_DELAY();
808 1.1 tsubai }
809 1.1 tsubai
810 1.30 chs u_char
811 1.30 chs zs_read_data(struct zs_chanstate *cs)
812 1.1 tsubai {
813 1.30 chs u_char val;
814 1.1 tsubai
815 1.1 tsubai val = in8(cs->cs_reg_data);
816 1.1 tsubai ZS_DELAY();
817 1.1 tsubai return val;
818 1.1 tsubai }
819 1.1 tsubai
820 1.30 chs void
821 1.30 chs zs_write_data(struct zs_chanstate *cs, u_char val)
822 1.1 tsubai {
823 1.1 tsubai out8(cs->cs_reg_data, val);
824 1.1 tsubai ZS_DELAY();
825 1.1 tsubai }
826 1.1 tsubai
827 1.1 tsubai /****************************************************************
828 1.1 tsubai * Console support functions (powermac specific!)
829 1.1 tsubai * Note: this code is allowed to know about the layout of
830 1.1 tsubai * the chip registers, and uses that to keep things simple.
831 1.1 tsubai * XXX - I think I like the mvme167 code better. -gwr
832 1.1 tsubai * XXX - Well :-P :-) -wrs
833 1.1 tsubai ****************************************************************/
834 1.1 tsubai
835 1.1 tsubai #define zscnpollc nullcnpollc
836 1.1 tsubai cons_decl(zs);
837 1.1 tsubai
838 1.4 tsubai static int stdin, stdout;
839 1.4 tsubai
840 1.1 tsubai /*
841 1.1 tsubai * Console functions.
842 1.1 tsubai */
843 1.1 tsubai
844 1.1 tsubai /*
845 1.1 tsubai * zscnprobe is the routine which gets called as the kernel is trying to
846 1.1 tsubai * figure out where the console should be. Each io driver which might
847 1.1 tsubai * be the console (as defined in mac68k/conf.c) gets probed. The probe
848 1.1 tsubai * fills in the consdev structure. Important parts are the device #,
849 1.1 tsubai * and the console priority. Values are CN_DEAD (don't touch me),
850 1.1 tsubai * CN_NORMAL (I'm here, but elsewhere might be better), CN_INTERNAL
851 1.1 tsubai * (the video, better than CN_NORMAL), and CN_REMOTE (pick me!)
852 1.1 tsubai *
853 1.1 tsubai * As the mac's a bit different, we do extra work here. We mainly check
854 1.1 tsubai * to see if we have serial echo going on. Also chould check for default
855 1.1 tsubai * speeds.
856 1.1 tsubai */
857 1.1 tsubai
858 1.1 tsubai /*
859 1.1 tsubai * Polled input char.
860 1.1 tsubai */
861 1.1 tsubai int
862 1.30 chs zs_getc(void *v)
863 1.1 tsubai {
864 1.30 chs volatile struct zschan *zc = v;
865 1.30 chs int s, c, rr0;
866 1.1 tsubai
867 1.1 tsubai s = splhigh();
868 1.1 tsubai /* Wait for a character to arrive. */
869 1.1 tsubai do {
870 1.1 tsubai rr0 = in8(&zc->zc_csr);
871 1.1 tsubai ZS_DELAY();
872 1.1 tsubai } while ((rr0 & ZSRR0_RX_READY) == 0);
873 1.1 tsubai
874 1.1 tsubai c = in8(&zc->zc_data);
875 1.1 tsubai ZS_DELAY();
876 1.1 tsubai splx(s);
877 1.1 tsubai
878 1.1 tsubai /*
879 1.1 tsubai * This is used by the kd driver to read scan codes,
880 1.1 tsubai * so don't translate '\r' ==> '\n' here...
881 1.1 tsubai */
882 1.1 tsubai return (c);
883 1.1 tsubai }
884 1.1 tsubai
885 1.1 tsubai /*
886 1.1 tsubai * Polled output char.
887 1.1 tsubai */
888 1.1 tsubai void
889 1.30 chs zs_putc(void *v, int c)
890 1.1 tsubai {
891 1.30 chs volatile struct zschan *zc = v;
892 1.30 chs int s, rr0;
893 1.30 chs long wait = 0;
894 1.1 tsubai
895 1.1 tsubai s = splhigh();
896 1.1 tsubai /* Wait for transmitter to become ready. */
897 1.1 tsubai do {
898 1.1 tsubai rr0 = in8(&zc->zc_csr);
899 1.1 tsubai ZS_DELAY();
900 1.1 tsubai } while (((rr0 & ZSRR0_TX_READY) == 0) && (wait++ < 1000000));
901 1.1 tsubai
902 1.1 tsubai if ((rr0 & ZSRR0_TX_READY) != 0) {
903 1.1 tsubai out8(&zc->zc_data, c);
904 1.1 tsubai ZS_DELAY();
905 1.1 tsubai }
906 1.1 tsubai splx(s);
907 1.1 tsubai }
908 1.1 tsubai
909 1.1 tsubai
910 1.1 tsubai /*
911 1.1 tsubai * Polled console input putchar.
912 1.1 tsubai */
913 1.1 tsubai int
914 1.30 chs zscngetc(dev_t dev)
915 1.1 tsubai {
916 1.30 chs volatile struct zschan *zc = zs_conschan;
917 1.30 chs int c;
918 1.1 tsubai
919 1.4 tsubai if (zc) {
920 1.33 matt c = zs_getc(__UNVOLATILE(zc));
921 1.4 tsubai } else {
922 1.4 tsubai char ch = 0;
923 1.4 tsubai OF_read(stdin, &ch, 1);
924 1.4 tsubai c = ch;
925 1.4 tsubai }
926 1.4 tsubai return c;
927 1.1 tsubai }
928 1.1 tsubai
929 1.1 tsubai /*
930 1.1 tsubai * Polled console output putchar.
931 1.1 tsubai */
932 1.1 tsubai void
933 1.30 chs zscnputc(dev_t dev, int c)
934 1.1 tsubai {
935 1.30 chs volatile struct zschan *zc = zs_conschan;
936 1.1 tsubai
937 1.4 tsubai if (zc) {
938 1.33 matt zs_putc(__UNVOLATILE(zc), c);
939 1.4 tsubai } else {
940 1.4 tsubai char ch = c;
941 1.4 tsubai OF_write(stdout, &ch, 1);
942 1.4 tsubai }
943 1.1 tsubai }
944 1.1 tsubai
945 1.1 tsubai /*
946 1.1 tsubai * Handle user request to enter kernel debugger.
947 1.1 tsubai */
948 1.1 tsubai void
949 1.30 chs zs_abort(struct zs_chanstate *cs)
950 1.1 tsubai {
951 1.1 tsubai volatile struct zschan *zc = zs_conschan;
952 1.1 tsubai int rr0;
953 1.30 chs long wait = 0;
954 1.1 tsubai
955 1.1 tsubai if (zs_cons_canabort == 0)
956 1.1 tsubai return;
957 1.1 tsubai
958 1.1 tsubai /* Wait for end of break to avoid PROM abort. */
959 1.1 tsubai do {
960 1.1 tsubai rr0 = in8(&zc->zc_csr);
961 1.1 tsubai ZS_DELAY();
962 1.1 tsubai } while ((rr0 & ZSRR0_BREAK) && (wait++ < ZSABORT_DELAY));
963 1.1 tsubai
964 1.1 tsubai if (wait > ZSABORT_DELAY) {
965 1.1 tsubai zs_cons_canabort = 0;
966 1.1 tsubai /* If we time out, turn off the abort ability! */
967 1.1 tsubai }
968 1.1 tsubai
969 1.19 dbj #if defined(KGDB)
970 1.19 dbj kgdb_connect(1);
971 1.19 dbj #elif defined(DDB)
972 1.1 tsubai Debugger();
973 1.1 tsubai #endif
974 1.1 tsubai }
975 1.1 tsubai
976 1.30 chs extern int ofccngetc(dev_t);
977 1.30 chs extern void ofccnputc(dev_t, int);
978 1.1 tsubai
979 1.1 tsubai struct consdev consdev_zs = {
980 1.1 tsubai zscnprobe,
981 1.1 tsubai zscninit,
982 1.4 tsubai zscngetc,
983 1.4 tsubai zscnputc,
984 1.1 tsubai zscnpollc,
985 1.1 tsubai };
986 1.1 tsubai
987 1.1 tsubai void
988 1.30 chs zscnprobe(struct consdev *cp)
989 1.1 tsubai {
990 1.4 tsubai int chosen, pkg;
991 1.4 tsubai char name[16];
992 1.4 tsubai
993 1.4 tsubai if ((chosen = OF_finddevice("/chosen")) == -1)
994 1.4 tsubai return;
995 1.4 tsubai
996 1.4 tsubai if (OF_getprop(chosen, "stdin", &stdin, sizeof(stdin)) == -1)
997 1.4 tsubai return;
998 1.4 tsubai if (OF_getprop(chosen, "stdout", &stdout, sizeof(stdout)) == -1)
999 1.4 tsubai return;
1000 1.4 tsubai
1001 1.4 tsubai if ((pkg = OF_instance_to_package(stdin)) == -1)
1002 1.4 tsubai return;
1003 1.1 tsubai
1004 1.18 wiz memset(name, 0, sizeof(name));
1005 1.4 tsubai if (OF_getprop(pkg, "device_type", name, sizeof(name)) == -1)
1006 1.1 tsubai return;
1007 1.1 tsubai
1008 1.4 tsubai if (strcmp(name, "serial") != 0)
1009 1.4 tsubai return;
1010 1.4 tsubai
1011 1.18 wiz memset(name, 0, sizeof(name));
1012 1.4 tsubai if (OF_getprop(pkg, "name", name, sizeof(name)) == -1)
1013 1.1 tsubai return;
1014 1.1 tsubai
1015 1.4 tsubai cp->cn_pri = CN_REMOTE;
1016 1.1 tsubai }
1017 1.1 tsubai
1018 1.1 tsubai void
1019 1.30 chs zscninit(struct consdev *cp)
1020 1.1 tsubai {
1021 1.15 tsubai int escc, escc_ch, obio, zs_offset;
1022 1.15 tsubai u_int32_t reg[5];
1023 1.4 tsubai char name[16];
1024 1.1 tsubai
1025 1.15 tsubai if ((escc_ch = OF_instance_to_package(stdin)) == -1)
1026 1.1 tsubai return;
1027 1.1 tsubai
1028 1.18 wiz memset(name, 0, sizeof(name));
1029 1.15 tsubai if (OF_getprop(escc_ch, "name", name, sizeof(name)) == -1)
1030 1.1 tsubai return;
1031 1.1 tsubai
1032 1.37 macallan zs_conschannel = strcmp(name, "ch-b") == 0;
1033 1.15 tsubai
1034 1.15 tsubai if (OF_getprop(escc_ch, "reg", reg, sizeof(reg)) < 4)
1035 1.15 tsubai return;
1036 1.15 tsubai zs_offset = reg[0];
1037 1.15 tsubai
1038 1.15 tsubai escc = OF_parent(escc_ch);
1039 1.15 tsubai obio = OF_parent(escc);
1040 1.15 tsubai
1041 1.15 tsubai if (OF_getprop(obio, "assigned-addresses", reg, sizeof(reg)) < 12)
1042 1.15 tsubai return;
1043 1.15 tsubai zs_conschan = (void *)(reg[2] + zs_offset);
1044 1.1 tsubai }
1045