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zs.c revision 1.24
      1 /*	$NetBSD: zs.c,v 1.24 2003/01/01 01:47:30 thorpej Exp $	*/
      2 
      3 /*
      4  * Copyright (c) 1996, 1998 Bill Studenmund
      5  * Copyright (c) 1995 Gordon W. Ross
      6  * All rights reserved.
      7  *
      8  * Redistribution and use in source and binary forms, with or without
      9  * modification, are permitted provided that the following conditions
     10  * are met:
     11  * 1. Redistributions of source code must retain the above copyright
     12  *    notice, this list of conditions and the following disclaimer.
     13  * 2. Redistributions in binary form must reproduce the above copyright
     14  *    notice, this list of conditions and the following disclaimer in the
     15  *    documentation and/or other materials provided with the distribution.
     16  * 3. The name of the author may not be used to endorse or promote products
     17  *    derived from this software without specific prior written permission.
     18  * 4. All advertising materials mentioning features or use of this software
     19  *    must display the following acknowledgement:
     20  *      This product includes software developed by Gordon Ross
     21  *
     22  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
     23  * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
     24  * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
     25  * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
     26  * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
     27  * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
     28  * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
     29  * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
     30  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
     31  * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
     32  */
     33 
     34 /*
     35  * Zilog Z8530 Dual UART driver (machine-dependent part)
     36  *
     37  * Runs two serial lines per chip using slave drivers.
     38  * Plain tty/async lines use the zs_async slave.
     39  * Sun keyboard/mouse uses the zs_kbd/zs_ms slaves.
     40  * Other ports use their own mice & keyboard slaves.
     41  *
     42  * Credits & history:
     43  *
     44  * With NetBSD 1.1, port-mac68k started using a port of the port-sparc
     45  * (port-sun3?) zs.c driver (which was in turn based on code in the
     46  * Berkeley 4.4 Lite release). Bill Studenmund did the port, with
     47  * help from Allen Briggs and Gordon Ross <gwr (at) netbsd.org>. Noud de
     48  * Brouwer field-tested the driver at a local ISP.
     49  *
     50  * Bill Studenmund and Gordon Ross then ported the machine-independant
     51  * z8530 driver to work with port-mac68k. NetBSD 1.2 contained an
     52  * intermediate version (mac68k using a local, patched version of
     53  * the m.i. drivers), with NetBSD 1.3 containing a full version.
     54  */
     55 
     56 #include "opt_ddb.h"
     57 #include "opt_kgdb.h"
     58 
     59 #include <sys/param.h>
     60 #include <sys/systm.h>
     61 #include <sys/proc.h>
     62 #include <sys/device.h>
     63 #include <sys/conf.h>
     64 #include <sys/file.h>
     65 #include <sys/ioctl.h>
     66 #include <sys/tty.h>
     67 #include <sys/time.h>
     68 #include <sys/kernel.h>
     69 #include <sys/syslog.h>
     70 #ifdef KGDB
     71 #include <sys/kgdb.h>
     72 #endif
     73 
     74 #include <dev/cons.h>
     75 #include <dev/ofw/openfirm.h>
     76 #include <dev/ic/z8530reg.h>
     77 
     78 #include <machine/z8530var.h>
     79 #include <machine/autoconf.h>
     80 #include <machine/cpu.h>
     81 #include <machine/pio.h>
     82 
     83 /* Are these in a header file anywhere? */
     84 /* Booter flags interface */
     85 #define ZSMAC_RAW	0x01
     86 #define ZSMAC_LOCALTALK	0x02
     87 
     88 #include "zsc.h"	/* get the # of zs chips defined */
     89 
     90 /*
     91  * Some warts needed by z8530tty.c -
     92  */
     93 int zs_def_cflag = (CREAD | CS8 | HUPCL);
     94 
     95 /*
     96  * abort detection on console will now timeout after iterating on a loop
     97  * the following # of times. Cheep hack. Also, abort detection is turned
     98  * off after a timeout (i.e. maybe there's not a terminal hooked up).
     99  */
    100 #define ZSABORT_DELAY 3000000
    101 
    102 struct zsdevice {
    103 	/* Yes, they are backwards. */
    104 	struct	zschan zs_chan_b;
    105 	struct	zschan zs_chan_a;
    106 };
    107 
    108 /* Flags from cninit() */
    109 static int zs_hwflags[NZSC][2];
    110 /* Default speed for each channel */
    111 static int zs_defspeed[NZSC][2] = {
    112 	{ 38400, 	/* tty00 */
    113 	  38400 },	/* tty01 */
    114 };
    115 
    116 /* console stuff */
    117 void	*zs_conschan = 0;
    118 #ifdef	ZS_CONSOLE_ABORT
    119 int	zs_cons_canabort = 1;
    120 #else
    121 int	zs_cons_canabort = 0;
    122 #endif /* ZS_CONSOLE_ABORT*/
    123 
    124 /* device to which the console is attached--if serial. */
    125 /* Mac stuff */
    126 
    127 static int zs_get_speed __P((struct zs_chanstate *));
    128 
    129 /*
    130  * Even though zsparam will set up the clock multiples, etc., we
    131  * still set them here as: 1) mice & keyboards don't use zsparam,
    132  * and 2) the console stuff uses these defaults before device
    133  * attach.
    134  */
    135 
    136 static u_char zs_init_reg[16] = {
    137 	0,	/* 0: CMD (reset, etc.) */
    138 	0,	/* 1: No interrupts yet. */
    139 	0,	/* IVECT */
    140 	ZSWR3_RX_8 | ZSWR3_RX_ENABLE,
    141 	ZSWR4_CLK_X16 | ZSWR4_ONESB | ZSWR4_EVENP,
    142 	ZSWR5_TX_8 | ZSWR5_TX_ENABLE,
    143 	0,	/* 6: TXSYNC/SYNCLO */
    144 	0,	/* 7: RXSYNC/SYNCHI */
    145 	0,	/* 8: alias for data port */
    146 	ZSWR9_MASTER_IE,
    147 	0,	/*10: Misc. TX/RX control bits */
    148 	ZSWR11_TXCLK_BAUD | ZSWR11_RXCLK_BAUD,
    149 	((PCLK/32)/38400)-2,	/*12: BAUDLO (default=38400) */
    150 	0,			/*13: BAUDHI (default=38400) */
    151 	ZSWR14_BAUD_ENA,
    152 	ZSWR15_BREAK_IE,
    153 };
    154 
    155 /****************************************************************
    156  * Autoconfig
    157  ****************************************************************/
    158 
    159 /* Definition of the driver for autoconfig. */
    160 static int	zsc_match __P((struct device *, struct cfdata *, void *));
    161 static void	zsc_attach __P((struct device *, struct device *, void *));
    162 static int  zsc_print __P((void *, const char *name));
    163 
    164 CFATTACH_DECL(zsc, sizeof(struct zsc_softc),
    165     zsc_match, zsc_attach, NULL, NULL);
    166 
    167 extern struct cfdriver zsc_cd;
    168 
    169 int zshard __P((void *));
    170 int zssoft __P((void *));
    171 #ifdef ZS_TXDMA
    172 static int zs_txdma_int __P((void *));
    173 #endif
    174 
    175 void zscnprobe __P((struct consdev *));
    176 void zscninit __P((struct consdev *));
    177 int  zscngetc __P((dev_t));
    178 void zscnputc __P((dev_t, int));
    179 void zscnpollc __P((dev_t, int));
    180 
    181 /*
    182  * Is the zs chip present?
    183  */
    184 static int
    185 zsc_match(parent, cf, aux)
    186 	struct device *parent;
    187 	struct cfdata *cf;
    188 	void *aux;
    189 {
    190 	struct confargs *ca = aux;
    191 	int unit = cf->cf_unit;
    192 
    193 	if (strcmp(ca->ca_name, "escc") != 0)
    194 		return 0;
    195 
    196 	if (unit > 1)
    197 		return 0;
    198 
    199 	return 1;
    200 }
    201 
    202 /*
    203  * Attach a found zs.
    204  *
    205  * Match slave number to zs unit number, so that misconfiguration will
    206  * not set up the keyboard as ttya, etc.
    207  */
    208 static void
    209 zsc_attach(parent, self, aux)
    210 	struct device *parent;
    211 	struct device *self;
    212 	void *aux;
    213 {
    214 	struct zsc_softc *zsc = (void *)self;
    215 	struct confargs *ca = aux;
    216 	struct zsc_attach_args zsc_args;
    217 	volatile struct zschan *zc;
    218 	struct xzs_chanstate *xcs;
    219 	struct zs_chanstate *cs;
    220 	struct zsdevice *zsd;
    221 	int zsc_unit, channel;
    222 	int s, chip, theflags;
    223 	int node, intr[2][3];
    224 	u_int regs[6];
    225 
    226 	chip = 0;
    227 	zsc_unit = zsc->zsc_dev.dv_unit;
    228 
    229 	ca->ca_reg[0] += ca->ca_baseaddr;
    230 	zsd = mapiodev(ca->ca_reg[0], ca->ca_reg[1]);
    231 
    232 	node = OF_child(ca->ca_node);	/* ch-a */
    233 
    234 	for (channel = 0; channel < 2; channel++) {
    235 		if (OF_getprop(node, "AAPL,interrupts",
    236 			       intr[channel], sizeof(intr[0])) == -1 &&
    237 		    OF_getprop(node, "interrupts",
    238 			       intr[channel], sizeof(intr[0])) == -1) {
    239 			printf(": cannot find interrupt property\n");
    240 			return;
    241 		}
    242 
    243 		if (OF_getprop(node, "reg", regs, sizeof(regs)) < 24) {
    244 			printf(": cannot find reg property\n");
    245 			return;
    246 		}
    247 		regs[2] += ca->ca_baseaddr;
    248 		regs[4] += ca->ca_baseaddr;
    249 #ifdef ZS_TXDMA
    250 		zsc->zsc_txdmareg[channel] = mapiodev(regs[2], regs[3]);
    251 		zsc->zsc_txdmacmd[channel] =
    252 			dbdma_alloc(sizeof(dbdma_command_t) * 3);
    253 		memset(zsc->zsc_txdmacmd[channel], 0,
    254 			sizeof(dbdma_command_t) * 3);
    255 		dbdma_reset(zsc->zsc_txdmareg[channel]);
    256 #endif
    257 		node = OF_peer(node);	/* ch-b */
    258 	}
    259 
    260 	printf(": irq %d,%d\n", intr[0][0], intr[1][0]);
    261 
    262 	/*
    263 	 * Initialize software state for each channel.
    264 	 */
    265 	for (channel = 0; channel < 2; channel++) {
    266 		zsc_args.channel = channel;
    267 		zsc_args.hwflags = zs_hwflags[zsc_unit][channel];
    268 		xcs = &zsc->xzsc_xcs_store[channel];
    269 		cs  = &xcs->xzs_cs;
    270 		zsc->zsc_cs[channel] = cs;
    271 
    272 		cs->cs_channel = channel;
    273 		cs->cs_private = NULL;
    274 		cs->cs_ops = &zsops_null;
    275 
    276 		zc = (channel == 0) ? &zsd->zs_chan_a : &zsd->zs_chan_b;
    277 
    278 		cs->cs_reg_csr  = &zc->zc_csr;
    279 		cs->cs_reg_data = &zc->zc_data;
    280 
    281 		memcpy(cs->cs_creg, zs_init_reg, 16);
    282 		memcpy(cs->cs_preg, zs_init_reg, 16);
    283 
    284 		/* Current BAUD rate generator clock. */
    285 		cs->cs_brg_clk = PCLK / 16;	/* RTxC is 230400*16, so use 230400 */
    286 		if (zsc_args.hwflags & ZS_HWFLAG_CONSOLE)
    287 			cs->cs_defspeed = zs_get_speed(cs);
    288 		else
    289 			cs->cs_defspeed = zs_defspeed[zsc_unit][channel];
    290 		cs->cs_defcflag = zs_def_cflag;
    291 
    292 		/* Make these correspond to cs_defcflag (-crtscts) */
    293 		cs->cs_rr0_dcd = ZSRR0_DCD;
    294 		cs->cs_rr0_cts = 0;
    295 		cs->cs_wr5_dtr = ZSWR5_DTR;
    296 		cs->cs_wr5_rts = 0;
    297 
    298 #ifdef __notyet__
    299 		cs->cs_slave_type = ZS_SLAVE_NONE;
    300 #endif
    301 
    302 		/* Define BAUD rate stuff. */
    303 		xcs->cs_clocks[0].clk = PCLK;
    304 		xcs->cs_clocks[0].flags = ZSC_RTXBRG | ZSC_RTXDIV;
    305 		xcs->cs_clocks[1].flags =
    306 			ZSC_RTXBRG | ZSC_RTXDIV | ZSC_VARIABLE | ZSC_EXTERN;
    307 		xcs->cs_clocks[2].flags = ZSC_TRXDIV | ZSC_VARIABLE;
    308 		xcs->cs_clock_count = 3;
    309 		if (channel == 0) {
    310 			theflags = 0; /*mac68k_machine.modem_flags;*/
    311 			/*xcs->cs_clocks[1].clk = mac68k_machine.modem_dcd_clk;*/
    312 			/*xcs->cs_clocks[2].clk = mac68k_machine.modem_cts_clk;*/
    313 			xcs->cs_clocks[1].clk = 0;
    314 			xcs->cs_clocks[2].clk = 0;
    315 		} else {
    316 			theflags = 0; /*mac68k_machine.print_flags;*/
    317 			xcs->cs_clocks[1].flags = ZSC_VARIABLE;
    318 			/*
    319 			 * Yes, we aren't defining ANY clock source enables for the
    320 			 * printer's DCD clock in. The hardware won't let us
    321 			 * use it. But a clock will freak out the chip, so we
    322 			 * let you set it, telling us to bar interrupts on the line.
    323 			 */
    324 			/*xcs->cs_clocks[1].clk = mac68k_machine.print_dcd_clk;*/
    325 			/*xcs->cs_clocks[2].clk = mac68k_machine.print_cts_clk;*/
    326 			xcs->cs_clocks[1].clk = 0;
    327 			xcs->cs_clocks[2].clk = 0;
    328 		}
    329 		if (xcs->cs_clocks[1].clk)
    330 			zsc_args.hwflags |= ZS_HWFLAG_NO_DCD;
    331 		if (xcs->cs_clocks[2].clk)
    332 			zsc_args.hwflags |= ZS_HWFLAG_NO_CTS;
    333 
    334 		/* Set defaults in our "extended" chanstate. */
    335 		xcs->cs_csource = 0;
    336 		xcs->cs_psource = 0;
    337 		xcs->cs_cclk_flag = 0;  /* Nothing fancy by default */
    338 		xcs->cs_pclk_flag = 0;
    339 
    340 		if (theflags & ZSMAC_RAW) {
    341 			zsc_args.hwflags |= ZS_HWFLAG_RAW;
    342 			printf(" (raw defaults)");
    343 		}
    344 
    345 		/*
    346 		 * XXX - This might be better done with a "stub" driver
    347 		 * (to replace zstty) that ignores LocalTalk for now.
    348 		 */
    349 		if (theflags & ZSMAC_LOCALTALK) {
    350 			printf(" shielding from LocalTalk");
    351 			cs->cs_defspeed = 1;
    352 			cs->cs_creg[ZSRR_BAUDLO] = cs->cs_preg[ZSRR_BAUDLO] = 0xff;
    353 			cs->cs_creg[ZSRR_BAUDHI] = cs->cs_preg[ZSRR_BAUDHI] = 0xff;
    354 			zs_write_reg(cs, ZSRR_BAUDLO, 0xff);
    355 			zs_write_reg(cs, ZSRR_BAUDHI, 0xff);
    356 			/*
    357 			 * If we might have LocalTalk, then make sure we have the
    358 			 * Baud rate low-enough to not do any damage.
    359 			 */
    360 		}
    361 
    362 		/*
    363 		 * We used to disable chip interrupts here, but we now
    364 		 * do that in zscnprobe, just in case MacOS left the chip on.
    365 		 */
    366 
    367 		xcs->cs_chip = chip;
    368 
    369 		/* Stash away a copy of the final H/W flags. */
    370 		xcs->cs_hwflags = zsc_args.hwflags;
    371 
    372 		/*
    373 		 * Look for a child driver for this channel.
    374 		 * The child attach will setup the hardware.
    375 		 */
    376 		if (!config_found(self, (void *)&zsc_args, zsc_print)) {
    377 			/* No sub-driver.  Just reset it. */
    378 			u_char reset = (channel == 0) ?
    379 				ZSWR9_A_RESET : ZSWR9_B_RESET;
    380 			s = splzs();
    381 			zs_write_reg(cs, 9, reset);
    382 			splx(s);
    383 		}
    384 	}
    385 
    386 	/* XXX - Now safe to install interrupt handlers. */
    387 	intr_establish(intr[0][0], IST_LEVEL, IPL_TTY, zshard, NULL);
    388 	intr_establish(intr[1][0], IST_LEVEL, IPL_TTY, zshard, NULL);
    389 #ifdef ZS_TXDMA
    390 	intr_establish(intr[0][1], IST_LEVEL, IPL_TTY, zs_txdma_int, (void *)0);
    391 	intr_establish(intr[1][1], IST_LEVEL, IPL_TTY, zs_txdma_int, (void *)1);
    392 #endif
    393 
    394 	/*
    395 	 * Set the master interrupt enable and interrupt vector.
    396 	 * (common to both channels, do it on A)
    397 	 */
    398 	cs = zsc->zsc_cs[0];
    399 	s = splzs();
    400 	/* interrupt vector */
    401 	zs_write_reg(cs, 2, zs_init_reg[2]);
    402 	/* master interrupt control (enable) */
    403 	zs_write_reg(cs, 9, zs_init_reg[9]);
    404 	splx(s);
    405 }
    406 
    407 static int
    408 zsc_print(aux, name)
    409 	void *aux;
    410 	const char *name;
    411 {
    412 	struct zsc_attach_args *args = aux;
    413 
    414 	if (name != NULL)
    415 		aprint_normal("%s: ", name);
    416 
    417 	if (args->channel != -1)
    418 		aprint_normal(" channel %d", args->channel);
    419 
    420 	return UNCONF;
    421 }
    422 
    423 int
    424 zsmdioctl(cs, cmd, data)
    425 	struct zs_chanstate *cs;
    426 	u_long cmd;
    427 	caddr_t data;
    428 {
    429 	switch (cmd) {
    430 	default:
    431 		return (EPASSTHROUGH);
    432 	}
    433 	return (0);
    434 }
    435 
    436 void
    437 zsmd_setclock(cs)
    438 	struct zs_chanstate *cs;
    439 {
    440 #ifdef NOTYET
    441 	struct xzs_chanstate *xcs = (void *)cs;
    442 
    443 	if (cs->cs_channel != 0)
    444 		return;
    445 
    446 	/*
    447 	 * If the new clock has the external bit set, then select the
    448 	 * external source.
    449 	 */
    450 	via_set_modem((xcs->cs_pclk_flag & ZSC_EXTERN) ? 1 : 0);
    451 #endif
    452 }
    453 
    454 static int zssoftpending;
    455 
    456 /*
    457  * Our ZS chips all share a common, autovectored interrupt,
    458  * so we have to look at all of them on each interrupt.
    459  */
    460 int
    461 zshard(arg)
    462 	void *arg;
    463 {
    464 	register struct zsc_softc *zsc;
    465 	register int unit, rval;
    466 
    467 	rval = 0;
    468 	for (unit = 0; unit < zsc_cd.cd_ndevs; unit++) {
    469 		zsc = zsc_cd.cd_devs[unit];
    470 		if (zsc == NULL)
    471 			continue;
    472 		rval |= zsc_intr_hard(zsc);
    473 		if ((zsc->zsc_cs[0]->cs_softreq) ||
    474 			(zsc->zsc_cs[1]->cs_softreq))
    475 		{
    476 			/* zsc_req_softint(zsc); */
    477 			/* We are at splzs here, so no need to lock. */
    478 			if (zssoftpending == 0) {
    479 				zssoftpending = 1;
    480 				setsoftserial();
    481 			}
    482 		}
    483 	}
    484 	return (rval);
    485 }
    486 
    487 /*
    488  * Similar scheme as for zshard (look at all of them)
    489  */
    490 int
    491 zssoft(arg)
    492 	void *arg;
    493 {
    494 	register struct zsc_softc *zsc;
    495 	register int unit;
    496 
    497 	/* This is not the only ISR on this IPL. */
    498 	if (zssoftpending == 0)
    499 		return (0);
    500 
    501 	/*
    502 	 * The soft intr. bit will be set by zshard only if
    503 	 * the variable zssoftpending is zero.
    504 	 */
    505 	zssoftpending = 0;
    506 
    507 	for (unit = 0; unit < zsc_cd.cd_ndevs; ++unit) {
    508 		zsc = zsc_cd.cd_devs[unit];
    509 		if (zsc == NULL)
    510 			continue;
    511 		(void) zsc_intr_soft(zsc);
    512 	}
    513 	return (1);
    514 }
    515 
    516 #ifdef ZS_TXDMA
    517 int
    518 zs_txdma_int(arg)
    519 	void *arg;
    520 {
    521 	int ch = (int)arg;
    522 	struct zsc_softc *zsc;
    523 	struct zs_chanstate *cs;
    524 	int unit = 0;			/* XXX */
    525 	extern int zstty_txdma_int();
    526 
    527 	zsc = zsc_cd.cd_devs[unit];
    528 	if (zsc == NULL)
    529 		panic("zs_txdma_int");
    530 
    531 	cs = zsc->zsc_cs[ch];
    532 	zstty_txdma_int(cs);
    533 
    534 	if (cs->cs_softreq) {
    535 		if (zssoftpending == 0) {
    536 			zssoftpending = 1;
    537 			setsoftserial();
    538 		}
    539 	}
    540 	return 1;
    541 }
    542 
    543 void
    544 zs_dma_setup(cs, pa, len)
    545 	struct zs_chanstate *cs;
    546 	caddr_t pa;
    547 	int len;
    548 {
    549 	struct zsc_softc *zsc;
    550 	dbdma_command_t *cmdp;
    551 	int ch = cs->cs_channel;
    552 
    553 	zsc = zsc_cd.cd_devs[ch];
    554 	cmdp = zsc->zsc_txdmacmd[ch];
    555 
    556 	DBDMA_BUILD(cmdp, DBDMA_CMD_OUT_LAST, 0, len, kvtop(pa),
    557 		DBDMA_INT_ALWAYS, DBDMA_WAIT_NEVER, DBDMA_BRANCH_NEVER);
    558 	cmdp++;
    559 	DBDMA_BUILD(cmdp, DBDMA_CMD_STOP, 0, 0, 0,
    560 		DBDMA_INT_NEVER, DBDMA_WAIT_NEVER, DBDMA_BRANCH_NEVER);
    561 
    562 	__asm __volatile("eieio");
    563 
    564 	dbdma_start(zsc->zsc_txdmareg[ch], zsc->zsc_txdmacmd[ch]);
    565 }
    566 #endif
    567 
    568 /*
    569  * Compute the current baud rate given a ZS channel.
    570  * XXX Assume internal BRG.
    571  */
    572 int
    573 zs_get_speed(cs)
    574 	struct zs_chanstate *cs;
    575 {
    576 	int tconst;
    577 
    578 	tconst = zs_read_reg(cs, 12);
    579 	tconst |= zs_read_reg(cs, 13) << 8;
    580 	return TCONST_TO_BPS(cs->cs_brg_clk, tconst);
    581 }
    582 
    583 #ifndef ZS_TOLERANCE
    584 #define ZS_TOLERANCE 51
    585 /* 5% in tenths of a %, plus 1 so that exactly 5% will be ok. */
    586 #endif
    587 
    588 /*
    589  * Search through the signal sources in the channel, and
    590  * pick the best one for the baud rate requested. Return
    591  * a -1 if not achievable in tolerance. Otherwise return 0
    592  * and fill in the values.
    593  *
    594  * This routine draws inspiration from the Atari port's zs.c
    595  * driver in NetBSD 1.1 which did the same type of source switching.
    596  * Tolerance code inspired by comspeed routine in isa/com.c.
    597  *
    598  * By Bill Studenmund, 1996-05-12
    599  */
    600 int
    601 zs_set_speed(cs, bps)
    602 	struct zs_chanstate *cs;
    603 	int bps;	/* bits per second */
    604 {
    605 	struct xzs_chanstate *xcs = (void *) cs;
    606 	int i, tc, tc0 = 0, tc1, s, sf = 0;
    607 	int src, rate0, rate1, err, tol;
    608 
    609 	if (bps == 0)
    610 		return (0);
    611 
    612 	src = -1;		/* no valid source yet */
    613 	tol = ZS_TOLERANCE;
    614 
    615 	/*
    616 	 * Step through all the sources and see which one matches
    617 	 * the best. A source has to match BETTER than tol to be chosen.
    618 	 * Thus if two sources give the same error, the first one will be
    619 	 * chosen. Also, allow for the possability that one source might run
    620 	 * both the BRG and the direct divider (i.e. RTxC).
    621 	 */
    622 	for (i = 0; i < xcs->cs_clock_count; i++) {
    623 		if (xcs->cs_clocks[i].clk <= 0)
    624 			continue;	/* skip non-existent or bad clocks */
    625 		if (xcs->cs_clocks[i].flags & ZSC_BRG) {
    626 			/* check out BRG at /16 */
    627 			tc1 = BPS_TO_TCONST(xcs->cs_clocks[i].clk >> 4, bps);
    628 			if (tc1 >= 0) {
    629 				rate1 = TCONST_TO_BPS(xcs->cs_clocks[i].clk >> 4, tc1);
    630 				err = abs(((rate1 - bps)*1000)/bps);
    631 				if (err < tol) {
    632 					tol = err;
    633 					src = i;
    634 					sf = xcs->cs_clocks[i].flags & ~ZSC_DIV;
    635 					tc0 = tc1;
    636 					rate0 = rate1;
    637 				}
    638 			}
    639 		}
    640 		if (xcs->cs_clocks[i].flags & ZSC_DIV) {
    641 			/*
    642 			 * Check out either /1, /16, /32, or /64
    643 			 * Note: for /1, you'd better be using a synchronized
    644 			 * clock!
    645 			 */
    646 			int b0 = xcs->cs_clocks[i].clk, e0 = abs(b0-bps);
    647 			int b1 = b0 >> 4, e1 = abs(b1-bps);
    648 			int b2 = b1 >> 1, e2 = abs(b2-bps);
    649 			int b3 = b2 >> 1, e3 = abs(b3-bps);
    650 
    651 			if (e0 < e1 && e0 < e2 && e0 < e3) {
    652 				err = e0;
    653 				rate1 = b0;
    654 				tc1 = ZSWR4_CLK_X1;
    655 			} else if (e0 > e1 && e1 < e2  && e1 < e3) {
    656 				err = e1;
    657 				rate1 = b1;
    658 				tc1 = ZSWR4_CLK_X16;
    659 			} else if (e0 > e2 && e1 > e2 && e2 < e3) {
    660 				err = e2;
    661 				rate1 = b2;
    662 				tc1 = ZSWR4_CLK_X32;
    663 			} else {
    664 				err = e3;
    665 				rate1 = b3;
    666 				tc1 = ZSWR4_CLK_X64;
    667 			}
    668 
    669 			err = (err * 1000)/bps;
    670 			if (err < tol) {
    671 				tol = err;
    672 				src = i;
    673 				sf = xcs->cs_clocks[i].flags & ~ZSC_BRG;
    674 				tc0 = tc1;
    675 				rate0 = rate1;
    676 			}
    677 		}
    678 	}
    679 #ifdef ZSMACDEBUG
    680 	zsprintf("Checking for rate %d. Found source #%d.\n",bps, src);
    681 #endif
    682 	if (src == -1)
    683 		return (EINVAL); /* no can do */
    684 
    685 	/*
    686 	 * The M.I. layer likes to keep cs_brg_clk current, even though
    687 	 * we are the only ones who should be touching the BRG's rate.
    688 	 *
    689 	 * Note: we are assuming that any ZSC_EXTERN signal source comes in
    690 	 * on the RTxC pin. Correct for the mac68k obio zsc.
    691 	 */
    692 	if (sf & ZSC_EXTERN)
    693 		cs->cs_brg_clk = xcs->cs_clocks[i].clk >> 4;
    694 	else
    695 		cs->cs_brg_clk = PCLK / 16;
    696 
    697 	/*
    698 	 * Now we have a source, so set it up.
    699 	 */
    700 	s = splzs();
    701 	xcs->cs_psource = src;
    702 	xcs->cs_pclk_flag = sf;
    703 	bps = rate0;
    704 	if (sf & ZSC_BRG) {
    705 		cs->cs_preg[4] = ZSWR4_CLK_X16;
    706 		cs->cs_preg[11]= ZSWR11_RXCLK_BAUD | ZSWR11_TXCLK_BAUD;
    707 		if (sf & ZSC_PCLK) {
    708 			cs->cs_preg[14] = ZSWR14_BAUD_ENA | ZSWR14_BAUD_FROM_PCLK;
    709 		} else {
    710 			cs->cs_preg[14] = ZSWR14_BAUD_ENA;
    711 		}
    712 		tc = tc0;
    713 	} else {
    714 		cs->cs_preg[4] = tc0;
    715 		if (sf & ZSC_RTXDIV) {
    716 			cs->cs_preg[11] = ZSWR11_RXCLK_RTXC | ZSWR11_TXCLK_RTXC;
    717 		} else {
    718 			cs->cs_preg[11] = ZSWR11_RXCLK_TRXC | ZSWR11_TXCLK_TRXC;
    719 		}
    720 		cs->cs_preg[14]= 0;
    721 		tc = 0xffff;
    722 	}
    723 	/* Set the BAUD rate divisor. */
    724 	cs->cs_preg[12] = tc;
    725 	cs->cs_preg[13] = tc >> 8;
    726 	splx(s);
    727 
    728 #ifdef ZSMACDEBUG
    729 	zsprintf("Rate is %7d, tc is %7d, source no. %2d, flags %4x\n", \
    730 	    bps, tc, src, sf);
    731 	zsprintf("Registers are: 4 %x, 11 %x, 14 %x\n\n",
    732 		cs->cs_preg[4], cs->cs_preg[11], cs->cs_preg[14]);
    733 #endif
    734 
    735 	cs->cs_preg[5] |= ZSWR5_RTS;	/* Make sure the drivers are on! */
    736 
    737 	/* Caller will stuff the pending registers. */
    738 	return (0);
    739 }
    740 
    741 int
    742 zs_set_modes(cs, cflag)
    743 	struct zs_chanstate *cs;
    744 	int cflag;	/* bits per second */
    745 {
    746 	struct xzs_chanstate *xcs = (void*)cs;
    747 	int s;
    748 
    749 	/*
    750 	 * Make sure we don't enable hfc on a signal line we're ignoring.
    751 	 * As we enable CTS interrupts only if we have CRTSCTS or CDTRCTS,
    752 	 * this code also effectivly turns off ZSWR15_CTS_IE.
    753 	 *
    754 	 * Also, disable DCD interrupts if we've been told to ignore
    755 	 * the DCD pin. Happens on mac68k because the input line for
    756 	 * DCD can also be used as a clock input.  (Just set CLOCAL.)
    757 	 *
    758 	 * If someone tries to turn an invalid flow mode on, Just Say No
    759 	 * (Suggested by gwr)
    760 	 */
    761 	if ((cflag & CDTRCTS) && (cflag & (CRTSCTS | MDMBUF)))
    762 		return (EINVAL);
    763 	if (xcs->cs_hwflags & ZS_HWFLAG_NO_DCD) {
    764 		if (cflag & MDMBUF)
    765 			return (EINVAL);
    766 		cflag |= CLOCAL;
    767 	}
    768 	if ((xcs->cs_hwflags & ZS_HWFLAG_NO_CTS) && (cflag & (CRTSCTS | CDTRCTS)))
    769 		return (EINVAL);
    770 
    771 	/*
    772 	 * Output hardware flow control on the chip is horrendous:
    773 	 * if carrier detect drops, the receiver is disabled, and if
    774 	 * CTS drops, the transmitter is stoped IN MID CHARACTER!
    775 	 * Therefore, NEVER set the HFC bit, and instead use the
    776 	 * status interrupt to detect CTS changes.
    777 	 */
    778 	s = splzs();
    779 	if ((cflag & (CLOCAL | MDMBUF)) != 0)
    780 		cs->cs_rr0_dcd = 0;
    781 	else
    782 		cs->cs_rr0_dcd = ZSRR0_DCD;
    783 	/*
    784 	 * The mac hardware only has one output, DTR (HSKo in Mac
    785 	 * parlance). In HFC mode, we use it for the functions
    786 	 * typically served by RTS and DTR on other ports, so we
    787 	 * have to fake the upper layer out some.
    788 	 *
    789 	 * CRTSCTS we use CTS as an input which tells us when to shut up.
    790 	 * We make no effort to shut up the other side of the connection.
    791 	 * DTR is used to hang up the modem.
    792 	 *
    793 	 * In CDTRCTS, we use CTS to tell us to stop, but we use DTR to
    794 	 * shut up the other side.
    795 	 */
    796 	if ((cflag & CRTSCTS) != 0) {
    797 		cs->cs_wr5_dtr = ZSWR5_DTR;
    798 		cs->cs_wr5_rts = 0;
    799 		cs->cs_rr0_cts = ZSRR0_CTS;
    800 	} else if ((cflag & CDTRCTS) != 0) {
    801 		cs->cs_wr5_dtr = 0;
    802 		cs->cs_wr5_rts = ZSWR5_DTR;
    803 		cs->cs_rr0_cts = ZSRR0_CTS;
    804 	} else if ((cflag & MDMBUF) != 0) {
    805 		cs->cs_wr5_dtr = 0;
    806 		cs->cs_wr5_rts = ZSWR5_DTR;
    807 		cs->cs_rr0_cts = ZSRR0_DCD;
    808 	} else {
    809 		cs->cs_wr5_dtr = ZSWR5_DTR;
    810 		cs->cs_wr5_rts = 0;
    811 		cs->cs_rr0_cts = 0;
    812 	}
    813 	splx(s);
    814 
    815 	/* Caller will stuff the pending registers. */
    816 	return (0);
    817 }
    818 
    819 
    820 /*
    821  * Read or write the chip with suitable delays.
    822  * MacII hardware has the delay built in.
    823  * No need for extra delay. :-) However, some clock-chirped
    824  * macs, or zsc's on serial add-on boards might need it.
    825  */
    826 #define	ZS_DELAY()
    827 
    828 u_char
    829 zs_read_reg(cs, reg)
    830 	struct zs_chanstate *cs;
    831 	u_char reg;
    832 {
    833 	u_char val;
    834 
    835 	out8(cs->cs_reg_csr, reg);
    836 	ZS_DELAY();
    837 	val = in8(cs->cs_reg_csr);
    838 	ZS_DELAY();
    839 	return val;
    840 }
    841 
    842 void
    843 zs_write_reg(cs, reg, val)
    844 	struct zs_chanstate *cs;
    845 	u_char reg, val;
    846 {
    847 	out8(cs->cs_reg_csr, reg);
    848 	ZS_DELAY();
    849 	out8(cs->cs_reg_csr, val);
    850 	ZS_DELAY();
    851 }
    852 
    853 u_char zs_read_csr(cs)
    854 	struct zs_chanstate *cs;
    855 {
    856 	register u_char val;
    857 
    858 	val = in8(cs->cs_reg_csr);
    859 	ZS_DELAY();
    860 	/* make up for the fact CTS is wired backwards */
    861 	val ^= ZSRR0_CTS;
    862 	return val;
    863 }
    864 
    865 void  zs_write_csr(cs, val)
    866 	struct zs_chanstate *cs;
    867 	u_char val;
    868 {
    869 	/* Note, the csr does not write CTS... */
    870 	out8(cs->cs_reg_csr, val);
    871 	ZS_DELAY();
    872 }
    873 
    874 u_char zs_read_data(cs)
    875 	struct zs_chanstate *cs;
    876 {
    877 	register u_char val;
    878 
    879 	val = in8(cs->cs_reg_data);
    880 	ZS_DELAY();
    881 	return val;
    882 }
    883 
    884 void  zs_write_data(cs, val)
    885 	struct zs_chanstate *cs;
    886 	u_char val;
    887 {
    888 	out8(cs->cs_reg_data, val);
    889 	ZS_DELAY();
    890 }
    891 
    892 /****************************************************************
    893  * Console support functions (powermac specific!)
    894  * Note: this code is allowed to know about the layout of
    895  * the chip registers, and uses that to keep things simple.
    896  * XXX - I think I like the mvme167 code better. -gwr
    897  * XXX - Well :-P  :-)  -wrs
    898  ****************************************************************/
    899 
    900 #define zscnpollc	nullcnpollc
    901 cons_decl(zs);
    902 
    903 static int stdin, stdout;
    904 
    905 /*
    906  * Console functions.
    907  */
    908 
    909 /*
    910  * zscnprobe is the routine which gets called as the kernel is trying to
    911  * figure out where the console should be. Each io driver which might
    912  * be the console (as defined in mac68k/conf.c) gets probed. The probe
    913  * fills in the consdev structure. Important parts are the device #,
    914  * and the console priority. Values are CN_DEAD (don't touch me),
    915  * CN_NORMAL (I'm here, but elsewhere might be better), CN_INTERNAL
    916  * (the video, better than CN_NORMAL), and CN_REMOTE (pick me!)
    917  *
    918  * As the mac's a bit different, we do extra work here. We mainly check
    919  * to see if we have serial echo going on. Also chould check for default
    920  * speeds.
    921  */
    922 
    923 /*
    924  * Polled input char.
    925  */
    926 int
    927 zs_getc(v)
    928 	void *v;
    929 {
    930 	register volatile struct zschan *zc = v;
    931 	register int s, c, rr0;
    932 
    933 	s = splhigh();
    934 	/* Wait for a character to arrive. */
    935 	do {
    936 		rr0 = in8(&zc->zc_csr);
    937 		ZS_DELAY();
    938 	} while ((rr0 & ZSRR0_RX_READY) == 0);
    939 
    940 	c = in8(&zc->zc_data);
    941 	ZS_DELAY();
    942 	splx(s);
    943 
    944 	/*
    945 	 * This is used by the kd driver to read scan codes,
    946 	 * so don't translate '\r' ==> '\n' here...
    947 	 */
    948 	return (c);
    949 }
    950 
    951 /*
    952  * Polled output char.
    953  */
    954 void
    955 zs_putc(v, c)
    956 	void *v;
    957 	int c;
    958 {
    959 	register volatile struct zschan *zc = v;
    960 	register int s, rr0;
    961 	register long wait = 0;
    962 
    963 	s = splhigh();
    964 	/* Wait for transmitter to become ready. */
    965 	do {
    966 		rr0 = in8(&zc->zc_csr);
    967 		ZS_DELAY();
    968 	} while (((rr0 & ZSRR0_TX_READY) == 0) && (wait++ < 1000000));
    969 
    970 	if ((rr0 & ZSRR0_TX_READY) != 0) {
    971 		out8(&zc->zc_data, c);
    972 		ZS_DELAY();
    973 	}
    974 	splx(s);
    975 }
    976 
    977 
    978 /*
    979  * Polled console input putchar.
    980  */
    981 int
    982 zscngetc(dev)
    983 	dev_t dev;
    984 {
    985 	register volatile struct zschan *zc = zs_conschan;
    986 	register int c;
    987 
    988 	if (zc) {
    989 		c = zs_getc((void *)zc);
    990 	} else {
    991 		char ch = 0;
    992 		OF_read(stdin, &ch, 1);
    993 		c = ch;
    994 	}
    995 	return c;
    996 }
    997 
    998 /*
    999  * Polled console output putchar.
   1000  */
   1001 void
   1002 zscnputc(dev, c)
   1003 	dev_t dev;
   1004 	int c;
   1005 {
   1006 	register volatile struct zschan *zc = zs_conschan;
   1007 
   1008 	if (zc) {
   1009 		zs_putc((void *)zc, c);
   1010 	} else {
   1011 		char ch = c;
   1012 		OF_write(stdout, &ch, 1);
   1013 	}
   1014 }
   1015 
   1016 /*
   1017  * Handle user request to enter kernel debugger.
   1018  */
   1019 void
   1020 zs_abort(cs)
   1021 	struct zs_chanstate *cs;
   1022 {
   1023 	volatile struct zschan *zc = zs_conschan;
   1024 	int rr0;
   1025 	register long wait = 0;
   1026 
   1027 	if (zs_cons_canabort == 0)
   1028 		return;
   1029 
   1030 	/* Wait for end of break to avoid PROM abort. */
   1031 	do {
   1032 		rr0 = in8(&zc->zc_csr);
   1033 		ZS_DELAY();
   1034 	} while ((rr0 & ZSRR0_BREAK) && (wait++ < ZSABORT_DELAY));
   1035 
   1036 	if (wait > ZSABORT_DELAY) {
   1037 		zs_cons_canabort = 0;
   1038 	/* If we time out, turn off the abort ability! */
   1039 	}
   1040 
   1041 #if defined(KGDB)
   1042 	kgdb_connect(1);
   1043 #elif defined(DDB)
   1044 	Debugger();
   1045 #endif
   1046 }
   1047 
   1048 extern int ofccngetc __P((dev_t));
   1049 extern void ofccnputc __P((dev_t, int));
   1050 
   1051 struct consdev consdev_zs = {
   1052 	zscnprobe,
   1053 	zscninit,
   1054 	zscngetc,
   1055 	zscnputc,
   1056 	zscnpollc,
   1057 	NULL,
   1058 };
   1059 
   1060 void
   1061 zscnprobe(cp)
   1062 	struct consdev *cp;
   1063 {
   1064 	int chosen, pkg;
   1065 	int unit = 0;
   1066 	char name[16];
   1067 	extern const struct cdevsw zstty_cdevsw;
   1068 
   1069 	if ((chosen = OF_finddevice("/chosen")) == -1)
   1070 		return;
   1071 
   1072 	if (OF_getprop(chosen, "stdin", &stdin, sizeof(stdin)) == -1)
   1073 		return;
   1074 	if (OF_getprop(chosen, "stdout", &stdout, sizeof(stdout)) == -1)
   1075 		return;
   1076 
   1077 	if ((pkg = OF_instance_to_package(stdin)) == -1)
   1078 		return;
   1079 
   1080 	memset(name, 0, sizeof(name));
   1081 	if (OF_getprop(pkg, "device_type", name, sizeof(name)) == -1)
   1082 		return;
   1083 
   1084 	if (strcmp(name, "serial") != 0)
   1085 		return;
   1086 
   1087 	memset(name, 0, sizeof(name));
   1088 	if (OF_getprop(pkg, "name", name, sizeof(name)) == -1)
   1089 		return;
   1090 
   1091 	if (strcmp(name, "ch-b") == 0)
   1092 		unit = 1;
   1093 
   1094 	cp->cn_dev = makedev(cdevsw_lookup_major(&zstty_cdevsw), unit);
   1095 	cp->cn_pri = CN_REMOTE;
   1096 }
   1097 
   1098 void
   1099 zscninit(cp)
   1100 	struct consdev *cp;
   1101 {
   1102 	int escc, escc_ch, obio, zs_offset;
   1103 	int ch = 0;
   1104 	u_int32_t reg[5];
   1105 	char name[16];
   1106 
   1107 	if ((escc_ch = OF_instance_to_package(stdin)) == -1)
   1108 		return;
   1109 
   1110 	memset(name, 0, sizeof(name));
   1111 	if (OF_getprop(escc_ch, "name", name, sizeof(name)) == -1)
   1112 		return;
   1113 
   1114 	if (strcmp(name, "ch-b") == 0)
   1115 		ch = 1;
   1116 
   1117 	if (OF_getprop(escc_ch, "reg", reg, sizeof(reg)) < 4)
   1118 		return;
   1119 	zs_offset = reg[0];
   1120 
   1121 	escc = OF_parent(escc_ch);
   1122 	obio = OF_parent(escc);
   1123 
   1124 	if (OF_getprop(obio, "assigned-addresses", reg, sizeof(reg)) < 12)
   1125 		return;
   1126 	zs_conschan = (void *)(reg[2] + zs_offset);
   1127 
   1128 	zs_hwflags[0][ch] = ZS_HWFLAG_CONSOLE;
   1129 }
   1130