zs.c revision 1.25 1 /* $NetBSD: zs.c,v 1.25 2003/01/28 12:35:32 pk Exp $ */
2
3 /*
4 * Copyright (c) 1996, 1998 Bill Studenmund
5 * Copyright (c) 1995 Gordon W. Ross
6 * All rights reserved.
7 *
8 * Redistribution and use in source and binary forms, with or without
9 * modification, are permitted provided that the following conditions
10 * are met:
11 * 1. Redistributions of source code must retain the above copyright
12 * notice, this list of conditions and the following disclaimer.
13 * 2. Redistributions in binary form must reproduce the above copyright
14 * notice, this list of conditions and the following disclaimer in the
15 * documentation and/or other materials provided with the distribution.
16 * 3. The name of the author may not be used to endorse or promote products
17 * derived from this software without specific prior written permission.
18 * 4. All advertising materials mentioning features or use of this software
19 * must display the following acknowledgement:
20 * This product includes software developed by Gordon Ross
21 *
22 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
23 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
24 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
25 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
26 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
27 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
28 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
29 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
30 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
31 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
32 */
33
34 /*
35 * Zilog Z8530 Dual UART driver (machine-dependent part)
36 *
37 * Runs two serial lines per chip using slave drivers.
38 * Plain tty/async lines use the zs_async slave.
39 * Sun keyboard/mouse uses the zs_kbd/zs_ms slaves.
40 * Other ports use their own mice & keyboard slaves.
41 *
42 * Credits & history:
43 *
44 * With NetBSD 1.1, port-mac68k started using a port of the port-sparc
45 * (port-sun3?) zs.c driver (which was in turn based on code in the
46 * Berkeley 4.4 Lite release). Bill Studenmund did the port, with
47 * help from Allen Briggs and Gordon Ross <gwr (at) netbsd.org>. Noud de
48 * Brouwer field-tested the driver at a local ISP.
49 *
50 * Bill Studenmund and Gordon Ross then ported the machine-independant
51 * z8530 driver to work with port-mac68k. NetBSD 1.2 contained an
52 * intermediate version (mac68k using a local, patched version of
53 * the m.i. drivers), with NetBSD 1.3 containing a full version.
54 */
55
56 #include "opt_ddb.h"
57 #include "opt_kgdb.h"
58
59 #include <sys/param.h>
60 #include <sys/systm.h>
61 #include <sys/proc.h>
62 #include <sys/device.h>
63 #include <sys/conf.h>
64 #include <sys/file.h>
65 #include <sys/ioctl.h>
66 #include <sys/tty.h>
67 #include <sys/time.h>
68 #include <sys/kernel.h>
69 #include <sys/syslog.h>
70 #ifdef KGDB
71 #include <sys/kgdb.h>
72 #endif
73
74 #include <dev/cons.h>
75 #include <dev/ofw/openfirm.h>
76 #include <dev/ic/z8530reg.h>
77
78 #include <machine/z8530var.h>
79 #include <machine/autoconf.h>
80 #include <machine/cpu.h>
81 #include <machine/pio.h>
82
83 /* Are these in a header file anywhere? */
84 /* Booter flags interface */
85 #define ZSMAC_RAW 0x01
86 #define ZSMAC_LOCALTALK 0x02
87
88 #include "zsc.h" /* get the # of zs chips defined */
89
90 /*
91 * Some warts needed by z8530tty.c -
92 */
93 int zs_def_cflag = (CREAD | CS8 | HUPCL);
94
95 /*
96 * abort detection on console will now timeout after iterating on a loop
97 * the following # of times. Cheep hack. Also, abort detection is turned
98 * off after a timeout (i.e. maybe there's not a terminal hooked up).
99 */
100 #define ZSABORT_DELAY 3000000
101
102 struct zsdevice {
103 /* Yes, they are backwards. */
104 struct zschan zs_chan_b;
105 struct zschan zs_chan_a;
106 };
107
108 /* Flags from cninit() */
109 static int zs_hwflags[NZSC][2];
110 /* Default speed for each channel */
111 static int zs_defspeed[NZSC][2] = {
112 { 38400, /* tty00 */
113 38400 }, /* tty01 */
114 };
115
116 /* console stuff */
117 void *zs_conschan = 0;
118 #ifdef ZS_CONSOLE_ABORT
119 int zs_cons_canabort = 1;
120 #else
121 int zs_cons_canabort = 0;
122 #endif /* ZS_CONSOLE_ABORT*/
123
124 /* device to which the console is attached--if serial. */
125 /* Mac stuff */
126
127 static int zs_get_speed __P((struct zs_chanstate *));
128
129 /*
130 * Even though zsparam will set up the clock multiples, etc., we
131 * still set them here as: 1) mice & keyboards don't use zsparam,
132 * and 2) the console stuff uses these defaults before device
133 * attach.
134 */
135
136 static u_char zs_init_reg[16] = {
137 0, /* 0: CMD (reset, etc.) */
138 0, /* 1: No interrupts yet. */
139 0, /* IVECT */
140 ZSWR3_RX_8 | ZSWR3_RX_ENABLE,
141 ZSWR4_CLK_X16 | ZSWR4_ONESB | ZSWR4_EVENP,
142 ZSWR5_TX_8 | ZSWR5_TX_ENABLE,
143 0, /* 6: TXSYNC/SYNCLO */
144 0, /* 7: RXSYNC/SYNCHI */
145 0, /* 8: alias for data port */
146 ZSWR9_MASTER_IE,
147 0, /*10: Misc. TX/RX control bits */
148 ZSWR11_TXCLK_BAUD | ZSWR11_RXCLK_BAUD,
149 ((PCLK/32)/38400)-2, /*12: BAUDLO (default=38400) */
150 0, /*13: BAUDHI (default=38400) */
151 ZSWR14_BAUD_ENA,
152 ZSWR15_BREAK_IE,
153 };
154
155 /****************************************************************
156 * Autoconfig
157 ****************************************************************/
158
159 /* Definition of the driver for autoconfig. */
160 static int zsc_match __P((struct device *, struct cfdata *, void *));
161 static void zsc_attach __P((struct device *, struct device *, void *));
162 static int zsc_print __P((void *, const char *name));
163
164 CFATTACH_DECL(zsc, sizeof(struct zsc_softc),
165 zsc_match, zsc_attach, NULL, NULL);
166
167 extern struct cfdriver zsc_cd;
168
169 int zshard __P((void *));
170 int zssoft __P((void *));
171 #ifdef ZS_TXDMA
172 static int zs_txdma_int __P((void *));
173 #endif
174
175 void zscnprobe __P((struct consdev *));
176 void zscninit __P((struct consdev *));
177 int zscngetc __P((dev_t));
178 void zscnputc __P((dev_t, int));
179 void zscnpollc __P((dev_t, int));
180
181 /*
182 * Is the zs chip present?
183 */
184 static int
185 zsc_match(parent, cf, aux)
186 struct device *parent;
187 struct cfdata *cf;
188 void *aux;
189 {
190 struct confargs *ca = aux;
191 int unit = cf->cf_unit;
192
193 if (strcmp(ca->ca_name, "escc") != 0)
194 return 0;
195
196 if (unit > 1)
197 return 0;
198
199 return 1;
200 }
201
202 /*
203 * Attach a found zs.
204 *
205 * Match slave number to zs unit number, so that misconfiguration will
206 * not set up the keyboard as ttya, etc.
207 */
208 static void
209 zsc_attach(parent, self, aux)
210 struct device *parent;
211 struct device *self;
212 void *aux;
213 {
214 struct zsc_softc *zsc = (void *)self;
215 struct confargs *ca = aux;
216 struct zsc_attach_args zsc_args;
217 volatile struct zschan *zc;
218 struct xzs_chanstate *xcs;
219 struct zs_chanstate *cs;
220 struct zsdevice *zsd;
221 int zsc_unit, channel;
222 int s, chip, theflags;
223 int node, intr[2][3];
224 u_int regs[6];
225
226 chip = 0;
227 zsc_unit = zsc->zsc_dev.dv_unit;
228
229 ca->ca_reg[0] += ca->ca_baseaddr;
230 zsd = mapiodev(ca->ca_reg[0], ca->ca_reg[1]);
231
232 node = OF_child(ca->ca_node); /* ch-a */
233
234 for (channel = 0; channel < 2; channel++) {
235 if (OF_getprop(node, "AAPL,interrupts",
236 intr[channel], sizeof(intr[0])) == -1 &&
237 OF_getprop(node, "interrupts",
238 intr[channel], sizeof(intr[0])) == -1) {
239 printf(": cannot find interrupt property\n");
240 return;
241 }
242
243 if (OF_getprop(node, "reg", regs, sizeof(regs)) < 24) {
244 printf(": cannot find reg property\n");
245 return;
246 }
247 regs[2] += ca->ca_baseaddr;
248 regs[4] += ca->ca_baseaddr;
249 #ifdef ZS_TXDMA
250 zsc->zsc_txdmareg[channel] = mapiodev(regs[2], regs[3]);
251 zsc->zsc_txdmacmd[channel] =
252 dbdma_alloc(sizeof(dbdma_command_t) * 3);
253 memset(zsc->zsc_txdmacmd[channel], 0,
254 sizeof(dbdma_command_t) * 3);
255 dbdma_reset(zsc->zsc_txdmareg[channel]);
256 #endif
257 node = OF_peer(node); /* ch-b */
258 }
259
260 printf(": irq %d,%d\n", intr[0][0], intr[1][0]);
261
262 /*
263 * Initialize software state for each channel.
264 */
265 for (channel = 0; channel < 2; channel++) {
266 zsc_args.channel = channel;
267 zsc_args.hwflags = zs_hwflags[zsc_unit][channel];
268 xcs = &zsc->xzsc_xcs_store[channel];
269 cs = &xcs->xzs_cs;
270 zsc->zsc_cs[channel] = cs;
271
272 simple_lock_init(&cs->cs_lock);
273 cs->cs_channel = channel;
274 cs->cs_private = NULL;
275 cs->cs_ops = &zsops_null;
276
277 zc = (channel == 0) ? &zsd->zs_chan_a : &zsd->zs_chan_b;
278
279 cs->cs_reg_csr = &zc->zc_csr;
280 cs->cs_reg_data = &zc->zc_data;
281
282 memcpy(cs->cs_creg, zs_init_reg, 16);
283 memcpy(cs->cs_preg, zs_init_reg, 16);
284
285 /* Current BAUD rate generator clock. */
286 cs->cs_brg_clk = PCLK / 16; /* RTxC is 230400*16, so use 230400 */
287 if (zsc_args.hwflags & ZS_HWFLAG_CONSOLE)
288 cs->cs_defspeed = zs_get_speed(cs);
289 else
290 cs->cs_defspeed = zs_defspeed[zsc_unit][channel];
291 cs->cs_defcflag = zs_def_cflag;
292
293 /* Make these correspond to cs_defcflag (-crtscts) */
294 cs->cs_rr0_dcd = ZSRR0_DCD;
295 cs->cs_rr0_cts = 0;
296 cs->cs_wr5_dtr = ZSWR5_DTR;
297 cs->cs_wr5_rts = 0;
298
299 #ifdef __notyet__
300 cs->cs_slave_type = ZS_SLAVE_NONE;
301 #endif
302
303 /* Define BAUD rate stuff. */
304 xcs->cs_clocks[0].clk = PCLK;
305 xcs->cs_clocks[0].flags = ZSC_RTXBRG | ZSC_RTXDIV;
306 xcs->cs_clocks[1].flags =
307 ZSC_RTXBRG | ZSC_RTXDIV | ZSC_VARIABLE | ZSC_EXTERN;
308 xcs->cs_clocks[2].flags = ZSC_TRXDIV | ZSC_VARIABLE;
309 xcs->cs_clock_count = 3;
310 if (channel == 0) {
311 theflags = 0; /*mac68k_machine.modem_flags;*/
312 /*xcs->cs_clocks[1].clk = mac68k_machine.modem_dcd_clk;*/
313 /*xcs->cs_clocks[2].clk = mac68k_machine.modem_cts_clk;*/
314 xcs->cs_clocks[1].clk = 0;
315 xcs->cs_clocks[2].clk = 0;
316 } else {
317 theflags = 0; /*mac68k_machine.print_flags;*/
318 xcs->cs_clocks[1].flags = ZSC_VARIABLE;
319 /*
320 * Yes, we aren't defining ANY clock source enables for the
321 * printer's DCD clock in. The hardware won't let us
322 * use it. But a clock will freak out the chip, so we
323 * let you set it, telling us to bar interrupts on the line.
324 */
325 /*xcs->cs_clocks[1].clk = mac68k_machine.print_dcd_clk;*/
326 /*xcs->cs_clocks[2].clk = mac68k_machine.print_cts_clk;*/
327 xcs->cs_clocks[1].clk = 0;
328 xcs->cs_clocks[2].clk = 0;
329 }
330 if (xcs->cs_clocks[1].clk)
331 zsc_args.hwflags |= ZS_HWFLAG_NO_DCD;
332 if (xcs->cs_clocks[2].clk)
333 zsc_args.hwflags |= ZS_HWFLAG_NO_CTS;
334
335 /* Set defaults in our "extended" chanstate. */
336 xcs->cs_csource = 0;
337 xcs->cs_psource = 0;
338 xcs->cs_cclk_flag = 0; /* Nothing fancy by default */
339 xcs->cs_pclk_flag = 0;
340
341 if (theflags & ZSMAC_RAW) {
342 zsc_args.hwflags |= ZS_HWFLAG_RAW;
343 printf(" (raw defaults)");
344 }
345
346 /*
347 * XXX - This might be better done with a "stub" driver
348 * (to replace zstty) that ignores LocalTalk for now.
349 */
350 if (theflags & ZSMAC_LOCALTALK) {
351 printf(" shielding from LocalTalk");
352 cs->cs_defspeed = 1;
353 cs->cs_creg[ZSRR_BAUDLO] = cs->cs_preg[ZSRR_BAUDLO] = 0xff;
354 cs->cs_creg[ZSRR_BAUDHI] = cs->cs_preg[ZSRR_BAUDHI] = 0xff;
355 zs_write_reg(cs, ZSRR_BAUDLO, 0xff);
356 zs_write_reg(cs, ZSRR_BAUDHI, 0xff);
357 /*
358 * If we might have LocalTalk, then make sure we have the
359 * Baud rate low-enough to not do any damage.
360 */
361 }
362
363 /*
364 * We used to disable chip interrupts here, but we now
365 * do that in zscnprobe, just in case MacOS left the chip on.
366 */
367
368 xcs->cs_chip = chip;
369
370 /* Stash away a copy of the final H/W flags. */
371 xcs->cs_hwflags = zsc_args.hwflags;
372
373 /*
374 * Look for a child driver for this channel.
375 * The child attach will setup the hardware.
376 */
377 if (!config_found(self, (void *)&zsc_args, zsc_print)) {
378 /* No sub-driver. Just reset it. */
379 u_char reset = (channel == 0) ?
380 ZSWR9_A_RESET : ZSWR9_B_RESET;
381 s = splzs();
382 zs_write_reg(cs, 9, reset);
383 splx(s);
384 }
385 }
386
387 /* XXX - Now safe to install interrupt handlers. */
388 intr_establish(intr[0][0], IST_LEVEL, IPL_TTY, zshard, NULL);
389 intr_establish(intr[1][0], IST_LEVEL, IPL_TTY, zshard, NULL);
390 #ifdef ZS_TXDMA
391 intr_establish(intr[0][1], IST_LEVEL, IPL_TTY, zs_txdma_int, (void *)0);
392 intr_establish(intr[1][1], IST_LEVEL, IPL_TTY, zs_txdma_int, (void *)1);
393 #endif
394
395 /*
396 * Set the master interrupt enable and interrupt vector.
397 * (common to both channels, do it on A)
398 */
399 cs = zsc->zsc_cs[0];
400 s = splzs();
401 /* interrupt vector */
402 zs_write_reg(cs, 2, zs_init_reg[2]);
403 /* master interrupt control (enable) */
404 zs_write_reg(cs, 9, zs_init_reg[9]);
405 splx(s);
406 }
407
408 static int
409 zsc_print(aux, name)
410 void *aux;
411 const char *name;
412 {
413 struct zsc_attach_args *args = aux;
414
415 if (name != NULL)
416 aprint_normal("%s: ", name);
417
418 if (args->channel != -1)
419 aprint_normal(" channel %d", args->channel);
420
421 return UNCONF;
422 }
423
424 int
425 zsmdioctl(cs, cmd, data)
426 struct zs_chanstate *cs;
427 u_long cmd;
428 caddr_t data;
429 {
430 switch (cmd) {
431 default:
432 return (EPASSTHROUGH);
433 }
434 return (0);
435 }
436
437 void
438 zsmd_setclock(cs)
439 struct zs_chanstate *cs;
440 {
441 #ifdef NOTYET
442 struct xzs_chanstate *xcs = (void *)cs;
443
444 if (cs->cs_channel != 0)
445 return;
446
447 /*
448 * If the new clock has the external bit set, then select the
449 * external source.
450 */
451 via_set_modem((xcs->cs_pclk_flag & ZSC_EXTERN) ? 1 : 0);
452 #endif
453 }
454
455 static int zssoftpending;
456
457 /*
458 * Our ZS chips all share a common, autovectored interrupt,
459 * so we have to look at all of them on each interrupt.
460 */
461 int
462 zshard(arg)
463 void *arg;
464 {
465 register struct zsc_softc *zsc;
466 register int unit, rval;
467
468 rval = 0;
469 for (unit = 0; unit < zsc_cd.cd_ndevs; unit++) {
470 zsc = zsc_cd.cd_devs[unit];
471 if (zsc == NULL)
472 continue;
473 rval |= zsc_intr_hard(zsc);
474 if ((zsc->zsc_cs[0]->cs_softreq) ||
475 (zsc->zsc_cs[1]->cs_softreq))
476 {
477 /* zsc_req_softint(zsc); */
478 /* We are at splzs here, so no need to lock. */
479 if (zssoftpending == 0) {
480 zssoftpending = 1;
481 setsoftserial();
482 }
483 }
484 }
485 return (rval);
486 }
487
488 /*
489 * Similar scheme as for zshard (look at all of them)
490 */
491 int
492 zssoft(arg)
493 void *arg;
494 {
495 register struct zsc_softc *zsc;
496 register int unit;
497
498 /* This is not the only ISR on this IPL. */
499 if (zssoftpending == 0)
500 return (0);
501
502 /*
503 * The soft intr. bit will be set by zshard only if
504 * the variable zssoftpending is zero.
505 */
506 zssoftpending = 0;
507
508 for (unit = 0; unit < zsc_cd.cd_ndevs; ++unit) {
509 zsc = zsc_cd.cd_devs[unit];
510 if (zsc == NULL)
511 continue;
512 (void) zsc_intr_soft(zsc);
513 }
514 return (1);
515 }
516
517 #ifdef ZS_TXDMA
518 int
519 zs_txdma_int(arg)
520 void *arg;
521 {
522 int ch = (int)arg;
523 struct zsc_softc *zsc;
524 struct zs_chanstate *cs;
525 int unit = 0; /* XXX */
526 extern int zstty_txdma_int();
527
528 zsc = zsc_cd.cd_devs[unit];
529 if (zsc == NULL)
530 panic("zs_txdma_int");
531
532 cs = zsc->zsc_cs[ch];
533 zstty_txdma_int(cs);
534
535 if (cs->cs_softreq) {
536 if (zssoftpending == 0) {
537 zssoftpending = 1;
538 setsoftserial();
539 }
540 }
541 return 1;
542 }
543
544 void
545 zs_dma_setup(cs, pa, len)
546 struct zs_chanstate *cs;
547 caddr_t pa;
548 int len;
549 {
550 struct zsc_softc *zsc;
551 dbdma_command_t *cmdp;
552 int ch = cs->cs_channel;
553
554 zsc = zsc_cd.cd_devs[ch];
555 cmdp = zsc->zsc_txdmacmd[ch];
556
557 DBDMA_BUILD(cmdp, DBDMA_CMD_OUT_LAST, 0, len, kvtop(pa),
558 DBDMA_INT_ALWAYS, DBDMA_WAIT_NEVER, DBDMA_BRANCH_NEVER);
559 cmdp++;
560 DBDMA_BUILD(cmdp, DBDMA_CMD_STOP, 0, 0, 0,
561 DBDMA_INT_NEVER, DBDMA_WAIT_NEVER, DBDMA_BRANCH_NEVER);
562
563 __asm __volatile("eieio");
564
565 dbdma_start(zsc->zsc_txdmareg[ch], zsc->zsc_txdmacmd[ch]);
566 }
567 #endif
568
569 /*
570 * Compute the current baud rate given a ZS channel.
571 * XXX Assume internal BRG.
572 */
573 int
574 zs_get_speed(cs)
575 struct zs_chanstate *cs;
576 {
577 int tconst;
578
579 tconst = zs_read_reg(cs, 12);
580 tconst |= zs_read_reg(cs, 13) << 8;
581 return TCONST_TO_BPS(cs->cs_brg_clk, tconst);
582 }
583
584 #ifndef ZS_TOLERANCE
585 #define ZS_TOLERANCE 51
586 /* 5% in tenths of a %, plus 1 so that exactly 5% will be ok. */
587 #endif
588
589 /*
590 * Search through the signal sources in the channel, and
591 * pick the best one for the baud rate requested. Return
592 * a -1 if not achievable in tolerance. Otherwise return 0
593 * and fill in the values.
594 *
595 * This routine draws inspiration from the Atari port's zs.c
596 * driver in NetBSD 1.1 which did the same type of source switching.
597 * Tolerance code inspired by comspeed routine in isa/com.c.
598 *
599 * By Bill Studenmund, 1996-05-12
600 */
601 int
602 zs_set_speed(cs, bps)
603 struct zs_chanstate *cs;
604 int bps; /* bits per second */
605 {
606 struct xzs_chanstate *xcs = (void *) cs;
607 int i, tc, tc0 = 0, tc1, s, sf = 0;
608 int src, rate0, rate1, err, tol;
609
610 if (bps == 0)
611 return (0);
612
613 src = -1; /* no valid source yet */
614 tol = ZS_TOLERANCE;
615
616 /*
617 * Step through all the sources and see which one matches
618 * the best. A source has to match BETTER than tol to be chosen.
619 * Thus if two sources give the same error, the first one will be
620 * chosen. Also, allow for the possability that one source might run
621 * both the BRG and the direct divider (i.e. RTxC).
622 */
623 for (i = 0; i < xcs->cs_clock_count; i++) {
624 if (xcs->cs_clocks[i].clk <= 0)
625 continue; /* skip non-existent or bad clocks */
626 if (xcs->cs_clocks[i].flags & ZSC_BRG) {
627 /* check out BRG at /16 */
628 tc1 = BPS_TO_TCONST(xcs->cs_clocks[i].clk >> 4, bps);
629 if (tc1 >= 0) {
630 rate1 = TCONST_TO_BPS(xcs->cs_clocks[i].clk >> 4, tc1);
631 err = abs(((rate1 - bps)*1000)/bps);
632 if (err < tol) {
633 tol = err;
634 src = i;
635 sf = xcs->cs_clocks[i].flags & ~ZSC_DIV;
636 tc0 = tc1;
637 rate0 = rate1;
638 }
639 }
640 }
641 if (xcs->cs_clocks[i].flags & ZSC_DIV) {
642 /*
643 * Check out either /1, /16, /32, or /64
644 * Note: for /1, you'd better be using a synchronized
645 * clock!
646 */
647 int b0 = xcs->cs_clocks[i].clk, e0 = abs(b0-bps);
648 int b1 = b0 >> 4, e1 = abs(b1-bps);
649 int b2 = b1 >> 1, e2 = abs(b2-bps);
650 int b3 = b2 >> 1, e3 = abs(b3-bps);
651
652 if (e0 < e1 && e0 < e2 && e0 < e3) {
653 err = e0;
654 rate1 = b0;
655 tc1 = ZSWR4_CLK_X1;
656 } else if (e0 > e1 && e1 < e2 && e1 < e3) {
657 err = e1;
658 rate1 = b1;
659 tc1 = ZSWR4_CLK_X16;
660 } else if (e0 > e2 && e1 > e2 && e2 < e3) {
661 err = e2;
662 rate1 = b2;
663 tc1 = ZSWR4_CLK_X32;
664 } else {
665 err = e3;
666 rate1 = b3;
667 tc1 = ZSWR4_CLK_X64;
668 }
669
670 err = (err * 1000)/bps;
671 if (err < tol) {
672 tol = err;
673 src = i;
674 sf = xcs->cs_clocks[i].flags & ~ZSC_BRG;
675 tc0 = tc1;
676 rate0 = rate1;
677 }
678 }
679 }
680 #ifdef ZSMACDEBUG
681 zsprintf("Checking for rate %d. Found source #%d.\n",bps, src);
682 #endif
683 if (src == -1)
684 return (EINVAL); /* no can do */
685
686 /*
687 * The M.I. layer likes to keep cs_brg_clk current, even though
688 * we are the only ones who should be touching the BRG's rate.
689 *
690 * Note: we are assuming that any ZSC_EXTERN signal source comes in
691 * on the RTxC pin. Correct for the mac68k obio zsc.
692 */
693 if (sf & ZSC_EXTERN)
694 cs->cs_brg_clk = xcs->cs_clocks[i].clk >> 4;
695 else
696 cs->cs_brg_clk = PCLK / 16;
697
698 /*
699 * Now we have a source, so set it up.
700 */
701 s = splzs();
702 xcs->cs_psource = src;
703 xcs->cs_pclk_flag = sf;
704 bps = rate0;
705 if (sf & ZSC_BRG) {
706 cs->cs_preg[4] = ZSWR4_CLK_X16;
707 cs->cs_preg[11]= ZSWR11_RXCLK_BAUD | ZSWR11_TXCLK_BAUD;
708 if (sf & ZSC_PCLK) {
709 cs->cs_preg[14] = ZSWR14_BAUD_ENA | ZSWR14_BAUD_FROM_PCLK;
710 } else {
711 cs->cs_preg[14] = ZSWR14_BAUD_ENA;
712 }
713 tc = tc0;
714 } else {
715 cs->cs_preg[4] = tc0;
716 if (sf & ZSC_RTXDIV) {
717 cs->cs_preg[11] = ZSWR11_RXCLK_RTXC | ZSWR11_TXCLK_RTXC;
718 } else {
719 cs->cs_preg[11] = ZSWR11_RXCLK_TRXC | ZSWR11_TXCLK_TRXC;
720 }
721 cs->cs_preg[14]= 0;
722 tc = 0xffff;
723 }
724 /* Set the BAUD rate divisor. */
725 cs->cs_preg[12] = tc;
726 cs->cs_preg[13] = tc >> 8;
727 splx(s);
728
729 #ifdef ZSMACDEBUG
730 zsprintf("Rate is %7d, tc is %7d, source no. %2d, flags %4x\n", \
731 bps, tc, src, sf);
732 zsprintf("Registers are: 4 %x, 11 %x, 14 %x\n\n",
733 cs->cs_preg[4], cs->cs_preg[11], cs->cs_preg[14]);
734 #endif
735
736 cs->cs_preg[5] |= ZSWR5_RTS; /* Make sure the drivers are on! */
737
738 /* Caller will stuff the pending registers. */
739 return (0);
740 }
741
742 int
743 zs_set_modes(cs, cflag)
744 struct zs_chanstate *cs;
745 int cflag; /* bits per second */
746 {
747 struct xzs_chanstate *xcs = (void*)cs;
748 int s;
749
750 /*
751 * Make sure we don't enable hfc on a signal line we're ignoring.
752 * As we enable CTS interrupts only if we have CRTSCTS or CDTRCTS,
753 * this code also effectivly turns off ZSWR15_CTS_IE.
754 *
755 * Also, disable DCD interrupts if we've been told to ignore
756 * the DCD pin. Happens on mac68k because the input line for
757 * DCD can also be used as a clock input. (Just set CLOCAL.)
758 *
759 * If someone tries to turn an invalid flow mode on, Just Say No
760 * (Suggested by gwr)
761 */
762 if ((cflag & CDTRCTS) && (cflag & (CRTSCTS | MDMBUF)))
763 return (EINVAL);
764 if (xcs->cs_hwflags & ZS_HWFLAG_NO_DCD) {
765 if (cflag & MDMBUF)
766 return (EINVAL);
767 cflag |= CLOCAL;
768 }
769 if ((xcs->cs_hwflags & ZS_HWFLAG_NO_CTS) && (cflag & (CRTSCTS | CDTRCTS)))
770 return (EINVAL);
771
772 /*
773 * Output hardware flow control on the chip is horrendous:
774 * if carrier detect drops, the receiver is disabled, and if
775 * CTS drops, the transmitter is stoped IN MID CHARACTER!
776 * Therefore, NEVER set the HFC bit, and instead use the
777 * status interrupt to detect CTS changes.
778 */
779 s = splzs();
780 if ((cflag & (CLOCAL | MDMBUF)) != 0)
781 cs->cs_rr0_dcd = 0;
782 else
783 cs->cs_rr0_dcd = ZSRR0_DCD;
784 /*
785 * The mac hardware only has one output, DTR (HSKo in Mac
786 * parlance). In HFC mode, we use it for the functions
787 * typically served by RTS and DTR on other ports, so we
788 * have to fake the upper layer out some.
789 *
790 * CRTSCTS we use CTS as an input which tells us when to shut up.
791 * We make no effort to shut up the other side of the connection.
792 * DTR is used to hang up the modem.
793 *
794 * In CDTRCTS, we use CTS to tell us to stop, but we use DTR to
795 * shut up the other side.
796 */
797 if ((cflag & CRTSCTS) != 0) {
798 cs->cs_wr5_dtr = ZSWR5_DTR;
799 cs->cs_wr5_rts = 0;
800 cs->cs_rr0_cts = ZSRR0_CTS;
801 } else if ((cflag & CDTRCTS) != 0) {
802 cs->cs_wr5_dtr = 0;
803 cs->cs_wr5_rts = ZSWR5_DTR;
804 cs->cs_rr0_cts = ZSRR0_CTS;
805 } else if ((cflag & MDMBUF) != 0) {
806 cs->cs_wr5_dtr = 0;
807 cs->cs_wr5_rts = ZSWR5_DTR;
808 cs->cs_rr0_cts = ZSRR0_DCD;
809 } else {
810 cs->cs_wr5_dtr = ZSWR5_DTR;
811 cs->cs_wr5_rts = 0;
812 cs->cs_rr0_cts = 0;
813 }
814 splx(s);
815
816 /* Caller will stuff the pending registers. */
817 return (0);
818 }
819
820
821 /*
822 * Read or write the chip with suitable delays.
823 * MacII hardware has the delay built in.
824 * No need for extra delay. :-) However, some clock-chirped
825 * macs, or zsc's on serial add-on boards might need it.
826 */
827 #define ZS_DELAY()
828
829 u_char
830 zs_read_reg(cs, reg)
831 struct zs_chanstate *cs;
832 u_char reg;
833 {
834 u_char val;
835
836 out8(cs->cs_reg_csr, reg);
837 ZS_DELAY();
838 val = in8(cs->cs_reg_csr);
839 ZS_DELAY();
840 return val;
841 }
842
843 void
844 zs_write_reg(cs, reg, val)
845 struct zs_chanstate *cs;
846 u_char reg, val;
847 {
848 out8(cs->cs_reg_csr, reg);
849 ZS_DELAY();
850 out8(cs->cs_reg_csr, val);
851 ZS_DELAY();
852 }
853
854 u_char zs_read_csr(cs)
855 struct zs_chanstate *cs;
856 {
857 register u_char val;
858
859 val = in8(cs->cs_reg_csr);
860 ZS_DELAY();
861 /* make up for the fact CTS is wired backwards */
862 val ^= ZSRR0_CTS;
863 return val;
864 }
865
866 void zs_write_csr(cs, val)
867 struct zs_chanstate *cs;
868 u_char val;
869 {
870 /* Note, the csr does not write CTS... */
871 out8(cs->cs_reg_csr, val);
872 ZS_DELAY();
873 }
874
875 u_char zs_read_data(cs)
876 struct zs_chanstate *cs;
877 {
878 register u_char val;
879
880 val = in8(cs->cs_reg_data);
881 ZS_DELAY();
882 return val;
883 }
884
885 void zs_write_data(cs, val)
886 struct zs_chanstate *cs;
887 u_char val;
888 {
889 out8(cs->cs_reg_data, val);
890 ZS_DELAY();
891 }
892
893 /****************************************************************
894 * Console support functions (powermac specific!)
895 * Note: this code is allowed to know about the layout of
896 * the chip registers, and uses that to keep things simple.
897 * XXX - I think I like the mvme167 code better. -gwr
898 * XXX - Well :-P :-) -wrs
899 ****************************************************************/
900
901 #define zscnpollc nullcnpollc
902 cons_decl(zs);
903
904 static int stdin, stdout;
905
906 /*
907 * Console functions.
908 */
909
910 /*
911 * zscnprobe is the routine which gets called as the kernel is trying to
912 * figure out where the console should be. Each io driver which might
913 * be the console (as defined in mac68k/conf.c) gets probed. The probe
914 * fills in the consdev structure. Important parts are the device #,
915 * and the console priority. Values are CN_DEAD (don't touch me),
916 * CN_NORMAL (I'm here, but elsewhere might be better), CN_INTERNAL
917 * (the video, better than CN_NORMAL), and CN_REMOTE (pick me!)
918 *
919 * As the mac's a bit different, we do extra work here. We mainly check
920 * to see if we have serial echo going on. Also chould check for default
921 * speeds.
922 */
923
924 /*
925 * Polled input char.
926 */
927 int
928 zs_getc(v)
929 void *v;
930 {
931 register volatile struct zschan *zc = v;
932 register int s, c, rr0;
933
934 s = splhigh();
935 /* Wait for a character to arrive. */
936 do {
937 rr0 = in8(&zc->zc_csr);
938 ZS_DELAY();
939 } while ((rr0 & ZSRR0_RX_READY) == 0);
940
941 c = in8(&zc->zc_data);
942 ZS_DELAY();
943 splx(s);
944
945 /*
946 * This is used by the kd driver to read scan codes,
947 * so don't translate '\r' ==> '\n' here...
948 */
949 return (c);
950 }
951
952 /*
953 * Polled output char.
954 */
955 void
956 zs_putc(v, c)
957 void *v;
958 int c;
959 {
960 register volatile struct zschan *zc = v;
961 register int s, rr0;
962 register long wait = 0;
963
964 s = splhigh();
965 /* Wait for transmitter to become ready. */
966 do {
967 rr0 = in8(&zc->zc_csr);
968 ZS_DELAY();
969 } while (((rr0 & ZSRR0_TX_READY) == 0) && (wait++ < 1000000));
970
971 if ((rr0 & ZSRR0_TX_READY) != 0) {
972 out8(&zc->zc_data, c);
973 ZS_DELAY();
974 }
975 splx(s);
976 }
977
978
979 /*
980 * Polled console input putchar.
981 */
982 int
983 zscngetc(dev)
984 dev_t dev;
985 {
986 register volatile struct zschan *zc = zs_conschan;
987 register int c;
988
989 if (zc) {
990 c = zs_getc((void *)zc);
991 } else {
992 char ch = 0;
993 OF_read(stdin, &ch, 1);
994 c = ch;
995 }
996 return c;
997 }
998
999 /*
1000 * Polled console output putchar.
1001 */
1002 void
1003 zscnputc(dev, c)
1004 dev_t dev;
1005 int c;
1006 {
1007 register volatile struct zschan *zc = zs_conschan;
1008
1009 if (zc) {
1010 zs_putc((void *)zc, c);
1011 } else {
1012 char ch = c;
1013 OF_write(stdout, &ch, 1);
1014 }
1015 }
1016
1017 /*
1018 * Handle user request to enter kernel debugger.
1019 */
1020 void
1021 zs_abort(cs)
1022 struct zs_chanstate *cs;
1023 {
1024 volatile struct zschan *zc = zs_conschan;
1025 int rr0;
1026 register long wait = 0;
1027
1028 if (zs_cons_canabort == 0)
1029 return;
1030
1031 /* Wait for end of break to avoid PROM abort. */
1032 do {
1033 rr0 = in8(&zc->zc_csr);
1034 ZS_DELAY();
1035 } while ((rr0 & ZSRR0_BREAK) && (wait++ < ZSABORT_DELAY));
1036
1037 if (wait > ZSABORT_DELAY) {
1038 zs_cons_canabort = 0;
1039 /* If we time out, turn off the abort ability! */
1040 }
1041
1042 #if defined(KGDB)
1043 kgdb_connect(1);
1044 #elif defined(DDB)
1045 Debugger();
1046 #endif
1047 }
1048
1049 extern int ofccngetc __P((dev_t));
1050 extern void ofccnputc __P((dev_t, int));
1051
1052 struct consdev consdev_zs = {
1053 zscnprobe,
1054 zscninit,
1055 zscngetc,
1056 zscnputc,
1057 zscnpollc,
1058 NULL,
1059 };
1060
1061 void
1062 zscnprobe(cp)
1063 struct consdev *cp;
1064 {
1065 int chosen, pkg;
1066 int unit = 0;
1067 char name[16];
1068 extern const struct cdevsw zstty_cdevsw;
1069
1070 if ((chosen = OF_finddevice("/chosen")) == -1)
1071 return;
1072
1073 if (OF_getprop(chosen, "stdin", &stdin, sizeof(stdin)) == -1)
1074 return;
1075 if (OF_getprop(chosen, "stdout", &stdout, sizeof(stdout)) == -1)
1076 return;
1077
1078 if ((pkg = OF_instance_to_package(stdin)) == -1)
1079 return;
1080
1081 memset(name, 0, sizeof(name));
1082 if (OF_getprop(pkg, "device_type", name, sizeof(name)) == -1)
1083 return;
1084
1085 if (strcmp(name, "serial") != 0)
1086 return;
1087
1088 memset(name, 0, sizeof(name));
1089 if (OF_getprop(pkg, "name", name, sizeof(name)) == -1)
1090 return;
1091
1092 if (strcmp(name, "ch-b") == 0)
1093 unit = 1;
1094
1095 cp->cn_dev = makedev(cdevsw_lookup_major(&zstty_cdevsw), unit);
1096 cp->cn_pri = CN_REMOTE;
1097 }
1098
1099 void
1100 zscninit(cp)
1101 struct consdev *cp;
1102 {
1103 int escc, escc_ch, obio, zs_offset;
1104 int ch = 0;
1105 u_int32_t reg[5];
1106 char name[16];
1107
1108 if ((escc_ch = OF_instance_to_package(stdin)) == -1)
1109 return;
1110
1111 memset(name, 0, sizeof(name));
1112 if (OF_getprop(escc_ch, "name", name, sizeof(name)) == -1)
1113 return;
1114
1115 if (strcmp(name, "ch-b") == 0)
1116 ch = 1;
1117
1118 if (OF_getprop(escc_ch, "reg", reg, sizeof(reg)) < 4)
1119 return;
1120 zs_offset = reg[0];
1121
1122 escc = OF_parent(escc_ch);
1123 obio = OF_parent(escc);
1124
1125 if (OF_getprop(obio, "assigned-addresses", reg, sizeof(reg)) < 12)
1126 return;
1127 zs_conschan = (void *)(reg[2] + zs_offset);
1128
1129 zs_hwflags[0][ch] = ZS_HWFLAG_CONSOLE;
1130 }
1131