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zs.c revision 1.38
      1 /*	$NetBSD: zs.c,v 1.38 2006/11/02 19:41:34 tsutsui Exp $	*/
      2 
      3 /*
      4  * Copyright (c) 1996, 1998 Bill Studenmund
      5  * Copyright (c) 1995 Gordon W. Ross
      6  * All rights reserved.
      7  *
      8  * Redistribution and use in source and binary forms, with or without
      9  * modification, are permitted provided that the following conditions
     10  * are met:
     11  * 1. Redistributions of source code must retain the above copyright
     12  *    notice, this list of conditions and the following disclaimer.
     13  * 2. Redistributions in binary form must reproduce the above copyright
     14  *    notice, this list of conditions and the following disclaimer in the
     15  *    documentation and/or other materials provided with the distribution.
     16  * 3. The name of the author may not be used to endorse or promote products
     17  *    derived from this software without specific prior written permission.
     18  * 4. All advertising materials mentioning features or use of this software
     19  *    must display the following acknowledgement:
     20  *      This product includes software developed by Gordon Ross
     21  *
     22  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
     23  * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
     24  * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
     25  * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
     26  * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
     27  * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
     28  * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
     29  * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
     30  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
     31  * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
     32  */
     33 
     34 /*
     35  * Zilog Z8530 Dual UART driver (machine-dependent part)
     36  *
     37  * Runs two serial lines per chip using slave drivers.
     38  * Plain tty/async lines use the zs_async slave.
     39  * Sun keyboard/mouse uses the zs_kbd/zs_ms slaves.
     40  * Other ports use their own mice & keyboard slaves.
     41  *
     42  * Credits & history:
     43  *
     44  * With NetBSD 1.1, port-mac68k started using a port of the port-sparc
     45  * (port-sun3?) zs.c driver (which was in turn based on code in the
     46  * Berkeley 4.4 Lite release). Bill Studenmund did the port, with
     47  * help from Allen Briggs and Gordon Ross <gwr (at) NetBSD.org>. Noud de
     48  * Brouwer field-tested the driver at a local ISP.
     49  *
     50  * Bill Studenmund and Gordon Ross then ported the machine-independant
     51  * z8530 driver to work with port-mac68k. NetBSD 1.2 contained an
     52  * intermediate version (mac68k using a local, patched version of
     53  * the m.i. drivers), with NetBSD 1.3 containing a full version.
     54  */
     55 
     56 #include <sys/cdefs.h>
     57 __KERNEL_RCSID(0, "$NetBSD: zs.c,v 1.38 2006/11/02 19:41:34 tsutsui Exp $");
     58 
     59 #include "opt_ddb.h"
     60 #include "opt_kgdb.h"
     61 
     62 #include <sys/param.h>
     63 #include <sys/systm.h>
     64 #include <sys/proc.h>
     65 #include <sys/device.h>
     66 #include <sys/conf.h>
     67 #include <sys/file.h>
     68 #include <sys/ioctl.h>
     69 #include <sys/tty.h>
     70 #include <sys/time.h>
     71 #include <sys/kernel.h>
     72 #include <sys/syslog.h>
     73 #ifdef KGDB
     74 #include <sys/kgdb.h>
     75 #endif
     76 
     77 #include <dev/cons.h>
     78 #include <dev/ofw/openfirm.h>
     79 #include <dev/ic/z8530reg.h>
     80 
     81 #include <machine/z8530var.h>
     82 #include <machine/autoconf.h>
     83 #include <machine/cpu.h>
     84 #include <machine/pio.h>
     85 
     86 /* Are these in a header file anywhere? */
     87 /* Booter flags interface */
     88 #define ZSMAC_RAW	0x01
     89 #define ZSMAC_LOCALTALK	0x02
     90 
     91 /*
     92  * Some warts needed by z8530tty.c -
     93  */
     94 int zs_def_cflag = (CREAD | CS8 | HUPCL);
     95 
     96 /*
     97  * abort detection on console will now timeout after iterating on a loop
     98  * the following # of times. Cheep hack. Also, abort detection is turned
     99  * off after a timeout (i.e. maybe there's not a terminal hooked up).
    100  */
    101 #define ZSABORT_DELAY 3000000
    102 
    103 struct zsdevice {
    104 	/* Yes, they are backwards. */
    105 	struct	zschan zs_chan_b;
    106 	struct	zschan zs_chan_a;
    107 };
    108 
    109 static int zs_defspeed[2] = {
    110 	38400,		/* ttyZ0 */
    111 	38400,		/* ttyZ1 */
    112 };
    113 
    114 /* console stuff */
    115 void	*zs_conschan = 0;
    116 int	zs_conschannel = -1;
    117 #ifdef	ZS_CONSOLE_ABORT
    118 int	zs_cons_canabort = 1;
    119 #else
    120 int	zs_cons_canabort = 0;
    121 #endif /* ZS_CONSOLE_ABORT*/
    122 
    123 /* device to which the console is attached--if serial. */
    124 /* Mac stuff */
    125 
    126 static int zs_get_speed(struct zs_chanstate *);
    127 
    128 /*
    129  * Even though zsparam will set up the clock multiples, etc., we
    130  * still set them here as: 1) mice & keyboards don't use zsparam,
    131  * and 2) the console stuff uses these defaults before device
    132  * attach.
    133  */
    134 
    135 static u_char zs_init_reg[16] = {
    136 	0,	/* 0: CMD (reset, etc.) */
    137 	0,	/* 1: No interrupts yet. */
    138 	0,	/* IVECT */
    139 	ZSWR3_RX_8 | ZSWR3_RX_ENABLE,
    140 	ZSWR4_CLK_X16 | ZSWR4_ONESB | ZSWR4_EVENP,
    141 	ZSWR5_TX_8 | ZSWR5_TX_ENABLE,
    142 	0,	/* 6: TXSYNC/SYNCLO */
    143 	0,	/* 7: RXSYNC/SYNCHI */
    144 	0,	/* 8: alias for data port */
    145 	ZSWR9_MASTER_IE,
    146 	0,	/*10: Misc. TX/RX control bits */
    147 	ZSWR11_TXCLK_BAUD | ZSWR11_RXCLK_BAUD,
    148 	((PCLK/32)/38400)-2,	/*12: BAUDLO (default=38400) */
    149 	0,			/*13: BAUDHI (default=38400) */
    150 	ZSWR14_BAUD_ENA,
    151 	ZSWR15_BREAK_IE,
    152 };
    153 
    154 /****************************************************************
    155  * Autoconfig
    156  ****************************************************************/
    157 
    158 /* Definition of the driver for autoconfig. */
    159 static int	zsc_match(struct device *, struct cfdata *, void *);
    160 static void	zsc_attach(struct device *, struct device *, void *);
    161 static int	zsc_print(void *, const char *);
    162 
    163 CFATTACH_DECL(zsc, sizeof(struct zsc_softc),
    164     zsc_match, zsc_attach, NULL, NULL);
    165 
    166 extern struct cfdriver zsc_cd;
    167 
    168 int zsc_attached;
    169 
    170 int zshard(void *);
    171 int zssoft(void *);
    172 #ifdef ZS_TXDMA
    173 static int zs_txdma_int(void *);
    174 #endif
    175 
    176 void zscnprobe(struct consdev *);
    177 void zscninit(struct consdev *);
    178 int  zscngetc(dev_t);
    179 void zscnputc(dev_t, int);
    180 void zscnpollc(dev_t, int);
    181 
    182 /*
    183  * Is the zs chip present?
    184  */
    185 static int
    186 zsc_match(struct device *parent, struct cfdata *cf, void *aux)
    187 {
    188 	struct confargs *ca = aux;
    189 
    190 	if (strcmp(ca->ca_name, "escc") != 0)
    191 		return 0;
    192 
    193 	if (zsc_attached)
    194 		return 0;
    195 
    196 	return 1;
    197 }
    198 
    199 /*
    200  * Attach a found zs.
    201  *
    202  * Match slave number to zs unit number, so that misconfiguration will
    203  * not set up the keyboard as ttya, etc.
    204  */
    205 static void
    206 zsc_attach(struct device *parent, struct device *self, void *aux)
    207 {
    208 	struct zsc_softc *zsc = (void *)self;
    209 	struct confargs *ca = aux;
    210 	struct zsc_attach_args zsc_args;
    211 	volatile struct zschan *zc;
    212 	struct xzs_chanstate *xcs;
    213 	struct zs_chanstate *cs;
    214 	struct zsdevice *zsd;
    215 	int channel;
    216 	int s, chip, theflags;
    217 	int node, intr[2][3];
    218 	u_int regs[6];
    219 
    220 	zsc_attached = 1;
    221 
    222 	chip = 0;
    223 	ca->ca_reg[0] += ca->ca_baseaddr;
    224 	zsd = mapiodev(ca->ca_reg[0], ca->ca_reg[1]);
    225 
    226 	node = OF_child(ca->ca_node);	/* ch-a */
    227 
    228 	for (channel = 0; channel < 2; channel++) {
    229 		if (OF_getprop(node, "AAPL,interrupts",
    230 			       intr[channel], sizeof(intr[0])) == -1 &&
    231 		    OF_getprop(node, "interrupts",
    232 			       intr[channel], sizeof(intr[0])) == -1) {
    233 			printf(": cannot find interrupt property\n");
    234 			return;
    235 		}
    236 
    237 		if (OF_getprop(node, "reg", regs, sizeof(regs)) < 24) {
    238 			printf(": cannot find reg property\n");
    239 			return;
    240 		}
    241 		regs[2] += ca->ca_baseaddr;
    242 		regs[4] += ca->ca_baseaddr;
    243 #ifdef ZS_TXDMA
    244 		zsc->zsc_txdmareg[channel] = mapiodev(regs[2], regs[3]);
    245 		zsc->zsc_txdmacmd[channel] =
    246 			dbdma_alloc(sizeof(dbdma_command_t) * 3);
    247 		memset(zsc->zsc_txdmacmd[channel], 0,
    248 			sizeof(dbdma_command_t) * 3);
    249 		dbdma_reset(zsc->zsc_txdmareg[channel]);
    250 #endif
    251 		node = OF_peer(node);	/* ch-b */
    252 	}
    253 
    254 	printf(": irq %d,%d\n", intr[0][0], intr[1][0]);
    255 
    256 	/*
    257 	 * Initialize software state for each channel.
    258 	 */
    259 	for (channel = 0; channel < 2; channel++) {
    260 		zsc_args.channel = channel;
    261 		zsc_args.hwflags = (channel == zs_conschannel ?
    262 				    ZS_HWFLAG_CONSOLE : 0);
    263 		xcs = &zsc->xzsc_xcs_store[channel];
    264 		cs  = &xcs->xzs_cs;
    265 		zsc->zsc_cs[channel] = cs;
    266 
    267 		simple_lock_init(&cs->cs_lock);
    268 		cs->cs_channel = channel;
    269 		cs->cs_private = NULL;
    270 		cs->cs_ops = &zsops_null;
    271 
    272 		zc = (channel == 0) ? &zsd->zs_chan_a : &zsd->zs_chan_b;
    273 
    274 		cs->cs_reg_csr  = &zc->zc_csr;
    275 		cs->cs_reg_data = &zc->zc_data;
    276 
    277 		memcpy(cs->cs_creg, zs_init_reg, 16);
    278 		memcpy(cs->cs_preg, zs_init_reg, 16);
    279 
    280 		/* Current BAUD rate generator clock. */
    281 		cs->cs_brg_clk = PCLK / 16;	/* RTxC is 230400*16, so use 230400 */
    282 		if (zsc_args.hwflags & ZS_HWFLAG_CONSOLE)
    283 			cs->cs_defspeed = zs_get_speed(cs);
    284 		else
    285 			cs->cs_defspeed = zs_defspeed[channel];
    286 		cs->cs_defcflag = zs_def_cflag;
    287 
    288 		/* Make these correspond to cs_defcflag (-crtscts) */
    289 		cs->cs_rr0_dcd = ZSRR0_DCD;
    290 		cs->cs_rr0_cts = 0;
    291 		cs->cs_wr5_dtr = ZSWR5_DTR;
    292 		cs->cs_wr5_rts = 0;
    293 
    294 #ifdef __notyet__
    295 		cs->cs_slave_type = ZS_SLAVE_NONE;
    296 #endif
    297 
    298 		/* Define BAUD rate stuff. */
    299 		xcs->cs_clocks[0].clk = PCLK;
    300 		xcs->cs_clocks[0].flags = ZSC_RTXBRG | ZSC_RTXDIV;
    301 		xcs->cs_clocks[1].flags =
    302 			ZSC_RTXBRG | ZSC_RTXDIV | ZSC_VARIABLE | ZSC_EXTERN;
    303 		xcs->cs_clocks[2].flags = ZSC_TRXDIV | ZSC_VARIABLE;
    304 		xcs->cs_clock_count = 3;
    305 		if (channel == 0) {
    306 			theflags = 0; /*mac68k_machine.modem_flags;*/
    307 			/*xcs->cs_clocks[1].clk = mac68k_machine.modem_dcd_clk;*/
    308 			/*xcs->cs_clocks[2].clk = mac68k_machine.modem_cts_clk;*/
    309 			xcs->cs_clocks[1].clk = 0;
    310 			xcs->cs_clocks[2].clk = 0;
    311 		} else {
    312 			theflags = 0; /*mac68k_machine.print_flags;*/
    313 			xcs->cs_clocks[1].flags = ZSC_VARIABLE;
    314 			/*
    315 			 * Yes, we aren't defining ANY clock source enables for the
    316 			 * printer's DCD clock in. The hardware won't let us
    317 			 * use it. But a clock will freak out the chip, so we
    318 			 * let you set it, telling us to bar interrupts on the line.
    319 			 */
    320 			/*xcs->cs_clocks[1].clk = mac68k_machine.print_dcd_clk;*/
    321 			/*xcs->cs_clocks[2].clk = mac68k_machine.print_cts_clk;*/
    322 			xcs->cs_clocks[1].clk = 0;
    323 			xcs->cs_clocks[2].clk = 0;
    324 		}
    325 		if (xcs->cs_clocks[1].clk)
    326 			zsc_args.hwflags |= ZS_HWFLAG_NO_DCD;
    327 		if (xcs->cs_clocks[2].clk)
    328 			zsc_args.hwflags |= ZS_HWFLAG_NO_CTS;
    329 
    330 		/* Set defaults in our "extended" chanstate. */
    331 		xcs->cs_csource = 0;
    332 		xcs->cs_psource = 0;
    333 		xcs->cs_cclk_flag = 0;  /* Nothing fancy by default */
    334 		xcs->cs_pclk_flag = 0;
    335 
    336 		if (theflags & ZSMAC_RAW) {
    337 			zsc_args.hwflags |= ZS_HWFLAG_RAW;
    338 			printf(" (raw defaults)");
    339 		}
    340 
    341 		/*
    342 		 * XXX - This might be better done with a "stub" driver
    343 		 * (to replace zstty) that ignores LocalTalk for now.
    344 		 */
    345 		if (theflags & ZSMAC_LOCALTALK) {
    346 			printf(" shielding from LocalTalk");
    347 			cs->cs_defspeed = 1;
    348 			cs->cs_creg[ZSRR_BAUDLO] = cs->cs_preg[ZSRR_BAUDLO] = 0xff;
    349 			cs->cs_creg[ZSRR_BAUDHI] = cs->cs_preg[ZSRR_BAUDHI] = 0xff;
    350 			zs_write_reg(cs, ZSRR_BAUDLO, 0xff);
    351 			zs_write_reg(cs, ZSRR_BAUDHI, 0xff);
    352 			/*
    353 			 * If we might have LocalTalk, then make sure we have the
    354 			 * Baud rate low-enough to not do any damage.
    355 			 */
    356 		}
    357 
    358 		/*
    359 		 * We used to disable chip interrupts here, but we now
    360 		 * do that in zscnprobe, just in case MacOS left the chip on.
    361 		 */
    362 
    363 		xcs->cs_chip = chip;
    364 
    365 		/* Stash away a copy of the final H/W flags. */
    366 		xcs->cs_hwflags = zsc_args.hwflags;
    367 
    368 		/*
    369 		 * Look for a child driver for this channel.
    370 		 * The child attach will setup the hardware.
    371 		 */
    372 		if (!config_found(self, (void *)&zsc_args, zsc_print)) {
    373 			/* No sub-driver.  Just reset it. */
    374 			u_char reset = (channel == 0) ?
    375 				ZSWR9_A_RESET : ZSWR9_B_RESET;
    376 			s = splzs();
    377 			zs_write_reg(cs, 9, reset);
    378 			splx(s);
    379 		}
    380 	}
    381 
    382 	/* XXX - Now safe to install interrupt handlers. */
    383 	intr_establish(intr[0][0], IST_LEVEL, IPL_TTY, zshard, NULL);
    384 	intr_establish(intr[1][0], IST_LEVEL, IPL_TTY, zshard, NULL);
    385 #ifdef ZS_TXDMA
    386 	intr_establish(intr[0][1], IST_LEVEL, IPL_TTY, zs_txdma_int, (void *)0);
    387 	intr_establish(intr[1][1], IST_LEVEL, IPL_TTY, zs_txdma_int, (void *)1);
    388 #endif
    389 
    390 	zsc->zsc_si = softintr_establish(IPL_SOFTSERIAL,
    391 		(void (*)(void *)) zsc_intr_soft, zsc);
    392 
    393 	/*
    394 	 * Set the master interrupt enable and interrupt vector.
    395 	 * (common to both channels, do it on A)
    396 	 */
    397 	cs = zsc->zsc_cs[0];
    398 	s = splzs();
    399 	/* interrupt vector */
    400 	zs_write_reg(cs, 2, zs_init_reg[2]);
    401 	/* master interrupt control (enable) */
    402 	zs_write_reg(cs, 9, zs_init_reg[9]);
    403 	splx(s);
    404 }
    405 
    406 static int
    407 zsc_print(void *aux, const char *name)
    408 {
    409 	struct zsc_attach_args *args = aux;
    410 
    411 	if (name != NULL)
    412 		aprint_normal("%s: ", name);
    413 
    414 	if (args->channel != -1)
    415 		aprint_normal(" channel %d", args->channel);
    416 
    417 	return UNCONF;
    418 }
    419 
    420 int
    421 zsmdioctl(struct zs_chanstate *cs, u_long cmd, caddr_t data)
    422 {
    423 	switch (cmd) {
    424 	default:
    425 		return (EPASSTHROUGH);
    426 	}
    427 	return (0);
    428 }
    429 
    430 void
    431 zsmd_setclock(struct zs_chanstate *cs)
    432 {
    433 #ifdef NOTYET
    434 	struct xzs_chanstate *xcs = (void *)cs;
    435 
    436 	if (cs->cs_channel != 0)
    437 		return;
    438 
    439 	/*
    440 	 * If the new clock has the external bit set, then select the
    441 	 * external source.
    442 	 */
    443 	via_set_modem((xcs->cs_pclk_flag & ZSC_EXTERN) ? 1 : 0);
    444 #endif
    445 }
    446 
    447 /*
    448  * Our ZS chips all share a common, autovectored interrupt,
    449  * so we have to look at all of them on each interrupt.
    450  */
    451 int
    452 zshard(void *arg)
    453 {
    454 	struct zsc_softc *zsc;
    455 	int unit, rval;
    456 
    457 	rval = 0;
    458 	for (unit = 0; unit < zsc_cd.cd_ndevs; unit++) {
    459 		zsc = zsc_cd.cd_devs[unit];
    460 		if (zsc == NULL)
    461 			continue;
    462 		rval |= zsc_intr_hard(zsc);
    463 		if ((zsc->zsc_cs[0]->cs_softreq) ||
    464 		    (zsc->zsc_cs[1]->cs_softreq))
    465 			softintr_schedule(zsc->zsc_si);
    466 	}
    467 	return (rval);
    468 }
    469 
    470 #ifdef ZS_TXDMA
    471 int
    472 zs_txdma_int(void *arg)
    473 {
    474 	int ch = (int)arg;
    475 	struct zsc_softc *zsc;
    476 	struct zs_chanstate *cs;
    477 	int unit = 0;			/* XXX */
    478 
    479 	zsc = zsc_cd.cd_devs[unit];
    480 	if (zsc == NULL)
    481 		panic("zs_txdma_int");
    482 
    483 	cs = zsc->zsc_cs[ch];
    484 	zstty_txdma_int(cs);
    485 
    486 	if (cs->cs_softreq)
    487 		softintr_schedule(zsc->zsc_si);
    488 
    489 	return 1;
    490 }
    491 
    492 void
    493 zs_dma_setup(struct zs_chanstate *cs, caddr_t pa, int len)
    494 {
    495 	struct zsc_softc *zsc;
    496 	dbdma_command_t *cmdp;
    497 	int ch = cs->cs_channel;
    498 
    499 	zsc = zsc_cd.cd_devs[ch];
    500 	cmdp = zsc->zsc_txdmacmd[ch];
    501 
    502 	DBDMA_BUILD(cmdp, DBDMA_CMD_OUT_LAST, 0, len, kvtop(pa),
    503 		DBDMA_INT_ALWAYS, DBDMA_WAIT_NEVER, DBDMA_BRANCH_NEVER);
    504 	cmdp++;
    505 	DBDMA_BUILD(cmdp, DBDMA_CMD_STOP, 0, 0, 0,
    506 		DBDMA_INT_NEVER, DBDMA_WAIT_NEVER, DBDMA_BRANCH_NEVER);
    507 
    508 	__asm volatile("eieio");
    509 
    510 	dbdma_start(zsc->zsc_txdmareg[ch], zsc->zsc_txdmacmd[ch]);
    511 }
    512 #endif
    513 
    514 /*
    515  * Compute the current baud rate given a ZS channel.
    516  * XXX Assume internal BRG.
    517  */
    518 int
    519 zs_get_speed(struct zs_chanstate *cs)
    520 {
    521 	int tconst;
    522 
    523 	tconst = zs_read_reg(cs, 12);
    524 	tconst |= zs_read_reg(cs, 13) << 8;
    525 	return TCONST_TO_BPS(cs->cs_brg_clk, tconst);
    526 }
    527 
    528 #ifndef ZS_TOLERANCE
    529 #define ZS_TOLERANCE 51
    530 /* 5% in tenths of a %, plus 1 so that exactly 5% will be ok. */
    531 #endif
    532 
    533 /*
    534  * Search through the signal sources in the channel, and
    535  * pick the best one for the baud rate requested. Return
    536  * a -1 if not achievable in tolerance. Otherwise return 0
    537  * and fill in the values.
    538  *
    539  * This routine draws inspiration from the Atari port's zs.c
    540  * driver in NetBSD 1.1 which did the same type of source switching.
    541  * Tolerance code inspired by comspeed routine in isa/com.c.
    542  *
    543  * By Bill Studenmund, 1996-05-12
    544  */
    545 int
    546 zs_set_speed(struct zs_chanstate *cs, int bps)
    547 {
    548 	struct xzs_chanstate *xcs = (void *) cs;
    549 	int i, tc, tc0 = 0, tc1, s, sf = 0;
    550 	int src, rate0, rate1, err, tol;
    551 
    552 	if (bps == 0)
    553 		return (0);
    554 
    555 	src = -1;		/* no valid source yet */
    556 	tol = ZS_TOLERANCE;
    557 
    558 	/*
    559 	 * Step through all the sources and see which one matches
    560 	 * the best. A source has to match BETTER than tol to be chosen.
    561 	 * Thus if two sources give the same error, the first one will be
    562 	 * chosen. Also, allow for the possability that one source might run
    563 	 * both the BRG and the direct divider (i.e. RTxC).
    564 	 */
    565 	for (i = 0; i < xcs->cs_clock_count; i++) {
    566 		if (xcs->cs_clocks[i].clk <= 0)
    567 			continue;	/* skip non-existent or bad clocks */
    568 		if (xcs->cs_clocks[i].flags & ZSC_BRG) {
    569 			/* check out BRG at /16 */
    570 			tc1 = BPS_TO_TCONST(xcs->cs_clocks[i].clk >> 4, bps);
    571 			if (tc1 >= 0) {
    572 				rate1 = TCONST_TO_BPS(xcs->cs_clocks[i].clk >> 4, tc1);
    573 				err = abs(((rate1 - bps)*1000)/bps);
    574 				if (err < tol) {
    575 					tol = err;
    576 					src = i;
    577 					sf = xcs->cs_clocks[i].flags & ~ZSC_DIV;
    578 					tc0 = tc1;
    579 					rate0 = rate1;
    580 				}
    581 			}
    582 		}
    583 		if (xcs->cs_clocks[i].flags & ZSC_DIV) {
    584 			/*
    585 			 * Check out either /1, /16, /32, or /64
    586 			 * Note: for /1, you'd better be using a synchronized
    587 			 * clock!
    588 			 */
    589 			int b0 = xcs->cs_clocks[i].clk, e0 = abs(b0-bps);
    590 			int b1 = b0 >> 4, e1 = abs(b1-bps);
    591 			int b2 = b1 >> 1, e2 = abs(b2-bps);
    592 			int b3 = b2 >> 1, e3 = abs(b3-bps);
    593 
    594 			if (e0 < e1 && e0 < e2 && e0 < e3) {
    595 				err = e0;
    596 				rate1 = b0;
    597 				tc1 = ZSWR4_CLK_X1;
    598 			} else if (e0 > e1 && e1 < e2  && e1 < e3) {
    599 				err = e1;
    600 				rate1 = b1;
    601 				tc1 = ZSWR4_CLK_X16;
    602 			} else if (e0 > e2 && e1 > e2 && e2 < e3) {
    603 				err = e2;
    604 				rate1 = b2;
    605 				tc1 = ZSWR4_CLK_X32;
    606 			} else {
    607 				err = e3;
    608 				rate1 = b3;
    609 				tc1 = ZSWR4_CLK_X64;
    610 			}
    611 
    612 			err = (err * 1000)/bps;
    613 			if (err < tol) {
    614 				tol = err;
    615 				src = i;
    616 				sf = xcs->cs_clocks[i].flags & ~ZSC_BRG;
    617 				tc0 = tc1;
    618 				rate0 = rate1;
    619 			}
    620 		}
    621 	}
    622 #ifdef ZSMACDEBUG
    623 	zsprintf("Checking for rate %d. Found source #%d.\n",bps, src);
    624 #endif
    625 	if (src == -1)
    626 		return (EINVAL); /* no can do */
    627 
    628 	/*
    629 	 * The M.I. layer likes to keep cs_brg_clk current, even though
    630 	 * we are the only ones who should be touching the BRG's rate.
    631 	 *
    632 	 * Note: we are assuming that any ZSC_EXTERN signal source comes in
    633 	 * on the RTxC pin. Correct for the mac68k obio zsc.
    634 	 */
    635 	if (sf & ZSC_EXTERN)
    636 		cs->cs_brg_clk = xcs->cs_clocks[i].clk >> 4;
    637 	else
    638 		cs->cs_brg_clk = PCLK / 16;
    639 
    640 	/*
    641 	 * Now we have a source, so set it up.
    642 	 */
    643 	s = splzs();
    644 	xcs->cs_psource = src;
    645 	xcs->cs_pclk_flag = sf;
    646 	bps = rate0;
    647 	if (sf & ZSC_BRG) {
    648 		cs->cs_preg[4] = ZSWR4_CLK_X16;
    649 		cs->cs_preg[11]= ZSWR11_RXCLK_BAUD | ZSWR11_TXCLK_BAUD;
    650 		if (sf & ZSC_PCLK) {
    651 			cs->cs_preg[14] = ZSWR14_BAUD_ENA | ZSWR14_BAUD_FROM_PCLK;
    652 		} else {
    653 			cs->cs_preg[14] = ZSWR14_BAUD_ENA;
    654 		}
    655 		tc = tc0;
    656 	} else {
    657 		cs->cs_preg[4] = tc0;
    658 		if (sf & ZSC_RTXDIV) {
    659 			cs->cs_preg[11] = ZSWR11_RXCLK_RTXC | ZSWR11_TXCLK_RTXC;
    660 		} else {
    661 			cs->cs_preg[11] = ZSWR11_RXCLK_TRXC | ZSWR11_TXCLK_TRXC;
    662 		}
    663 		cs->cs_preg[14]= 0;
    664 		tc = 0xffff;
    665 	}
    666 	/* Set the BAUD rate divisor. */
    667 	cs->cs_preg[12] = tc;
    668 	cs->cs_preg[13] = tc >> 8;
    669 	splx(s);
    670 
    671 #ifdef ZSMACDEBUG
    672 	zsprintf("Rate is %7d, tc is %7d, source no. %2d, flags %4x\n", \
    673 	    bps, tc, src, sf);
    674 	zsprintf("Registers are: 4 %x, 11 %x, 14 %x\n\n",
    675 		cs->cs_preg[4], cs->cs_preg[11], cs->cs_preg[14]);
    676 #endif
    677 
    678 	cs->cs_preg[5] |= ZSWR5_RTS;	/* Make sure the drivers are on! */
    679 
    680 	/* Caller will stuff the pending registers. */
    681 	return (0);
    682 }
    683 
    684 int
    685 zs_set_modes(struct zs_chanstate *cs, int cflag)
    686 {
    687 	struct xzs_chanstate *xcs = (void*)cs;
    688 	int s;
    689 
    690 	/*
    691 	 * Make sure we don't enable hfc on a signal line we're ignoring.
    692 	 * As we enable CTS interrupts only if we have CRTSCTS or CDTRCTS,
    693 	 * this code also effectivly turns off ZSWR15_CTS_IE.
    694 	 *
    695 	 * Also, disable DCD interrupts if we've been told to ignore
    696 	 * the DCD pin. Happens on mac68k because the input line for
    697 	 * DCD can also be used as a clock input.  (Just set CLOCAL.)
    698 	 *
    699 	 * If someone tries to turn an invalid flow mode on, Just Say No
    700 	 * (Suggested by gwr)
    701 	 */
    702 	if ((cflag & CDTRCTS) && (cflag & (CRTSCTS | MDMBUF)))
    703 		return (EINVAL);
    704 	if (xcs->cs_hwflags & ZS_HWFLAG_NO_DCD) {
    705 		if (cflag & MDMBUF)
    706 			return (EINVAL);
    707 		cflag |= CLOCAL;
    708 	}
    709 	if ((xcs->cs_hwflags & ZS_HWFLAG_NO_CTS) && (cflag & (CRTSCTS | CDTRCTS)))
    710 		return (EINVAL);
    711 
    712 	/*
    713 	 * Output hardware flow control on the chip is horrendous:
    714 	 * if carrier detect drops, the receiver is disabled, and if
    715 	 * CTS drops, the transmitter is stoped IN MID CHARACTER!
    716 	 * Therefore, NEVER set the HFC bit, and instead use the
    717 	 * status interrupt to detect CTS changes.
    718 	 */
    719 	s = splzs();
    720 	if ((cflag & (CLOCAL | MDMBUF)) != 0)
    721 		cs->cs_rr0_dcd = 0;
    722 	else
    723 		cs->cs_rr0_dcd = ZSRR0_DCD;
    724 	/*
    725 	 * The mac hardware only has one output, DTR (HSKo in Mac
    726 	 * parlance). In HFC mode, we use it for the functions
    727 	 * typically served by RTS and DTR on other ports, so we
    728 	 * have to fake the upper layer out some.
    729 	 *
    730 	 * CRTSCTS we use CTS as an input which tells us when to shut up.
    731 	 * We make no effort to shut up the other side of the connection.
    732 	 * DTR is used to hang up the modem.
    733 	 *
    734 	 * In CDTRCTS, we use CTS to tell us to stop, but we use DTR to
    735 	 * shut up the other side.
    736 	 */
    737 	if ((cflag & CRTSCTS) != 0) {
    738 		cs->cs_wr5_dtr = ZSWR5_DTR;
    739 		cs->cs_wr5_rts = 0;
    740 		cs->cs_rr0_cts = ZSRR0_CTS;
    741 	} else if ((cflag & CDTRCTS) != 0) {
    742 		cs->cs_wr5_dtr = 0;
    743 		cs->cs_wr5_rts = ZSWR5_DTR;
    744 		cs->cs_rr0_cts = ZSRR0_CTS;
    745 	} else if ((cflag & MDMBUF) != 0) {
    746 		cs->cs_wr5_dtr = 0;
    747 		cs->cs_wr5_rts = ZSWR5_DTR;
    748 		cs->cs_rr0_cts = ZSRR0_DCD;
    749 	} else {
    750 		cs->cs_wr5_dtr = ZSWR5_DTR;
    751 		cs->cs_wr5_rts = 0;
    752 		cs->cs_rr0_cts = 0;
    753 	}
    754 	splx(s);
    755 
    756 	/* Caller will stuff the pending registers. */
    757 	return (0);
    758 }
    759 
    760 
    761 /*
    762  * Read or write the chip with suitable delays.
    763  * MacII hardware has the delay built in.
    764  * No need for extra delay. :-) However, some clock-chirped
    765  * macs, or zsc's on serial add-on boards might need it.
    766  */
    767 #define	ZS_DELAY()
    768 
    769 u_char
    770 zs_read_reg(struct zs_chanstate *cs, u_char reg)
    771 {
    772 	u_char val;
    773 
    774 	out8(cs->cs_reg_csr, reg);
    775 	ZS_DELAY();
    776 	val = in8(cs->cs_reg_csr);
    777 	ZS_DELAY();
    778 	return val;
    779 }
    780 
    781 void
    782 zs_write_reg(struct zs_chanstate *cs, u_char reg, u_char val)
    783 {
    784 	out8(cs->cs_reg_csr, reg);
    785 	ZS_DELAY();
    786 	out8(cs->cs_reg_csr, val);
    787 	ZS_DELAY();
    788 }
    789 
    790 u_char
    791 zs_read_csr(struct zs_chanstate *cs)
    792 {
    793 	u_char val;
    794 
    795 	val = in8(cs->cs_reg_csr);
    796 	ZS_DELAY();
    797 	/* make up for the fact CTS is wired backwards */
    798 	val ^= ZSRR0_CTS;
    799 	return val;
    800 }
    801 
    802 void
    803 zs_write_csr(struct zs_chanstate *cs, u_char val)
    804 {
    805 	/* Note, the csr does not write CTS... */
    806 	out8(cs->cs_reg_csr, val);
    807 	ZS_DELAY();
    808 }
    809 
    810 u_char
    811 zs_read_data(struct zs_chanstate *cs)
    812 {
    813 	u_char val;
    814 
    815 	val = in8(cs->cs_reg_data);
    816 	ZS_DELAY();
    817 	return val;
    818 }
    819 
    820 void
    821 zs_write_data(struct zs_chanstate *cs, u_char val)
    822 {
    823 	out8(cs->cs_reg_data, val);
    824 	ZS_DELAY();
    825 }
    826 
    827 /****************************************************************
    828  * Console support functions (powermac specific!)
    829  * Note: this code is allowed to know about the layout of
    830  * the chip registers, and uses that to keep things simple.
    831  * XXX - I think I like the mvme167 code better. -gwr
    832  * XXX - Well :-P  :-)  -wrs
    833  ****************************************************************/
    834 
    835 #define zscnpollc	nullcnpollc
    836 cons_decl(zs);
    837 
    838 static int stdin, stdout;
    839 
    840 /*
    841  * Console functions.
    842  */
    843 
    844 /*
    845  * zscnprobe is the routine which gets called as the kernel is trying to
    846  * figure out where the console should be. Each io driver which might
    847  * be the console (as defined in mac68k/conf.c) gets probed. The probe
    848  * fills in the consdev structure. Important parts are the device #,
    849  * and the console priority. Values are CN_DEAD (don't touch me),
    850  * CN_NORMAL (I'm here, but elsewhere might be better), CN_INTERNAL
    851  * (the video, better than CN_NORMAL), and CN_REMOTE (pick me!)
    852  *
    853  * As the mac's a bit different, we do extra work here. We mainly check
    854  * to see if we have serial echo going on. Also chould check for default
    855  * speeds.
    856  */
    857 
    858 /*
    859  * Polled input char.
    860  */
    861 int
    862 zs_getc(void *v)
    863 {
    864 	volatile struct zschan *zc = v;
    865 	int s, c, rr0;
    866 
    867 	s = splhigh();
    868 	/* Wait for a character to arrive. */
    869 	do {
    870 		rr0 = in8(&zc->zc_csr);
    871 		ZS_DELAY();
    872 	} while ((rr0 & ZSRR0_RX_READY) == 0);
    873 
    874 	c = in8(&zc->zc_data);
    875 	ZS_DELAY();
    876 	splx(s);
    877 
    878 	/*
    879 	 * This is used by the kd driver to read scan codes,
    880 	 * so don't translate '\r' ==> '\n' here...
    881 	 */
    882 	return (c);
    883 }
    884 
    885 /*
    886  * Polled output char.
    887  */
    888 void
    889 zs_putc(void *v, int c)
    890 {
    891 	volatile struct zschan *zc = v;
    892 	int s, rr0;
    893 	long wait = 0;
    894 
    895 	s = splhigh();
    896 	/* Wait for transmitter to become ready. */
    897 	do {
    898 		rr0 = in8(&zc->zc_csr);
    899 		ZS_DELAY();
    900 	} while (((rr0 & ZSRR0_TX_READY) == 0) && (wait++ < 1000000));
    901 
    902 	if ((rr0 & ZSRR0_TX_READY) != 0) {
    903 		out8(&zc->zc_data, c);
    904 		ZS_DELAY();
    905 	}
    906 	splx(s);
    907 }
    908 
    909 
    910 /*
    911  * Polled console input putchar.
    912  */
    913 int
    914 zscngetc(dev_t dev)
    915 {
    916 	volatile struct zschan *zc = zs_conschan;
    917 	int c;
    918 
    919 	if (zc) {
    920 		c = zs_getc(__UNVOLATILE(zc));
    921 	} else {
    922 		char ch = 0;
    923 		OF_read(stdin, &ch, 1);
    924 		c = ch;
    925 	}
    926 	return c;
    927 }
    928 
    929 /*
    930  * Polled console output putchar.
    931  */
    932 void
    933 zscnputc(dev_t dev, int c)
    934 {
    935 	volatile struct zschan *zc = zs_conschan;
    936 
    937 	if (zc) {
    938 		zs_putc(__UNVOLATILE(zc), c);
    939 	} else {
    940 		char ch = c;
    941 		OF_write(stdout, &ch, 1);
    942 	}
    943 }
    944 
    945 /*
    946  * Handle user request to enter kernel debugger.
    947  */
    948 void
    949 zs_abort(struct zs_chanstate *cs)
    950 {
    951 	volatile struct zschan *zc = zs_conschan;
    952 	int rr0;
    953 	long wait = 0;
    954 
    955 	if (zs_cons_canabort == 0)
    956 		return;
    957 
    958 	/* Wait for end of break to avoid PROM abort. */
    959 	do {
    960 		rr0 = in8(&zc->zc_csr);
    961 		ZS_DELAY();
    962 	} while ((rr0 & ZSRR0_BREAK) && (wait++ < ZSABORT_DELAY));
    963 
    964 	if (wait > ZSABORT_DELAY) {
    965 		zs_cons_canabort = 0;
    966 	/* If we time out, turn off the abort ability! */
    967 	}
    968 
    969 #if defined(KGDB)
    970 	kgdb_connect(1);
    971 #elif defined(DDB)
    972 	Debugger();
    973 #endif
    974 }
    975 
    976 extern int ofccngetc(dev_t);
    977 extern void ofccnputc(dev_t, int);
    978 
    979 struct consdev consdev_zs = {
    980 	zscnprobe,
    981 	zscninit,
    982 	zscngetc,
    983 	zscnputc,
    984 	zscnpollc,
    985 };
    986 
    987 void
    988 zscnprobe(struct consdev *cp)
    989 {
    990 	int chosen, pkg;
    991 	char name[16];
    992 
    993 	if ((chosen = OF_finddevice("/chosen")) == -1)
    994 		return;
    995 
    996 	if (OF_getprop(chosen, "stdin", &stdin, sizeof(stdin)) == -1)
    997 		return;
    998 	if (OF_getprop(chosen, "stdout", &stdout, sizeof(stdout)) == -1)
    999 		return;
   1000 
   1001 	if ((pkg = OF_instance_to_package(stdin)) == -1)
   1002 		return;
   1003 
   1004 	memset(name, 0, sizeof(name));
   1005 	if (OF_getprop(pkg, "device_type", name, sizeof(name)) == -1)
   1006 		return;
   1007 
   1008 	if (strcmp(name, "serial") != 0)
   1009 		return;
   1010 
   1011 	memset(name, 0, sizeof(name));
   1012 	if (OF_getprop(pkg, "name", name, sizeof(name)) == -1)
   1013 		return;
   1014 
   1015 	cp->cn_pri = CN_REMOTE;
   1016 }
   1017 
   1018 void
   1019 zscninit(struct consdev *cp)
   1020 {
   1021 	int escc, escc_ch, obio, zs_offset;
   1022 	u_int32_t reg[5];
   1023 	char name[16];
   1024 
   1025 	if ((escc_ch = OF_instance_to_package(stdin)) == -1)
   1026 		return;
   1027 
   1028 	memset(name, 0, sizeof(name));
   1029 	if (OF_getprop(escc_ch, "name", name, sizeof(name)) == -1)
   1030 		return;
   1031 
   1032 	zs_conschannel = strcmp(name, "ch-b") == 0;
   1033 
   1034 	if (OF_getprop(escc_ch, "reg", reg, sizeof(reg)) < 4)
   1035 		return;
   1036 	zs_offset = reg[0];
   1037 
   1038 	escc = OF_parent(escc_ch);
   1039 	obio = OF_parent(escc);
   1040 
   1041 	if (OF_getprop(obio, "assigned-addresses", reg, sizeof(reg)) < 12)
   1042 		return;
   1043 	zs_conschan = (void *)(reg[2] + zs_offset);
   1044 }
   1045