Home | History | Annotate | Line # | Download | only in include
cpu.h revision 1.4 
      1 /*	$NetBSD: cpu.h,v 1.4 1998/10/25 10:13:21 tsubai Exp $	*/
      2 
      3 /*
      4  * Copyright (C) 1995-1997 Wolfgang Solfrank.
      5  * Copyright (C) 1995-1997 TooLs GmbH.
      6  * All rights reserved.
      7  *
      8  * Redistribution and use in source and binary forms, with or without
      9  * modification, are permitted provided that the following conditions
     10  * are met:
     11  * 1. Redistributions of source code must retain the above copyright
     12  *    notice, this list of conditions and the following disclaimer.
     13  * 2. Redistributions in binary form must reproduce the above copyright
     14  *    notice, this list of conditions and the following disclaimer in the
     15  *    documentation and/or other materials provided with the distribution.
     16  * 3. All advertising materials mentioning features or use of this software
     17  *    must display the following acknowledgement:
     18  *	This product includes software developed by TooLs GmbH.
     19  * 4. The name of TooLs GmbH may not be used to endorse or promote products
     20  *    derived from this software without specific prior written permission.
     21  *
     22  * THIS SOFTWARE IS PROVIDED BY TOOLS GMBH ``AS IS'' AND ANY EXPRESS OR
     23  * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
     24  * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
     25  * IN NO EVENT SHALL TOOLS GMBH BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
     26  * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
     27  * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
     28  * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
     29  * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
     30  * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF
     31  * ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
     32  */
     33 #ifndef	_MACHINE_CPU_H_
     34 #define	_MACHINE_CPU_H_
     35 
     36 #include <machine/frame.h>
     37 #include <machine/psl.h>
     38 #include <machine/intr.h>
     39 
     40 #define	CLKF_USERMODE(frame)	(((frame)->srr1 & PSL_PR) != 0)
     41 #define	CLKF_BASEPRI(frame)	((frame)->pri == 0)
     42 #define	CLKF_PC(frame)		((frame)->srr0)
     43 #define	CLKF_INTR(frame)	((frame)->depth > 0)
     44 
     45 #define	cpu_swapout(p)
     46 #define cpu_wait(p)
     47 
     48 extern void delay __P((unsigned));
     49 #define	DELAY(n)		delay(n)
     50 
     51 extern __volatile int want_resched;
     52 extern __volatile int astpending;
     53 
     54 #define	need_resched()		(want_resched = 1, astpending = 1)
     55 #define	need_proftick(p)	((p)->p_flag |= P_OWEUPC, astpending = 1)
     56 #define	signotify(p)		(astpending = 1)
     57 
     58 #define	CACHELINESIZE	32			/* For now		XXX */
     59 
     60 extern __inline void syncicache __P((void *, int));
     61 extern __inline void flushcache __P((void *, int));
     62 
     63 extern __inline void
     64 syncicache(from, len)
     65 	void *from;
     66 	int len;
     67 {
     68 	int l, off;
     69 	char *p;
     70 
     71 	off = (int)from & (CACHELINESIZE - 1);
     72 	from -= off;
     73 	len += off;
     74 
     75 	p = from; l = len;
     76 	do {
     77 		__asm__ __volatile ("dcbst 0,%0" :: "r"(p));
     78 		p += CACHELINESIZE;
     79 	} while ((l -= CACHELINESIZE) > 0);
     80 	__asm__ __volatile ("sync");
     81 
     82 	p = from; l = len;
     83 	do {
     84 		__asm__ __volatile ("icbi 0,%0" :: "r"(p));
     85 		p += CACHELINESIZE;
     86 	} while ((l -= CACHELINESIZE) > 0);
     87 	__asm__ __volatile ("isync");
     88 }
     89 
     90 extern __inline void
     91 flushcache(from, len)
     92 	void *from;
     93 	int len;
     94 {
     95 	int l, off;
     96 	char *p;
     97 
     98 	off = (int)from & (CACHELINESIZE - 1);
     99 	from -= off;
    100 	len += off;
    101 
    102 	l = len; p = from;
    103 	do {
    104 		__asm__ __volatile ("dcbf 0,%0" :: "r"(p));
    105 		p += CACHELINESIZE;
    106 	} while ((l -= CACHELINESIZE) > 0);
    107 	__asm__ __volatile ("sync");
    108 	l = len; p = from;
    109 	do {
    110 		__asm__ __volatile ("icbi 0,%0" :: "r"(p));
    111 		p += CACHELINESIZE;
    112 	} while ((l -= CACHELINESIZE) > 0);
    113 	__asm__ __volatile ("isync");
    114 }
    115 
    116 extern char *bootpath;
    117 
    118 #endif	/* _MACHINE_CPU_H_ */
    119