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z8530var.h revision 1.3
      1 /*	$NetBSD: z8530var.h,v 1.3 1998/08/26 11:44:06 tsubai Exp $	*/
      2 
      3 /*
      4  * Copyright (c) 1994 Gordon W. Ross
      5  * Copyright (c) 1992, 1993
      6  *	The Regents of the University of California.  All rights reserved.
      7  *
      8  * This software was developed by the Computer Systems Engineering group
      9  * at Lawrence Berkeley Laboratory under DARPA contract BG 91-66 and
     10  * contributed to Berkeley.
     11  *
     12  * All advertising materials mentioning features or use of this software
     13  * must display the following acknowledgement:
     14  *	This product includes software developed by the University of
     15  *	California, Lawrence Berkeley Laboratory.
     16  *
     17  * Redistribution and use in source and binary forms, with or without
     18  * modification, are permitted provided that the following conditions
     19  * are met:
     20  * 1. Redistributions of source code must retain the above copyright
     21  *    notice, this list of conditions and the following disclaimer.
     22  * 2. Redistributions in binary form must reproduce the above copyright
     23  *    notice, this list of conditions and the following disclaimer in the
     24  *    documentation and/or other materials provided with the distribution.
     25  * 3. All advertising materials mentioning features or use of this software
     26  *    must display the following acknowledgement:
     27  *	This product includes software developed by the University of
     28  *	California, Berkeley and its contributors.
     29  * 4. Neither the name of the University nor the names of its contributors
     30  *    may be used to endorse or promote products derived from this software
     31  *    without specific prior written permission.
     32  *
     33  * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
     34  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
     35  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
     36  * ARE DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
     37  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
     38  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
     39  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
     40  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
     41  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
     42  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
     43  * SUCH DAMAGE.
     44  *
     45  *	@(#)zsvar.h	8.1 (Berkeley) 6/11/93
     46  */
     47 
     48 #include <dev/ic/z8530sc.h>
     49 #include <macppc/dev/dbdma.h>
     50 
     51 /*
     52  * Clock source info structure, added here so xzs_chanstate works
     53  */
     54 struct zsclksrc {
     55 	long    clk;    /* clock rate, in MHz, present on signal line */
     56 	int     flags;  /* Specifies how this source can be used
     57 			   (RTxC divided, RTxC BRG, PCLK BRG, TRxC divided)
     58 			   and also if the source is "external" and if it
     59 			   is changeable (by an ioctl ex.). The
     60 			   source usage flags are used by the tty
     61 			   child. The other bits tell zsloadchannelregs
     62 			   if it should call an md signal source
     63 			   changing routine. ZSC_VARIABLE says if
     64 			   an ioctl should be able to cahnge the
     65 			   clock rate.*/
     66 };
     67 #define ZSC_PCLK        0x01
     68 #define ZSC_RTXBRG      0x02
     69 #define ZSC_RTXDIV      0x04
     70 #define ZSC_TRXDIV      0x08
     71 #define ZSC_VARIABLE    0x40
     72 #define ZSC_EXTERN      0x80
     73 
     74 #define ZSC_BRG         0x03
     75 #define ZSC_DIV         0x0c
     76 
     77 
     78 /*
     79  * These are the machine-dependent (extended) variants of
     80  * struct zs_chanstate and struct zsc_softc
     81  */
     82 struct xzs_chanstate {
     83 	/* machine-independent part (First!)*/
     84 	struct zs_chanstate xzs_cs;
     85 	/* machine-dependent extensions */
     86 	int cs_hwflags;
     87 	int	cs_chip;		/* type of chip */
     88 	/* Clock source info... */
     89 	int	cs_clock_count;		/* how many signal sources available */
     90 	struct zsclksrc cs_clocks[4];	/* info on available signal sources */
     91 	long	cs_cclk_flag;		/* flag for current clock source */
     92 	long	cs_pclk_flag;		/* flag for pending clock source */
     93 	int	cs_csource;		/* current source # */
     94 	int	cs_psource;		/* pending source # */
     95 };
     96 
     97 struct zsc_softc {
     98 	struct	device zsc_dev;		/* required first: base device */
     99 	struct	zs_chanstate *zsc_cs[2];	/* channel A and B soft state */
    100 	/* Machine-dependent part follows... */
    101 	struct xzs_chanstate xzsc_xcs_store[2];
    102 	dbdma_regmap_t *zsc_txdmareg[2];
    103 	dbdma_command_t *zsc_txdmacmd[2];
    104 	/* XXX tx only, for now */
    105 };
    106 
    107 /*
    108  * Functions to read and write individual registers in a channel.
    109  * The ZS chip requires a 1.6 uSec. recovery time between accesses,
    110  * and the Sun3 hardware does NOT take care of this for you.
    111  * MacII hardware DOES dake care of the delay for us. :-)
    112  * XXX - Then these should be inline functions! -gwr
    113  * Some clock-chirped macs loose serial ports. It could be that the
    114  * hardware delay is tied to the CPU speed, and that the minimum delay
    115  * no longer's respected. For them, ZS_DELAY might help.
    116  * XXX - no one seems to want to try and check this -wrs
    117  */
    118 
    119 u_char zs_read_reg __P((struct zs_chanstate *cs, u_char reg));
    120 u_char zs_read_csr __P((struct zs_chanstate *cs));
    121 u_char zs_read_data __P((struct zs_chanstate *cs));
    122 
    123 void  zs_write_reg __P((struct zs_chanstate *cs, u_char reg, u_char val));
    124 void  zs_write_csr __P((struct zs_chanstate *cs, u_char val));
    125 void  zs_write_data __P((struct zs_chanstate *cs, u_char val));
    126 
    127 /* XXX - Could define splzs() here instead of in psl.h */
    128 #define splzs spltty
    129 
    130 /* Hook for MD ioctl support */
    131 int	zsmdioctl __P((struct zs_chanstate *cs, u_long cmd, caddr_t data));
    132 /* XXX - This is a bit gross... */
    133 #define ZS_MD_IOCTL zsmdioctl(cs, cmd, data)
    134 
    135 /* Callback for "external" clock sources */
    136 void zsmd_setclock  __P((struct zs_chanstate *cs));
    137 #define ZS_MD_SETCLK(cs) zsmd_setclock(cs)
    138