bandit.c revision 1.17.4.4 1 1.17.4.4 thorpej /* $NetBSD: bandit.c,v 1.17.4.4 2003/01/03 16:48:25 thorpej Exp $ */
2 1.17.4.2 nathanw
3 1.17.4.2 nathanw /*-
4 1.17.4.2 nathanw * Copyright (c) 2000 Tsubai Masanari. All rights reserved.
5 1.17.4.2 nathanw *
6 1.17.4.2 nathanw * Redistribution and use in source and binary forms, with or without
7 1.17.4.2 nathanw * modification, are permitted provided that the following conditions
8 1.17.4.2 nathanw * are met:
9 1.17.4.2 nathanw * 1. Redistributions of source code must retain the above copyright
10 1.17.4.2 nathanw * notice, this list of conditions and the following disclaimer.
11 1.17.4.2 nathanw * 2. Redistributions in binary form must reproduce the above copyright
12 1.17.4.2 nathanw * notice, this list of conditions and the following disclaimer in the
13 1.17.4.2 nathanw * documentation and/or other materials provided with the distribution.
14 1.17.4.2 nathanw * 3. The name of the author may not be used to endorse or promote products
15 1.17.4.2 nathanw * derived from this software without specific prior written permission.
16 1.17.4.2 nathanw *
17 1.17.4.2 nathanw * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
18 1.17.4.2 nathanw * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
19 1.17.4.2 nathanw * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
20 1.17.4.2 nathanw * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
21 1.17.4.2 nathanw * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
22 1.17.4.2 nathanw * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23 1.17.4.2 nathanw * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24 1.17.4.2 nathanw * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25 1.17.4.2 nathanw * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
26 1.17.4.2 nathanw * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27 1.17.4.2 nathanw */
28 1.17.4.2 nathanw
29 1.17.4.2 nathanw #include <sys/param.h>
30 1.17.4.2 nathanw #include <sys/device.h>
31 1.17.4.2 nathanw #include <sys/systm.h>
32 1.17.4.2 nathanw
33 1.17.4.2 nathanw #include <dev/pci/pcivar.h>
34 1.17.4.2 nathanw #include <dev/ofw/openfirm.h>
35 1.17.4.2 nathanw #include <dev/ofw/ofw_pci.h>
36 1.17.4.2 nathanw
37 1.17.4.2 nathanw #include <machine/autoconf.h>
38 1.17.4.2 nathanw
39 1.17.4.2 nathanw struct bandit_softc {
40 1.17.4.2 nathanw struct device sc_dev;
41 1.17.4.2 nathanw struct pci_bridge sc_pc;
42 1.17.4.2 nathanw };
43 1.17.4.2 nathanw
44 1.17.4.2 nathanw void bandit_attach __P((struct device *, struct device *, void *));
45 1.17.4.2 nathanw int bandit_match __P((struct device *, struct cfdata *, void *));
46 1.17.4.2 nathanw int bandit_print __P((void *, const char *));
47 1.17.4.2 nathanw
48 1.17.4.2 nathanw pcireg_t bandit_conf_read __P((pci_chipset_tag_t, pcitag_t, int));
49 1.17.4.2 nathanw void bandit_conf_write __P((pci_chipset_tag_t, pcitag_t, int, pcireg_t));
50 1.17.4.2 nathanw
51 1.17.4.2 nathanw static void bandit_init __P((struct bandit_softc *));
52 1.17.4.2 nathanw
53 1.17.4.3 nathanw CFATTACH_DECL(bandit, sizeof(struct bandit_softc),
54 1.17.4.3 nathanw bandit_match, bandit_attach, NULL, NULL);
55 1.17.4.2 nathanw
56 1.17.4.2 nathanw int
57 1.17.4.2 nathanw bandit_match(parent, cf, aux)
58 1.17.4.2 nathanw struct device *parent;
59 1.17.4.2 nathanw struct cfdata *cf;
60 1.17.4.2 nathanw void *aux;
61 1.17.4.2 nathanw {
62 1.17.4.2 nathanw struct confargs *ca = aux;
63 1.17.4.2 nathanw
64 1.17.4.2 nathanw if (strcmp(ca->ca_name, "bandit") == 0 ||
65 1.17.4.2 nathanw strcmp(ca->ca_name, "chaos") == 0)
66 1.17.4.2 nathanw return 1;
67 1.17.4.2 nathanw
68 1.17.4.2 nathanw return 0;
69 1.17.4.2 nathanw }
70 1.17.4.2 nathanw
71 1.17.4.2 nathanw void
72 1.17.4.2 nathanw bandit_attach(parent, self, aux)
73 1.17.4.2 nathanw struct device *parent, *self;
74 1.17.4.2 nathanw void *aux;
75 1.17.4.2 nathanw {
76 1.17.4.2 nathanw struct bandit_softc *sc = (void *)self;
77 1.17.4.2 nathanw pci_chipset_tag_t pc = &sc->sc_pc;
78 1.17.4.2 nathanw struct confargs *ca = aux;
79 1.17.4.2 nathanw struct pcibus_attach_args pba;
80 1.17.4.2 nathanw int len, node = ca->ca_node;
81 1.17.4.2 nathanw u_int32_t reg[2], busrange[2];
82 1.17.4.2 nathanw struct ranges {
83 1.17.4.2 nathanw u_int32_t pci_hi, pci_mid, pci_lo;
84 1.17.4.2 nathanw u_int32_t host;
85 1.17.4.2 nathanw u_int32_t size_hi, size_lo;
86 1.17.4.2 nathanw } ranges[6], *rp = ranges;
87 1.17.4.2 nathanw
88 1.17.4.2 nathanw printf("\n");
89 1.17.4.2 nathanw
90 1.17.4.2 nathanw /* Bandit address */
91 1.17.4.2 nathanw if (OF_getprop(node, "reg", reg, sizeof(reg)) < 8)
92 1.17.4.2 nathanw return;
93 1.17.4.2 nathanw
94 1.17.4.2 nathanw /* PCI bus number */
95 1.17.4.2 nathanw if (OF_getprop(node, "bus-range", busrange, sizeof(busrange)) != 8)
96 1.17.4.2 nathanw return;
97 1.17.4.2 nathanw
98 1.17.4.2 nathanw pc->node = node;
99 1.17.4.2 nathanw pc->addr = mapiodev(reg[0] + 0x800000, 4);
100 1.17.4.2 nathanw pc->data = mapiodev(reg[0] + 0xc00000, 8);
101 1.17.4.2 nathanw pc->bus = busrange[0];
102 1.17.4.2 nathanw pc->conf_read = bandit_conf_read;
103 1.17.4.2 nathanw pc->conf_write = bandit_conf_write;
104 1.17.4.2 nathanw pc->memt = (bus_space_tag_t)0;
105 1.17.4.2 nathanw
106 1.17.4.2 nathanw /* find i/o tag */
107 1.17.4.2 nathanw len = OF_getprop(node, "ranges", ranges, sizeof(ranges));
108 1.17.4.2 nathanw if (len == -1)
109 1.17.4.2 nathanw return;
110 1.17.4.2 nathanw while (len >= sizeof(ranges[0])) {
111 1.17.4.2 nathanw if ((rp->pci_hi & OFW_PCI_PHYS_HI_SPACEMASK) ==
112 1.17.4.2 nathanw OFW_PCI_PHYS_HI_SPACE_IO)
113 1.17.4.2 nathanw pc->iot = (bus_space_tag_t)rp->host;
114 1.17.4.2 nathanw len -= sizeof(ranges[0]);
115 1.17.4.2 nathanw rp++;
116 1.17.4.2 nathanw }
117 1.17.4.2 nathanw
118 1.17.4.2 nathanw bandit_init(sc);
119 1.17.4.2 nathanw
120 1.17.4.2 nathanw memset(&pba, 0, sizeof(pba));
121 1.17.4.2 nathanw pba.pba_busname = "pci";
122 1.17.4.2 nathanw pba.pba_memt = pc->memt;
123 1.17.4.2 nathanw pba.pba_iot = pc->iot;
124 1.17.4.2 nathanw pba.pba_dmat = &pci_bus_dma_tag;
125 1.17.4.2 nathanw pba.pba_bus = pc->bus;
126 1.17.4.2 nathanw pba.pba_bridgetag = NULL;
127 1.17.4.2 nathanw pba.pba_pc = pc;
128 1.17.4.2 nathanw pba.pba_flags = PCI_FLAGS_IO_ENABLED | PCI_FLAGS_MEM_ENABLED;
129 1.17.4.2 nathanw
130 1.17.4.2 nathanw config_found(self, &pba, bandit_print);
131 1.17.4.2 nathanw }
132 1.17.4.2 nathanw
133 1.17.4.2 nathanw int
134 1.17.4.2 nathanw bandit_print(aux, pnp)
135 1.17.4.2 nathanw void *aux;
136 1.17.4.2 nathanw const char *pnp;
137 1.17.4.2 nathanw {
138 1.17.4.2 nathanw struct pcibus_attach_args *pa = aux;
139 1.17.4.2 nathanw
140 1.17.4.2 nathanw if (pnp)
141 1.17.4.4 thorpej aprint_normal("%s at %s", pa->pba_busname, pnp);
142 1.17.4.4 thorpej aprint_normal(" bus %d", pa->pba_bus);
143 1.17.4.2 nathanw return UNCONF;
144 1.17.4.2 nathanw }
145 1.17.4.2 nathanw
146 1.17.4.2 nathanw pcireg_t
147 1.17.4.2 nathanw bandit_conf_read(pc, tag, reg)
148 1.17.4.2 nathanw pci_chipset_tag_t pc;
149 1.17.4.2 nathanw pcitag_t tag;
150 1.17.4.2 nathanw int reg;
151 1.17.4.2 nathanw {
152 1.17.4.2 nathanw pcireg_t data;
153 1.17.4.2 nathanw int bus, dev, func, s;
154 1.17.4.2 nathanw u_int32_t x;
155 1.17.4.2 nathanw
156 1.17.4.2 nathanw pci_decompose_tag(pc, tag, &bus, &dev, &func);
157 1.17.4.2 nathanw
158 1.17.4.2 nathanw /*
159 1.17.4.2 nathanw * bandit's minimum device number of the first bus is 11.
160 1.17.4.2 nathanw * So we behave as if there is no device when dev < 11.
161 1.17.4.2 nathanw */
162 1.17.4.2 nathanw if (func > 7)
163 1.17.4.2 nathanw panic("pci_conf_read: func > 7");
164 1.17.4.2 nathanw
165 1.17.4.2 nathanw if (bus == pc->bus) {
166 1.17.4.2 nathanw if (dev < 11)
167 1.17.4.2 nathanw return 0xffffffff;
168 1.17.4.2 nathanw x = (1 << dev) | (func << 8) | reg;
169 1.17.4.2 nathanw } else
170 1.17.4.2 nathanw x = tag | reg | 1;
171 1.17.4.2 nathanw
172 1.17.4.2 nathanw s = splhigh();
173 1.17.4.2 nathanw
174 1.17.4.2 nathanw out32rb(pc->addr, x);
175 1.17.4.2 nathanw DELAY(10);
176 1.17.4.2 nathanw data = 0xffffffff;
177 1.17.4.2 nathanw if (!badaddr(pc->data, 4))
178 1.17.4.2 nathanw data = in32rb(pc->data);
179 1.17.4.2 nathanw DELAY(10);
180 1.17.4.2 nathanw out32rb(pc->addr, 0);
181 1.17.4.2 nathanw DELAY(10);
182 1.17.4.2 nathanw
183 1.17.4.2 nathanw splx(s);
184 1.17.4.2 nathanw
185 1.17.4.2 nathanw return data;
186 1.17.4.2 nathanw }
187 1.17.4.2 nathanw
188 1.17.4.2 nathanw void
189 1.17.4.2 nathanw bandit_conf_write(pc, tag, reg, data)
190 1.17.4.2 nathanw pci_chipset_tag_t pc;
191 1.17.4.2 nathanw pcitag_t tag;
192 1.17.4.2 nathanw int reg;
193 1.17.4.2 nathanw pcireg_t data;
194 1.17.4.2 nathanw {
195 1.17.4.2 nathanw int bus, dev, func, s;
196 1.17.4.2 nathanw u_int32_t x;
197 1.17.4.2 nathanw
198 1.17.4.2 nathanw pci_decompose_tag(pc, tag, &bus, &dev, &func);
199 1.17.4.2 nathanw
200 1.17.4.2 nathanw if (func > 7)
201 1.17.4.2 nathanw panic("pci_conf_write: func > 7");
202 1.17.4.2 nathanw
203 1.17.4.2 nathanw if (bus == pc->bus) {
204 1.17.4.2 nathanw if (dev < 11)
205 1.17.4.2 nathanw panic("pci_conf_write: dev < 11");
206 1.17.4.2 nathanw x = (1 << dev) | (func << 8) | reg;
207 1.17.4.2 nathanw } else
208 1.17.4.2 nathanw x = tag | reg | 1;
209 1.17.4.2 nathanw
210 1.17.4.2 nathanw s = splhigh();
211 1.17.4.2 nathanw
212 1.17.4.2 nathanw out32rb(pc->addr, x);
213 1.17.4.2 nathanw DELAY(10);
214 1.17.4.2 nathanw out32rb(pc->data, data);
215 1.17.4.2 nathanw DELAY(10);
216 1.17.4.2 nathanw out32rb(pc->addr, 0);
217 1.17.4.2 nathanw DELAY(10);
218 1.17.4.2 nathanw
219 1.17.4.2 nathanw splx(s);
220 1.17.4.2 nathanw }
221 1.17.4.2 nathanw
222 1.17.4.2 nathanw #define PCI_BANDIT 11
223 1.17.4.2 nathanw
224 1.17.4.2 nathanw #define PCI_REG_MODE_SELECT 0x50
225 1.17.4.2 nathanw
226 1.17.4.2 nathanw #define PCI_MODE_IO_COHERENT 0x040 /* I/O coherent */
227 1.17.4.2 nathanw
228 1.17.4.2 nathanw void
229 1.17.4.2 nathanw bandit_init(sc)
230 1.17.4.2 nathanw struct bandit_softc *sc;
231 1.17.4.2 nathanw {
232 1.17.4.2 nathanw pci_chipset_tag_t pc = &sc->sc_pc;
233 1.17.4.2 nathanw pcitag_t tag;
234 1.17.4.2 nathanw u_int mode;
235 1.17.4.2 nathanw
236 1.17.4.2 nathanw tag = pci_make_tag(pc, pc->bus, PCI_BANDIT, 0);
237 1.17.4.2 nathanw if ((pci_conf_read(pc, tag, PCI_ID_REG) & 0xffff) == 0xffff)
238 1.17.4.2 nathanw return;
239 1.17.4.2 nathanw
240 1.17.4.2 nathanw mode = pci_conf_read(pc, tag, PCI_REG_MODE_SELECT);
241 1.17.4.2 nathanw
242 1.17.4.2 nathanw if ((mode & PCI_MODE_IO_COHERENT) == 0) {
243 1.17.4.2 nathanw mode |= PCI_MODE_IO_COHERENT;
244 1.17.4.2 nathanw pci_conf_write(pc, tag, PCI_REG_MODE_SELECT, mode);
245 1.17.4.2 nathanw }
246 1.17.4.2 nathanw }
247