bandit.c revision 1.5
1 /* $NetBSD: bandit.c,v 1.5 1998/10/15 14:39:53 tsubai Exp $ */ 2 3 /* 4 * Copyright 1991-1998 by Open Software Foundation, Inc. 5 * All Rights Reserved 6 * 7 * Permission to use, copy, modify, and distribute this software and 8 * its documentation for any purpose and without fee is hereby granted, 9 * provided that the above copyright notice appears in all copies and 10 * that both the copyright notice and this permission notice appear in 11 * supporting documentation. 12 * 13 * OSF DISCLAIMS ALL WARRANTIES WITH REGARD TO THIS SOFTWARE 14 * INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS 15 * FOR A PARTICULAR PURPOSE. 16 * 17 * IN NO EVENT SHALL OSF BE LIABLE FOR ANY SPECIAL, INDIRECT, OR 18 * CONSEQUENTIAL DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM 19 * LOSS OF USE, DATA OR PROFITS, WHETHER IN ACTION OF CONTRACT, 20 * NEGLIGENCE, OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION 21 * WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. 22 */ 23 /* 24 * Copyright 1991-1998 by Apple Computer, Inc. 25 * All Rights Reserved 26 * 27 * Permission to use, copy, modify, and distribute this software and 28 * its documentation for any purpose and without fee is hereby granted, 29 * provided that the above copyright notice appears in all copies and 30 * that both the copyright notice and this permission notice appear in 31 * supporting documentation. 32 * 33 * APPLE COMPUTER DISCLAIMS ALL WARRANTIES WITH REGARD TO THIS SOFTWARE 34 * INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS 35 * FOR A PARTICULAR PURPOSE. 36 * 37 * IN NO EVENT SHALL APPLE COMPUTER BE LIABLE FOR ANY SPECIAL, INDIRECT, OR 38 * CONSEQUENTIAL DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM 39 * LOSS OF USE, DATA OR PROFITS, WHETHER IN ACTION OF CONTRACT, 40 * NEGLIGENCE, OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION 41 * WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. 42 */ 43 44 #include <sys/param.h> 45 #include <sys/device.h> 46 #include <sys/systm.h> 47 48 #include <dev/pci/pcireg.h> 49 #include <dev/pci/pcivar.h> 50 #include <dev/ofw/openfirm.h> 51 52 #include <machine/bus.h> 53 54 #define PCI_BANDIT 11 55 56 #define PCI_REG_BANDIT_CFG 0x40 57 #define PCI_REG_ADDR_MASK 0x48 58 #define PCI_REG_MODE_SELECT 0x50 59 #define PCI_REG_ARBUS_HOLDOFF 0x58 60 61 #define PCI_MS_BYTESWAP 0x001 /* Enable Big Endian mode. (R/W)*/ 62 #define PCI_MS_PASSATOMIC 0x002 /* PCI Bus to ARBus Lock are always allowed (R)*/ 63 #define PCI_MS_NUMBER_MASK 0x00C /* PCI Bus Number (R) */ 64 #define PCI_MS_IS_SYNC 0x010 /* Is Synchronous (1) or Async (0) ? (R)*/ 65 #define PCI_MS_VGA_SPACE 0x020 /* Map VGA I/O space (R/W) */ 66 #define PCI_MS_IO_COHERENT 0x040 /* I/O Coherent (R/W) */ 67 #define PCI_MS_INT_ENABLE 0x080 /* Allow TEA or PCI Abort INT to pass to Grand Central (R/W) */ 68 69 #define BANDIT_SPECIAL_CYCLE 0xe00000 /* Special Cycle offset */ 70 71 static void bandit_init __P((pci_chipset_tag_t)); 72 static void scan_pci_devs __P((void)); 73 static void config_slot __P((int, pci_chipset_tag_t)); 74 75 void 76 pci_init() 77 { 78 scan_pci_devs(); 79 } 80 81 void 82 bandit_init(pc) 83 pci_chipset_tag_t pc; 84 { 85 u_int status; 86 pcitag_t tag; 87 88 tag = pci_make_tag(pc, 0, PCI_BANDIT, 0); 89 if ((pci_conf_read(pc, tag, PCI_ID_REG) & 0xffff) == 0xffff) 90 return; 91 92 status = pci_conf_read(pc, tag, PCI_REG_MODE_SELECT); 93 94 if ((status & PCI_MS_IO_COHERENT) == 0) { 95 status |= PCI_MS_IO_COHERENT; 96 pci_conf_write(pc, tag, PCI_REG_MODE_SELECT, status); 97 } 98 99 return; 100 } 101 102 103 void 104 scan_pci_devs() 105 { 106 int node; 107 char name[64]; 108 int n = 0; 109 u_int reg[2]; 110 111 bzero(pci_bridges, sizeof(pci_bridges)); 112 113 node = OF_peer(0); 114 node = OF_child(node); 115 116 while (node) { 117 if (OF_getprop(node, "name", name, sizeof(name)) <= 0) 118 continue; 119 if (strcmp(name, "bandit") == 0 || 120 strcmp(name, "chaos") == 0) { 121 int child; 122 123 if (OF_getprop(node, "reg", reg, sizeof(reg)) != 8) 124 continue; 125 126 pci_bridges[n].iot = (bus_space_tag_t)reg[0]; 127 pci_bridges[n].addr = mapiodev(reg[0] + 0x800000, 4); 128 pci_bridges[n].data = mapiodev(reg[0] + 0xc00000, 4); 129 pci_bridges[n].pc = n; 130 131 if (OF_getprop(node, "bus-range", 132 reg, sizeof(reg)) != 8) { 133 pci_bridges[n].addr = NULL; 134 continue; 135 } 136 pci_bridges[n].bus = reg[0]; 137 138 bandit_init(n); 139 140 child = OF_child(node); 141 while (child) { 142 config_slot(child, n); 143 child = OF_peer(child); 144 } 145 n++; 146 } 147 if (strcmp(name, "pci") == 0) { /* XXX This is not a bandit :) */ 148 int child; 149 150 if (OF_getprop(node, "reg", reg, sizeof(reg)) != 8) 151 continue; 152 153 pci_bridges[n].iot = (bus_space_tag_t)reg[0]; 154 pci_bridges[n].addr = mapiodev(0xfec00000, 4); /* XXX */ 155 pci_bridges[n].data = mapiodev(0xfee00000, 4); /* XXX */ 156 pci_bridges[n].pc = PCI_CHIPSET_MPC106; /* for now */ 157 158 if (OF_getprop(node, "bus-range", 159 reg, sizeof(reg)) != 8) { 160 pci_bridges[n].addr = NULL; 161 continue; 162 } 163 pci_bridges[n].bus = reg[0]; 164 165 child = OF_child(node); 166 while (child) { 167 config_slot(child, pci_bridges[n].pc); 168 child = OF_peer(child); 169 } 170 n++; 171 } 172 173 node = OF_peer(node); 174 } 175 } 176 177 void 178 config_slot(node, pc) 179 int node; 180 pci_chipset_tag_t pc; 181 { 182 pcitag_t tag; 183 int sp, irq, intr, csr; 184 int bus, dev, func; 185 int sz; 186 u_int reg[40], *rp; 187 188 sz = OF_getprop(node, "assigned-addresses", reg, sizeof(reg)); 189 if (sz < 4) 190 return; 191 192 /* 193 * npt000ss bbbbbbbb dddddfff rrrrrrrr 194 * 195 * ss space code (01:I/O, 10:32bit mem) 196 * b... 8-bit Bus Number 197 * d... 5-bit Device Number 198 * f... 3-bit Function Number 199 * r... 8-bit Register Number 200 */ 201 rp = ®[0]; 202 bus = (*rp >> 16) & 0xff; 203 dev = (*rp >> 11) & 0x1f; 204 func = (*rp >> 8) & 0x07; 205 206 tag = pci_make_tag(pc, bus, dev, func); 207 csr = pci_conf_read(pc, tag, PCI_COMMAND_STATUS_REG); 208 209 /* Fix mem/io bits */ 210 while (sz > 0) { 211 sp = (*rp >> 24) & 0x03; 212 if (sp == 1) 213 csr |= PCI_COMMAND_IO_ENABLE; 214 if (sp == 2) 215 csr |= PCI_COMMAND_MEM_ENABLE; 216 sz -= 5 * sizeof(int); 217 rp += 5; 218 } 219 220 pci_conf_write(pc, tag, PCI_COMMAND_STATUS_REG, csr); 221 222 /* Fix intr bits */ 223 if (OF_getprop(node, "AAPL,interrupts", &irq, sizeof(irq)) == 224 sizeof(irq)) { 225 226 intr = pci_conf_read(pc, tag, PCI_INTERRUPT_REG); 227 intr = (intr & 0xffffff00) | (irq & 0xff); 228 pci_conf_write(pc, tag, PCI_INTERRUPT_REG, intr); 229 } 230 231 } 232 233 /* 234 * slot A1 pci0 dev 13 irq 23 235 * B1 pci0 dev 14 irq 24 236 * C1 pci0 dev 15 irq 25 237 * D2 pci1 dev 13 irq 27 238 * E2 pci1 dev 14 irq 28 239 * F2 pci1 dev 15 irq 29 240 */ 241
Indexes created Tue Oct 14 15:09:51 GMT 2025