pci_machdep.c revision 1.2 1 1.2 tsubai /* $NetBSD: pci_machdep.c,v 1.2 1998/07/13 19:27:13 tsubai Exp $ */
2 1.1 tsubai
3 1.1 tsubai /*
4 1.1 tsubai * Copyright (c) 1996 Christopher G. Demetriou. All rights reserved.
5 1.1 tsubai * Copyright (c) 1994 Charles Hannum. All rights reserved.
6 1.1 tsubai *
7 1.1 tsubai * Redistribution and use in source and binary forms, with or without
8 1.1 tsubai * modification, are permitted provided that the following conditions
9 1.1 tsubai * are met:
10 1.1 tsubai * 1. Redistributions of source code must retain the above copyright
11 1.1 tsubai * notice, this list of conditions and the following disclaimer.
12 1.1 tsubai * 2. Redistributions in binary form must reproduce the above copyright
13 1.1 tsubai * notice, this list of conditions and the following disclaimer in the
14 1.1 tsubai * documentation and/or other materials provided with the distribution.
15 1.1 tsubai * 3. All advertising materials mentioning features or use of this software
16 1.1 tsubai * must display the following acknowledgement:
17 1.1 tsubai * This product includes software developed by Charles Hannum.
18 1.1 tsubai * 4. The name of the author may not be used to endorse or promote products
19 1.1 tsubai * derived from this software without specific prior written permission.
20 1.1 tsubai *
21 1.1 tsubai * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
22 1.1 tsubai * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
23 1.1 tsubai * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
24 1.1 tsubai * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
25 1.1 tsubai * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
26 1.1 tsubai * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
27 1.1 tsubai * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
28 1.1 tsubai * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
29 1.1 tsubai * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
30 1.1 tsubai * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
31 1.1 tsubai */
32 1.1 tsubai
33 1.1 tsubai /*
34 1.1 tsubai * Machine-specific functions for PCI autoconfiguration.
35 1.1 tsubai *
36 1.1 tsubai * On PCs, there are two methods of generating PCI configuration cycles.
37 1.1 tsubai * We try to detect the appropriate mechanism for this machine and set
38 1.1 tsubai * up a few function pointers to access the correct method directly.
39 1.1 tsubai *
40 1.1 tsubai * The configuration method can be hard-coded in the config file by
41 1.1 tsubai * using `options PCI_CONF_MODE=N', where `N' is the configuration mode
42 1.1 tsubai * as defined section 3.6.4.1, `Generating Configuration Cycles'.
43 1.1 tsubai */
44 1.1 tsubai
45 1.1 tsubai #include <sys/types.h>
46 1.1 tsubai #include <sys/param.h>
47 1.1 tsubai #include <sys/time.h>
48 1.1 tsubai #include <sys/systm.h>
49 1.1 tsubai #include <sys/errno.h>
50 1.1 tsubai #include <sys/device.h>
51 1.1 tsubai
52 1.1 tsubai #include <vm/vm.h>
53 1.1 tsubai #include <vm/vm_kern.h>
54 1.1 tsubai
55 1.1 tsubai #include <machine/bus.h>
56 1.1 tsubai #include <machine/pio.h>
57 1.1 tsubai #include <machine/intr.h>
58 1.1 tsubai
59 1.1 tsubai #include <dev/pci/pcivar.h>
60 1.1 tsubai #include <dev/pci/pcireg.h>
61 1.1 tsubai
62 1.1 tsubai #if 0
63 1.1 tsubai #define PCI_MODE1_ADDRESS_REG 0xf2800000
64 1.1 tsubai #define PCI_MODE1_DATA_REG 0xf2c00000
65 1.1 tsubai #endif
66 1.1 tsubai
67 1.1 tsubai void
68 1.1 tsubai pci_attach_hook(parent, self, pba)
69 1.1 tsubai struct device *parent, *self;
70 1.1 tsubai struct pcibus_attach_args *pba;
71 1.1 tsubai {
72 1.1 tsubai }
73 1.1 tsubai
74 1.1 tsubai int
75 1.1 tsubai pci_bus_maxdevs(pc, busno)
76 1.1 tsubai pci_chipset_tag_t pc;
77 1.1 tsubai int busno;
78 1.1 tsubai {
79 1.1 tsubai
80 1.1 tsubai /*
81 1.1 tsubai * Bus number is irrelevant. Configuration Mechanism 1 is in
82 1.1 tsubai * use, can have devices 0-32 (i.e. the `normal' range).
83 1.1 tsubai */
84 1.1 tsubai return (32);
85 1.1 tsubai }
86 1.1 tsubai
87 1.1 tsubai pcitag_t
88 1.1 tsubai pci_make_tag(pc, bus, device, function)
89 1.1 tsubai pci_chipset_tag_t pc;
90 1.1 tsubai int bus, device, function;
91 1.1 tsubai {
92 1.1 tsubai pcitag_t tag;
93 1.1 tsubai
94 1.1 tsubai if (bus >= 256 || device >= 32 || function >= 8)
95 1.1 tsubai panic("pci_make_tag: bad request");
96 1.1 tsubai
97 1.2 tsubai if (pc == PCI_CHIPSET_MPC106) {
98 1.2 tsubai tag = 0x80000000 |
99 1.2 tsubai (bus << 16) | (device << 11) | (function << 8);
100 1.2 tsubai } else {
101 1.2 tsubai if (device < 11)
102 1.2 tsubai return 0;
103 1.2 tsubai tag = (1 << device);
104 1.2 tsubai }
105 1.1 tsubai
106 1.1 tsubai return tag;
107 1.1 tsubai }
108 1.1 tsubai
109 1.1 tsubai void
110 1.1 tsubai pci_decompose_tag(pc, tag, bp, dp, fp)
111 1.1 tsubai pci_chipset_tag_t pc;
112 1.1 tsubai pcitag_t tag;
113 1.1 tsubai int *bp, *dp, *fp;
114 1.1 tsubai {
115 1.2 tsubai if (pc == PCI_CHIPSET_MPC106) {
116 1.2 tsubai if (bp != NULL)
117 1.2 tsubai *bp = (tag >> 16) & 0xff;
118 1.2 tsubai if (dp != NULL)
119 1.2 tsubai *dp = (tag >> 11) & 0x1f;
120 1.2 tsubai if (fp != NULL)
121 1.2 tsubai *fp = (tag >> 8) & 0x7;
122 1.2 tsubai } else {
123 1.2 tsubai if (bp != NULL)
124 1.2 tsubai *bp = 0;
125 1.2 tsubai if (dp != NULL)
126 1.2 tsubai *dp = ffs(tag) - 1;
127 1.2 tsubai if (fp != NULL)
128 1.2 tsubai *fp = 0;
129 1.1 tsubai }
130 1.1 tsubai return;
131 1.1 tsubai }
132 1.1 tsubai
133 1.1 tsubai pcireg_t
134 1.1 tsubai pci_conf_read(pc, tag, reg)
135 1.1 tsubai pci_chipset_tag_t pc;
136 1.1 tsubai pcitag_t tag;
137 1.1 tsubai int reg;
138 1.1 tsubai {
139 1.1 tsubai pcireg_t data;
140 1.2 tsubai struct pci_bridge *r;
141 1.1 tsubai
142 1.2 tsubai if (pc == PCI_CHIPSET_MPC106) {
143 1.2 tsubai r = &pci_bridges[0];
144 1.2 tsubai
145 1.2 tsubai out32rb(r->addr, tag | reg);
146 1.2 tsubai data = in32rb(r->data);
147 1.2 tsubai out32rb(r->addr, 0);
148 1.2 tsubai } else {
149 1.2 tsubai r = &pci_bridges[pc];
150 1.2 tsubai
151 1.2 tsubai if (tag == 0)
152 1.2 tsubai return 0xffffffff;
153 1.2 tsubai
154 1.2 tsubai out32rb(r->addr, tag | reg);
155 1.2 tsubai DELAY(10);
156 1.2 tsubai data = in32rb(r->data);
157 1.2 tsubai DELAY(10);
158 1.2 tsubai out32rb(r->addr, 0);
159 1.2 tsubai DELAY(10);
160 1.2 tsubai }
161 1.1 tsubai
162 1.1 tsubai return data;
163 1.1 tsubai }
164 1.1 tsubai
165 1.1 tsubai void
166 1.1 tsubai pci_conf_write(pc, tag, reg, data)
167 1.1 tsubai pci_chipset_tag_t pc;
168 1.1 tsubai pcitag_t tag;
169 1.1 tsubai int reg;
170 1.1 tsubai pcireg_t data;
171 1.1 tsubai {
172 1.2 tsubai struct pci_bridge *r = &pci_bridges[pc];
173 1.1 tsubai
174 1.2 tsubai if (pc == PCI_CHIPSET_MPC106) {
175 1.2 tsubai r = &pci_bridges[0];
176 1.2 tsubai
177 1.2 tsubai out32rb(r->addr, tag | reg);
178 1.2 tsubai out32rb(r->data, data);
179 1.2 tsubai out32rb(r->addr, 0);
180 1.2 tsubai } else {
181 1.2 tsubai r = &pci_bridges[pc];
182 1.2 tsubai
183 1.2 tsubai out32rb(r->addr, tag | reg);
184 1.2 tsubai DELAY(10);
185 1.2 tsubai out32rb(r->data, data);
186 1.2 tsubai DELAY(10);
187 1.2 tsubai out32rb(r->addr, 0);
188 1.2 tsubai DELAY(10);
189 1.2 tsubai }
190 1.1 tsubai }
191 1.1 tsubai
192 1.1 tsubai int
193 1.1 tsubai pci_intr_map(pc, intrtag, pin, line, ihp)
194 1.1 tsubai pci_chipset_tag_t pc;
195 1.1 tsubai pcitag_t intrtag;
196 1.1 tsubai int pin, line;
197 1.1 tsubai pci_intr_handle_t *ihp;
198 1.1 tsubai {
199 1.1 tsubai
200 1.1 tsubai if (pin == 0) {
201 1.1 tsubai /* No IRQ used. */
202 1.1 tsubai goto bad;
203 1.1 tsubai }
204 1.1 tsubai
205 1.1 tsubai if (pin > 4) {
206 1.1 tsubai printf("pci_intr_map: bad interrupt pin %d\n", pin);
207 1.1 tsubai goto bad;
208 1.1 tsubai }
209 1.1 tsubai
210 1.1 tsubai /*
211 1.1 tsubai * Section 6.2.4, `Miscellaneous Functions', says that 255 means
212 1.1 tsubai * `unknown' or `no connection' on a PC. We assume that a device with
213 1.1 tsubai * `no connection' either doesn't have an interrupt (in which case the
214 1.1 tsubai * pin number should be 0, and would have been noticed above), or
215 1.1 tsubai * wasn't configured by the BIOS (in which case we punt, since there's
216 1.1 tsubai * no real way we can know how the interrupt lines are mapped in the
217 1.1 tsubai * hardware).
218 1.1 tsubai *
219 1.1 tsubai * XXX
220 1.1 tsubai * Since IRQ 0 is only used by the clock, and we can't actually be sure
221 1.1 tsubai * that the BIOS did its job, we also recognize that as meaning that
222 1.1 tsubai * the BIOS has not configured the device.
223 1.1 tsubai */
224 1.1 tsubai if (line == 0 || line == 255) {
225 1.1 tsubai printf("pci_intr_map: no mapping for pin %c\n", '@' + pin);
226 1.1 tsubai goto bad;
227 1.1 tsubai } else {
228 1.1 tsubai if (line >= ICU_LEN) {
229 1.1 tsubai printf("pci_intr_map: bad interrupt line %d\n", line);
230 1.1 tsubai goto bad;
231 1.1 tsubai }
232 1.1 tsubai }
233 1.1 tsubai
234 1.1 tsubai *ihp = line;
235 1.1 tsubai return 0;
236 1.1 tsubai
237 1.1 tsubai bad:
238 1.1 tsubai *ihp = -1;
239 1.1 tsubai return 1;
240 1.1 tsubai }
241 1.1 tsubai
242 1.1 tsubai const char *
243 1.1 tsubai pci_intr_string(pc, ih)
244 1.1 tsubai pci_chipset_tag_t pc;
245 1.1 tsubai pci_intr_handle_t ih;
246 1.1 tsubai {
247 1.1 tsubai static char irqstr[8]; /* 4 + 2 + NULL + sanity */
248 1.1 tsubai
249 1.1 tsubai if (ih == 0 || ih >= ICU_LEN)
250 1.1 tsubai panic("pci_intr_string: bogus handle 0x%x\n", ih);
251 1.1 tsubai
252 1.1 tsubai sprintf(irqstr, "irq %d", ih);
253 1.1 tsubai return (irqstr);
254 1.1 tsubai
255 1.1 tsubai }
256 1.1 tsubai
257 1.1 tsubai extern void * intr_establish();
258 1.1 tsubai extern void intr_disestablish();
259 1.1 tsubai
260 1.1 tsubai void *
261 1.1 tsubai pci_intr_establish(pc, ih, level, func, arg)
262 1.1 tsubai pci_chipset_tag_t pc;
263 1.1 tsubai pci_intr_handle_t ih;
264 1.1 tsubai int level, (*func) __P((void *));
265 1.1 tsubai void *arg;
266 1.1 tsubai {
267 1.1 tsubai
268 1.1 tsubai if (ih == 0 || ih >= ICU_LEN)
269 1.1 tsubai panic("pci_intr_establish: bogus handle 0x%x\n", ih);
270 1.1 tsubai
271 1.1 tsubai return intr_establish(ih, IST_LEVEL, level, func, arg);
272 1.1 tsubai }
273 1.1 tsubai
274 1.1 tsubai void
275 1.1 tsubai pci_intr_disestablish(pc, cookie)
276 1.1 tsubai pci_chipset_tag_t pc;
277 1.1 tsubai void *cookie;
278 1.1 tsubai {
279 1.1 tsubai
280 1.1 tsubai intr_disestablish(cookie);
281 1.1 tsubai }
282