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pci_machdep.c revision 1.29.4.1
      1  1.29.4.1    rpaulo /*	$NetBSD: pci_machdep.c,v 1.29.4.1 2006/09/09 02:41:14 rpaulo Exp $	*/
      2       1.1    tsubai 
      3       1.1    tsubai /*
      4       1.1    tsubai  * Copyright (c) 1996 Christopher G. Demetriou.  All rights reserved.
      5       1.5   mycroft  * Copyright (c) 1994 Charles M. Hannum.  All rights reserved.
      6       1.1    tsubai  *
      7       1.1    tsubai  * Redistribution and use in source and binary forms, with or without
      8       1.1    tsubai  * modification, are permitted provided that the following conditions
      9       1.1    tsubai  * are met:
     10       1.1    tsubai  * 1. Redistributions of source code must retain the above copyright
     11       1.1    tsubai  *    notice, this list of conditions and the following disclaimer.
     12       1.1    tsubai  * 2. Redistributions in binary form must reproduce the above copyright
     13       1.1    tsubai  *    notice, this list of conditions and the following disclaimer in the
     14       1.1    tsubai  *    documentation and/or other materials provided with the distribution.
     15       1.1    tsubai  * 3. All advertising materials mentioning features or use of this software
     16       1.1    tsubai  *    must display the following acknowledgement:
     17       1.5   mycroft  *	This product includes software developed by Charles M. Hannum.
     18       1.1    tsubai  * 4. The name of the author may not be used to endorse or promote products
     19       1.1    tsubai  *    derived from this software without specific prior written permission.
     20       1.1    tsubai  *
     21       1.1    tsubai  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
     22       1.1    tsubai  * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
     23       1.1    tsubai  * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
     24       1.1    tsubai  * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
     25       1.1    tsubai  * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
     26       1.1    tsubai  * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
     27       1.1    tsubai  * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
     28       1.1    tsubai  * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
     29       1.1    tsubai  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
     30       1.1    tsubai  * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
     31       1.1    tsubai  */
     32       1.1    tsubai 
     33       1.1    tsubai /*
     34       1.1    tsubai  * Machine-specific functions for PCI autoconfiguration.
     35       1.1    tsubai  *
     36       1.1    tsubai  * On PCs, there are two methods of generating PCI configuration cycles.
     37       1.1    tsubai  * We try to detect the appropriate mechanism for this machine and set
     38       1.1    tsubai  * up a few function pointers to access the correct method directly.
     39       1.1    tsubai  *
     40       1.1    tsubai  * The configuration method can be hard-coded in the config file by
     41       1.1    tsubai  * using `options PCI_CONF_MODE=N', where `N' is the configuration mode
     42       1.1    tsubai  * as defined section 3.6.4.1, `Generating Configuration Cycles'.
     43       1.1    tsubai  */
     44      1.21     lukem 
     45      1.21     lukem #include <sys/cdefs.h>
     46  1.29.4.1    rpaulo __KERNEL_RCSID(0, "$NetBSD: pci_machdep.c,v 1.29.4.1 2006/09/09 02:41:14 rpaulo Exp $");
     47       1.1    tsubai 
     48       1.1    tsubai #include <sys/types.h>
     49       1.1    tsubai #include <sys/param.h>
     50       1.1    tsubai #include <sys/time.h>
     51       1.1    tsubai #include <sys/systm.h>
     52       1.1    tsubai #include <sys/errno.h>
     53       1.1    tsubai #include <sys/device.h>
     54       1.1    tsubai 
     55      1.13       mrg #include <uvm/uvm_extern.h>
     56       1.1    tsubai 
     57       1.3    tsubai #define _MACPPC_BUS_DMA_PRIVATE
     58       1.3    tsubai #include <machine/bus.h>
     59       1.3    tsubai 
     60       1.1    tsubai #include <machine/bus.h>
     61       1.1    tsubai #include <machine/pio.h>
     62       1.1    tsubai #include <machine/intr.h>
     63       1.1    tsubai 
     64       1.1    tsubai #include <dev/pci/pcivar.h>
     65       1.1    tsubai #include <dev/pci/pcireg.h>
     66       1.1    tsubai 
     67      1.10    tsubai #include <dev/ofw/openfirm.h>
     68      1.10    tsubai #include <dev/ofw/ofw_pci.h>
     69      1.10    tsubai 
     70      1.10    tsubai static void fixpci __P((int, pci_chipset_tag_t));
     71      1.10    tsubai static int find_node_intr __P((int, u_int32_t *, u_int32_t *));
     72      1.10    tsubai 
     73       1.3    tsubai /*
     74       1.3    tsubai  * PCI doesn't have any special needs; just use the generic versions
     75       1.3    tsubai  * of these functions.
     76       1.3    tsubai  */
     77       1.3    tsubai struct macppc_bus_dma_tag pci_bus_dma_tag = {
     78       1.3    tsubai 	0,			/* _bounce_thresh */
     79       1.3    tsubai 	_bus_dmamap_create,
     80       1.3    tsubai 	_bus_dmamap_destroy,
     81       1.3    tsubai 	_bus_dmamap_load,
     82       1.3    tsubai 	_bus_dmamap_load_mbuf,
     83       1.3    tsubai 	_bus_dmamap_load_uio,
     84       1.3    tsubai 	_bus_dmamap_load_raw,
     85       1.3    tsubai 	_bus_dmamap_unload,
     86       1.3    tsubai 	NULL,			/* _dmamap_sync */
     87       1.3    tsubai 	_bus_dmamem_alloc,
     88       1.3    tsubai 	_bus_dmamem_free,
     89       1.3    tsubai 	_bus_dmamem_map,
     90       1.3    tsubai 	_bus_dmamem_unmap,
     91       1.3    tsubai 	_bus_dmamem_mmap,
     92       1.3    tsubai };
     93       1.1    tsubai 
     94       1.1    tsubai void
     95       1.1    tsubai pci_attach_hook(parent, self, pba)
     96       1.1    tsubai 	struct device *parent, *self;
     97       1.1    tsubai 	struct pcibus_attach_args *pba;
     98       1.1    tsubai {
     99      1.10    tsubai 	pci_chipset_tag_t pc = pba->pba_pc;
    100      1.10    tsubai 	int bus = pba->pba_bus;
    101      1.10    tsubai 	int node, nn, sz;
    102      1.10    tsubai 	int32_t busrange[2];
    103      1.10    tsubai 
    104      1.10    tsubai 	for (node = pc->node; node; node = nn) {
    105      1.10    tsubai 		sz = OF_getprop(node, "bus-range", busrange, 8);
    106      1.10    tsubai 		if (sz == 8 && busrange[0] == bus) {
    107      1.10    tsubai 			fixpci(node, pc);
    108      1.10    tsubai 			return;
    109      1.10    tsubai 		}
    110      1.10    tsubai 		if ((nn = OF_child(node)) != 0)
    111      1.10    tsubai 			continue;
    112      1.10    tsubai 		while ((nn = OF_peer(node)) == 0) {
    113      1.10    tsubai 			node = OF_parent(node);
    114      1.10    tsubai 			if (node == pc->node)
    115      1.10    tsubai 				return;		/* not found */
    116      1.10    tsubai 		}
    117      1.10    tsubai 	}
    118       1.1    tsubai }
    119       1.1    tsubai 
    120       1.1    tsubai int
    121       1.1    tsubai pci_bus_maxdevs(pc, busno)
    122       1.1    tsubai 	pci_chipset_tag_t pc;
    123       1.1    tsubai 	int busno;
    124       1.1    tsubai {
    125       1.1    tsubai 
    126       1.1    tsubai 	/*
    127       1.1    tsubai 	 * Bus number is irrelevant.  Configuration Mechanism 1 is in
    128       1.1    tsubai 	 * use, can have devices 0-32 (i.e. the `normal' range).
    129       1.1    tsubai 	 */
    130       1.3    tsubai 	return 32;
    131       1.1    tsubai }
    132       1.1    tsubai 
    133       1.1    tsubai pcitag_t
    134       1.1    tsubai pci_make_tag(pc, bus, device, function)
    135       1.1    tsubai 	pci_chipset_tag_t pc;
    136       1.1    tsubai 	int bus, device, function;
    137       1.1    tsubai {
    138       1.1    tsubai 	pcitag_t tag;
    139       1.1    tsubai 
    140       1.1    tsubai 	if (bus >= 256 || device >= 32 || function >= 8)
    141       1.1    tsubai 		panic("pci_make_tag: bad request");
    142       1.1    tsubai 
    143       1.9   thorpej 	/* XXX magic number */
    144       1.3    tsubai 	tag = 0x80000000 | (bus << 16) | (device << 11) | (function << 8);
    145       1.1    tsubai 
    146       1.1    tsubai 	return tag;
    147       1.1    tsubai }
    148       1.1    tsubai 
    149       1.1    tsubai void
    150       1.1    tsubai pci_decompose_tag(pc, tag, bp, dp, fp)
    151       1.1    tsubai 	pci_chipset_tag_t pc;
    152       1.1    tsubai 	pcitag_t tag;
    153       1.1    tsubai 	int *bp, *dp, *fp;
    154       1.1    tsubai {
    155       1.9   thorpej 
    156       1.3    tsubai 	if (bp != NULL)
    157       1.3    tsubai 		*bp = (tag >> 16) & 0xff;
    158       1.3    tsubai 	if (dp != NULL)
    159       1.3    tsubai 		*dp = (tag >> 11) & 0x1f;
    160       1.3    tsubai 	if (fp != NULL)
    161       1.9   thorpej 		*fp = (tag >> 8) & 0x07;
    162       1.1    tsubai }
    163       1.1    tsubai 
    164       1.1    tsubai pcireg_t
    165       1.1    tsubai pci_conf_read(pc, tag, reg)
    166       1.1    tsubai 	pci_chipset_tag_t pc;
    167       1.1    tsubai 	pcitag_t tag;
    168       1.1    tsubai 	int reg;
    169       1.1    tsubai {
    170       1.2    tsubai 
    171      1.10    tsubai 	return (*pc->conf_read)(pc, tag, reg);
    172       1.1    tsubai }
    173       1.1    tsubai 
    174       1.1    tsubai void
    175       1.1    tsubai pci_conf_write(pc, tag, reg, data)
    176       1.1    tsubai 	pci_chipset_tag_t pc;
    177       1.1    tsubai 	pcitag_t tag;
    178       1.1    tsubai 	int reg;
    179       1.1    tsubai 	pcireg_t data;
    180       1.1    tsubai {
    181       1.2    tsubai 
    182      1.10    tsubai 	(*pc->conf_write)(pc, tag, reg, data);
    183       1.1    tsubai }
    184       1.1    tsubai 
    185       1.1    tsubai int
    186      1.14  sommerfe pci_intr_map(pa, ihp)
    187      1.14  sommerfe 	struct pci_attach_args *pa;
    188       1.1    tsubai 	pci_intr_handle_t *ihp;
    189       1.1    tsubai {
    190      1.14  sommerfe 	int pin = pa->pa_intrpin;
    191      1.14  sommerfe 	int line = pa->pa_intrline;
    192  1.29.4.1    rpaulo 
    193  1.29.4.1    rpaulo 	printf("%s: pin: %d, line: %d\n", __FUNCTION__, pin, line);
    194       1.1    tsubai 
    195       1.1    tsubai 	if (pin == 0) {
    196       1.1    tsubai 		/* No IRQ used. */
    197  1.29.4.1    rpaulo 		printf("pci_intr_map: interrupt pin %d\n", pin);
    198       1.1    tsubai 		goto bad;
    199       1.1    tsubai 	}
    200       1.1    tsubai 
    201       1.1    tsubai 	if (pin > 4) {
    202       1.1    tsubai 		printf("pci_intr_map: bad interrupt pin %d\n", pin);
    203       1.1    tsubai 		goto bad;
    204       1.1    tsubai 	}
    205       1.1    tsubai 
    206       1.1    tsubai 	/*
    207       1.1    tsubai 	 * Section 6.2.4, `Miscellaneous Functions', says that 255 means
    208       1.1    tsubai 	 * `unknown' or `no connection' on a PC.  We assume that a device with
    209       1.1    tsubai 	 * `no connection' either doesn't have an interrupt (in which case the
    210       1.1    tsubai 	 * pin number should be 0, and would have been noticed above), or
    211       1.1    tsubai 	 * wasn't configured by the BIOS (in which case we punt, since there's
    212       1.1    tsubai 	 * no real way we can know how the interrupt lines are mapped in the
    213       1.1    tsubai 	 * hardware).
    214       1.1    tsubai 	 *
    215       1.1    tsubai 	 * XXX
    216       1.1    tsubai 	 * Since IRQ 0 is only used by the clock, and we can't actually be sure
    217       1.1    tsubai 	 * that the BIOS did its job, we also recognize that as meaning that
    218       1.1    tsubai 	 * the BIOS has not configured the device.
    219       1.1    tsubai 	 */
    220       1.1    tsubai 	if (line == 0 || line == 255) {
    221       1.1    tsubai 		printf("pci_intr_map: no mapping for pin %c\n", '@' + pin);
    222       1.1    tsubai 		goto bad;
    223       1.1    tsubai 	} else {
    224       1.1    tsubai 		if (line >= ICU_LEN) {
    225       1.1    tsubai 			printf("pci_intr_map: bad interrupt line %d\n", line);
    226       1.1    tsubai 			goto bad;
    227       1.1    tsubai 		}
    228       1.1    tsubai 	}
    229       1.1    tsubai 
    230       1.1    tsubai 	*ihp = line;
    231       1.1    tsubai 	return 0;
    232       1.1    tsubai 
    233       1.1    tsubai bad:
    234       1.1    tsubai 	*ihp = -1;
    235       1.1    tsubai 	return 1;
    236       1.1    tsubai }
    237       1.1    tsubai 
    238       1.1    tsubai const char *
    239       1.1    tsubai pci_intr_string(pc, ih)
    240       1.1    tsubai 	pci_chipset_tag_t pc;
    241       1.1    tsubai 	pci_intr_handle_t ih;
    242       1.1    tsubai {
    243       1.1    tsubai 	static char irqstr[8];		/* 4 + 2 + NULL + sanity */
    244       1.1    tsubai 
    245       1.1    tsubai 	if (ih == 0 || ih >= ICU_LEN)
    246      1.20    provos 		panic("pci_intr_string: bogus handle 0x%x", ih);
    247       1.1    tsubai 
    248       1.1    tsubai 	sprintf(irqstr, "irq %d", ih);
    249       1.1    tsubai 	return (irqstr);
    250       1.1    tsubai 
    251      1.11       cgd }
    252      1.11       cgd 
    253      1.11       cgd const struct evcnt *
    254      1.11       cgd pci_intr_evcnt(pc, ih)
    255      1.11       cgd 	pci_chipset_tag_t pc;
    256      1.11       cgd 	pci_intr_handle_t ih;
    257      1.11       cgd {
    258      1.11       cgd 
    259      1.11       cgd 	/* XXX for now, no evcnt parent reported */
    260      1.11       cgd 	return NULL;
    261       1.1    tsubai }
    262       1.1    tsubai 
    263       1.1    tsubai void *
    264       1.1    tsubai pci_intr_establish(pc, ih, level, func, arg)
    265       1.1    tsubai 	pci_chipset_tag_t pc;
    266       1.1    tsubai 	pci_intr_handle_t ih;
    267       1.1    tsubai 	int level, (*func) __P((void *));
    268       1.1    tsubai 	void *arg;
    269       1.1    tsubai {
    270       1.1    tsubai 
    271       1.1    tsubai 	if (ih == 0 || ih >= ICU_LEN)
    272      1.20    provos 		panic("pci_intr_establish: bogus handle 0x%x", ih);
    273       1.1    tsubai 
    274       1.1    tsubai 	return intr_establish(ih, IST_LEVEL, level, func, arg);
    275       1.1    tsubai }
    276       1.1    tsubai 
    277       1.1    tsubai void
    278       1.1    tsubai pci_intr_disestablish(pc, cookie)
    279       1.1    tsubai 	pci_chipset_tag_t pc;
    280       1.1    tsubai 	void *cookie;
    281       1.1    tsubai {
    282       1.1    tsubai 
    283       1.1    tsubai 	intr_disestablish(cookie);
    284      1.10    tsubai }
    285      1.10    tsubai 
    286      1.10    tsubai #define pcibus(x) \
    287      1.10    tsubai 	(((x) & OFW_PCI_PHYS_HI_BUSMASK) >> OFW_PCI_PHYS_HI_BUSSHIFT)
    288      1.10    tsubai #define pcidev(x) \
    289      1.10    tsubai 	(((x) & OFW_PCI_PHYS_HI_DEVICEMASK) >> OFW_PCI_PHYS_HI_DEVICESHIFT)
    290      1.10    tsubai #define pcifunc(x) \
    291      1.10    tsubai 	(((x) & OFW_PCI_PHYS_HI_FUNCTIONMASK) >> OFW_PCI_PHYS_HI_FUNCTIONSHIFT)
    292      1.10    tsubai 
    293      1.10    tsubai void
    294      1.10    tsubai fixpci(parent, pc)
    295      1.10    tsubai 	int parent;
    296      1.10    tsubai 	pci_chipset_tag_t pc;
    297      1.10    tsubai {
    298      1.10    tsubai 	int node;
    299      1.10    tsubai 	pcitag_t tag;
    300      1.10    tsubai 	pcireg_t csr, intr;
    301      1.22      matt 	int len, i, ilen;
    302      1.10    tsubai 	int32_t irqs[4];
    303      1.10    tsubai 	struct {
    304      1.10    tsubai 		u_int32_t phys_hi, phys_mid, phys_lo;
    305      1.10    tsubai 		u_int32_t size_hi, size_lo;
    306      1.10    tsubai 	} addr[8];
    307      1.22      matt 	struct {
    308      1.22      matt 		u_int32_t phys_hi, phys_mid, phys_lo;
    309      1.22      matt 		u_int32_t icells[5];
    310      1.22      matt 	} iaddr;
    311      1.10    tsubai 
    312      1.22      matt 	len = OF_getprop(parent, "#interrupt-cells", &ilen, sizeof(ilen));
    313      1.22      matt 	if (len < 0)
    314      1.22      matt 		ilen = 0;
    315      1.10    tsubai 	for (node = OF_child(parent); node; node = OF_peer(node)) {
    316      1.10    tsubai 		len = OF_getprop(node, "assigned-addresses", addr,
    317      1.10    tsubai 				 sizeof(addr));
    318      1.10    tsubai 		if (len < (int)sizeof(addr[0]))
    319      1.10    tsubai 			continue;
    320      1.10    tsubai 
    321      1.10    tsubai 		tag = pci_make_tag(pc, pcibus(addr[0].phys_hi),
    322      1.10    tsubai 				   pcidev(addr[0].phys_hi),
    323      1.10    tsubai 				   pcifunc(addr[0].phys_hi));
    324      1.10    tsubai 
    325      1.10    tsubai 		/*
    326      1.10    tsubai 		 * Make sure the IO and MEM enable bits are set in the CSR.
    327      1.10    tsubai 		 */
    328      1.10    tsubai 		csr = pci_conf_read(pc, tag, PCI_COMMAND_STATUS_REG);
    329      1.10    tsubai 		csr &= ~(PCI_COMMAND_IO_ENABLE | PCI_COMMAND_MEM_ENABLE);
    330      1.10    tsubai 
    331      1.10    tsubai 		for (i = 0; i < len / sizeof(addr[0]); i++) {
    332      1.10    tsubai 			switch (addr[i].phys_hi & OFW_PCI_PHYS_HI_SPACEMASK) {
    333      1.10    tsubai 			case OFW_PCI_PHYS_HI_SPACE_IO:
    334      1.10    tsubai 				csr |= PCI_COMMAND_IO_ENABLE;
    335      1.10    tsubai 				break;
    336      1.10    tsubai 
    337      1.10    tsubai 			case OFW_PCI_PHYS_HI_SPACE_MEM32:
    338      1.19  wrstuden 			case OFW_PCI_PHYS_HI_SPACE_MEM64:
    339      1.10    tsubai 				csr |= PCI_COMMAND_MEM_ENABLE;
    340      1.10    tsubai 				break;
    341      1.10    tsubai 			}
    342      1.10    tsubai 		}
    343      1.10    tsubai 
    344      1.10    tsubai 		pci_conf_write(pc, tag, PCI_COMMAND_STATUS_REG, csr);
    345      1.10    tsubai 
    346      1.10    tsubai 		/*
    347      1.10    tsubai 		 * Make sure the line register is programmed with the
    348      1.10    tsubai 		 * interrupt mapping.
    349      1.10    tsubai 		 */
    350      1.23      matt 		if (ilen == 0) {
    351      1.23      matt 			/*
    352      1.23      matt 			 * Early Apple OFW implementation don't handle
    353      1.23      matt 			 * interrupts as defined by the OFW PCI bindings.
    354      1.23      matt 			 */
    355      1.23      matt 			len = OF_getprop(node, "AAPL,interrupts", irqs, 4);
    356      1.23      matt 		} else {
    357      1.23      matt 			iaddr.phys_hi = addr[0].phys_hi;
    358      1.23      matt 			iaddr.phys_mid = addr[0].phys_mid;
    359      1.23      matt 			iaddr.phys_lo = addr[0].phys_lo;
    360      1.23      matt 			/*
    361      1.23      matt 			 * Thankfully, PCI can only have one entry in its
    362      1.23      matt 			 * "interrupts" property.
    363      1.23      matt 			 */
    364      1.23      matt 			len = OF_getprop(node, "interrupts", &iaddr.icells[0],
    365      1.23      matt 			    4*ilen);
    366      1.23      matt 			if (len != 4*ilen)
    367      1.23      matt 				continue;
    368      1.23      matt 			len = find_node_intr(node, &iaddr.phys_hi, irqs);
    369      1.23      matt 		}
    370      1.27    briggs 		if (len <= 0) {
    371      1.27    briggs 			/*
    372      1.27    briggs 			 * If we still don't have an interrupt, try one
    373      1.27    briggs 			 * more time.  This case covers devices behind the
    374      1.27    briggs 			 * PCI-PCI bridge in a UMAX S900 or similar (9500?)
    375      1.27    briggs 			 * system.  These slots all share the bridge's
    376      1.27    briggs 			 * interrupt.
    377      1.27    briggs 			 */
    378      1.27    briggs 			len = find_node_intr(node, &addr[0].phys_hi, irqs);
    379      1.27    briggs 			if (len <= 0)
    380      1.27    briggs 				continue;
    381      1.22      matt 		}
    382      1.27    briggs 		intr = pci_conf_read(pc, tag, PCI_INTERRUPT_REG);
    383      1.27    briggs 		intr &= ~PCI_INTERRUPT_LINE_MASK;
    384      1.27    briggs 		intr |= irqs[0] & PCI_INTERRUPT_LINE_MASK;
    385      1.27    briggs 		pci_conf_write(pc, tag, PCI_INTERRUPT_REG, intr);
    386      1.10    tsubai 	}
    387      1.10    tsubai }
    388      1.10    tsubai 
    389      1.10    tsubai /*
    390      1.10    tsubai  * Find PCI IRQ of the node from OF tree.
    391      1.10    tsubai  */
    392      1.10    tsubai int
    393      1.10    tsubai find_node_intr(node, addr, intr)
    394      1.10    tsubai 	int node;
    395      1.10    tsubai 	u_int32_t *addr, *intr;
    396      1.10    tsubai {
    397      1.10    tsubai 	int parent, len, mlen, iparent;
    398      1.10    tsubai 	int match, i;
    399      1.22      matt 	u_int32_t map[160];
    400      1.22      matt 	const u_int32_t *mp;
    401      1.28      matt 	u_int32_t imapmask[8], maskedaddr[8];
    402      1.22      matt 	u_int32_t acells, icells;
    403      1.10    tsubai 	char name[32];
    404      1.10    tsubai 
    405  1.29.4.1    rpaulo 	/* XXXSL: 1st check for a  interrupt-parent property */
    406  1.29.4.1    rpaulo         if (OF_getprop(node, "interrupt-parent", &iparent, sizeof(iparent)) == sizeof(iparent))
    407  1.29.4.1    rpaulo 	{
    408  1.29.4.1    rpaulo 		/* How many cells to specify an interrupt ?? */
    409  1.29.4.1    rpaulo 		if (OF_getprop(iparent, "#interrupt-cells", &icells, 4) != 4)
    410  1.29.4.1    rpaulo 			return -1;
    411  1.29.4.1    rpaulo 
    412  1.29.4.1    rpaulo 		if (OF_getprop(node, "interrupts", &map, sizeof(map)) != (icells * 4))
    413  1.29.4.1    rpaulo 			return -1;
    414  1.29.4.1    rpaulo 
    415  1.29.4.1    rpaulo 		memcpy(intr, map, icells * 4);
    416  1.29.4.1    rpaulo 		return (icells * 4);
    417  1.29.4.1    rpaulo 	}
    418  1.29.4.1    rpaulo 
    419      1.10    tsubai 	parent = OF_parent(node);
    420      1.10    tsubai 	len = OF_getprop(parent, "interrupt-map", map, sizeof(map));
    421      1.28      matt 	mlen = OF_getprop(parent, "interrupt-map-mask", imapmask,
    422      1.28      matt 	    sizeof(imapmask));
    423      1.10    tsubai 
    424      1.22      matt 	if (mlen != -1)
    425      1.22      matt 		memcpy(maskedaddr, addr, mlen);
    426      1.22      matt again:
    427      1.10    tsubai 	if (len == -1 || mlen == -1)
    428      1.10    tsubai 		goto nomap;
    429      1.10    tsubai 
    430      1.10    tsubai #ifdef DIAGNOSTIC
    431      1.28      matt 	if (mlen == sizeof(imapmask)) {
    432      1.10    tsubai 		printf("interrupt-map too long\n");
    433      1.10    tsubai 		return -1;
    434      1.10    tsubai 	}
    435      1.10    tsubai #endif
    436      1.10    tsubai 
    437      1.10    tsubai 	/* mask addr by "interrupt-map-mask" */
    438      1.10    tsubai 	for (i = 0; i < mlen / 4; i++)
    439      1.28      matt 		maskedaddr[i] &= imapmask[i];
    440      1.10    tsubai 
    441      1.10    tsubai 	mp = map;
    442      1.22      matt 	i = 0;
    443      1.10    tsubai 	while (len > mlen) {
    444      1.18       wiz 		match = memcmp(maskedaddr, mp, mlen);
    445      1.10    tsubai 		mp += mlen / 4;
    446      1.10    tsubai 		len -= mlen;
    447      1.10    tsubai 
    448      1.10    tsubai 		/*
    449      1.22      matt 		 * We must read "#address-cells" and "#interrupt-cells" each
    450      1.22      matt 		 * time because each interrupt-parent may be different.
    451      1.10    tsubai 		 */
    452      1.10    tsubai 		iparent = *mp++;
    453      1.10    tsubai 		len -= 4;
    454      1.25      matt 		i = OF_getprop(iparent, "#address-cells", &acells, 4);
    455      1.25      matt 		if (i <= 0)
    456      1.25      matt 			acells = 0;
    457      1.25      matt 		else if (i != 4)
    458      1.22      matt 			return -1;
    459      1.10    tsubai 		if (OF_getprop(iparent, "#interrupt-cells", &icells, 4) != 4)
    460      1.22      matt 			return -1;
    461      1.10    tsubai 
    462      1.10    tsubai 		/* Found. */
    463      1.10    tsubai 		if (match == 0) {
    464      1.22      matt 			/*
    465      1.22      matt 			 * We matched on address/interrupt, but are we done?
    466      1.22      matt 			 */
    467      1.22      matt 			if (acells == 0) { /* XXX */
    468      1.22      matt 				/*
    469      1.22      matt 				 * If we are at the interrupt controller,
    470      1.22      matt 				 * we are finally done.  Save the result and
    471      1.22      matt 				 * return.
    472      1.22      matt 				 */
    473      1.22      matt 				memcpy(intr, mp, icells * 4);
    474      1.22      matt 				return icells * 4;
    475      1.22      matt 			}
    476      1.22      matt 			/*
    477      1.22      matt 			 * We are now at an intermedia interrupt node.  We
    478      1.22      matt 			 * need to use its interrupt mask and map the
    479      1.24       wiz 			 * supplied address/interrupt via its map.
    480      1.22      matt 			 */
    481      1.22      matt 			mlen = OF_getprop(iparent, "interrupt-map-mask",
    482      1.28      matt 			    imapmask, sizeof(imapmask));
    483      1.22      matt #ifdef DIAGNOSTIC
    484      1.22      matt 			if (mlen != (acells + icells)*4) {
    485      1.22      matt 				printf("interrupt-map inconsistent (%d, %d)\n",
    486      1.22      matt 				    mlen, (acells + icells)*4);
    487      1.22      matt 				return -1;
    488      1.22      matt 			}
    489      1.22      matt #endif
    490      1.22      matt 			memcpy(maskedaddr, mp, mlen);
    491      1.22      matt 			len = OF_getprop(iparent, "interrupt-map", map,
    492      1.22      matt 			    sizeof(map));
    493      1.22      matt 			goto again;
    494      1.10    tsubai 		}
    495      1.10    tsubai 
    496      1.22      matt 		mp += (acells + icells);
    497      1.22      matt 		len -= (acells + icells) * 4;
    498      1.10    tsubai 	}
    499      1.10    tsubai 
    500      1.10    tsubai nomap:
    501      1.10    tsubai 	/*
    502      1.10    tsubai 	 * If the node has no interrupt property and the parent is a
    503      1.10    tsubai 	 * pci-bridge, use parent's interrupt.  This occurs on a PCI
    504      1.10    tsubai 	 * slot.  (e.g. AHA-3940)
    505      1.10    tsubai 	 */
    506      1.18       wiz 	memset(name, 0, sizeof(name));
    507      1.10    tsubai 	OF_getprop(parent, "name", name, sizeof(name));
    508      1.10    tsubai 	if (strcmp(name, "pci-bridge") == 0) {
    509      1.10    tsubai 		len = OF_getprop(parent, "AAPL,interrupts", intr, 4) ;
    510      1.10    tsubai 		if (len == 4)
    511      1.10    tsubai 			return len;
    512      1.22      matt #if 0
    513      1.15    tsubai 		/*
    514      1.15    tsubai 		 * XXX I don't know what is the correct local address.
    515      1.15    tsubai 		 * XXX Use the first entry for now.
    516      1.15    tsubai 		 */
    517      1.15    tsubai 		len = OF_getprop(parent, "interrupt-map", map, sizeof(map));
    518      1.15    tsubai 		if (len >= 36) {
    519      1.15    tsubai 			addr = &map[5];
    520      1.15    tsubai 			return find_node_intr(parent, addr, intr);
    521      1.15    tsubai 		}
    522      1.22      matt #endif
    523      1.10    tsubai 	}
    524      1.10    tsubai 
    525      1.26    briggs 	/*
    526      1.26    briggs 	 * If all else fails, attempt to get AAPL, interrupts property.
    527      1.26    briggs 	 * Grackle, at least, uses this instead of above in some cases.
    528      1.26    briggs 	 */
    529      1.26    briggs 	len = OF_getprop(node, "AAPL,interrupts", intr, 4) ;
    530      1.10    tsubai 	if (len == 4)
    531      1.10    tsubai 		return len;
    532      1.10    tsubai 
    533      1.10    tsubai 	return -1;
    534       1.1    tsubai }
    535