pci_machdep.c revision 1.33 1 1.33 macallan /* $NetBSD: pci_machdep.c,v 1.33 2007/01/03 22:28:30 macallan Exp $ */
2 1.1 tsubai
3 1.1 tsubai /*
4 1.1 tsubai * Copyright (c) 1996 Christopher G. Demetriou. All rights reserved.
5 1.5 mycroft * Copyright (c) 1994 Charles M. Hannum. All rights reserved.
6 1.1 tsubai *
7 1.1 tsubai * Redistribution and use in source and binary forms, with or without
8 1.1 tsubai * modification, are permitted provided that the following conditions
9 1.1 tsubai * are met:
10 1.1 tsubai * 1. Redistributions of source code must retain the above copyright
11 1.1 tsubai * notice, this list of conditions and the following disclaimer.
12 1.1 tsubai * 2. Redistributions in binary form must reproduce the above copyright
13 1.1 tsubai * notice, this list of conditions and the following disclaimer in the
14 1.1 tsubai * documentation and/or other materials provided with the distribution.
15 1.1 tsubai * 3. All advertising materials mentioning features or use of this software
16 1.1 tsubai * must display the following acknowledgement:
17 1.5 mycroft * This product includes software developed by Charles M. Hannum.
18 1.1 tsubai * 4. The name of the author may not be used to endorse or promote products
19 1.1 tsubai * derived from this software without specific prior written permission.
20 1.1 tsubai *
21 1.1 tsubai * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
22 1.1 tsubai * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
23 1.1 tsubai * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
24 1.1 tsubai * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
25 1.1 tsubai * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
26 1.1 tsubai * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
27 1.1 tsubai * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
28 1.1 tsubai * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
29 1.1 tsubai * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
30 1.1 tsubai * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
31 1.1 tsubai */
32 1.1 tsubai
33 1.1 tsubai /*
34 1.1 tsubai * Machine-specific functions for PCI autoconfiguration.
35 1.1 tsubai *
36 1.1 tsubai * On PCs, there are two methods of generating PCI configuration cycles.
37 1.1 tsubai * We try to detect the appropriate mechanism for this machine and set
38 1.1 tsubai * up a few function pointers to access the correct method directly.
39 1.1 tsubai *
40 1.1 tsubai * The configuration method can be hard-coded in the config file by
41 1.1 tsubai * using `options PCI_CONF_MODE=N', where `N' is the configuration mode
42 1.1 tsubai * as defined section 3.6.4.1, `Generating Configuration Cycles'.
43 1.1 tsubai */
44 1.21 lukem
45 1.21 lukem #include <sys/cdefs.h>
46 1.33 macallan __KERNEL_RCSID(0, "$NetBSD: pci_machdep.c,v 1.33 2007/01/03 22:28:30 macallan Exp $");
47 1.1 tsubai
48 1.1 tsubai #include <sys/types.h>
49 1.1 tsubai #include <sys/param.h>
50 1.1 tsubai #include <sys/time.h>
51 1.1 tsubai #include <sys/systm.h>
52 1.1 tsubai #include <sys/errno.h>
53 1.1 tsubai #include <sys/device.h>
54 1.1 tsubai
55 1.13 mrg #include <uvm/uvm_extern.h>
56 1.1 tsubai
57 1.3 tsubai #define _MACPPC_BUS_DMA_PRIVATE
58 1.3 tsubai #include <machine/bus.h>
59 1.3 tsubai
60 1.33 macallan #include <machine/autoconf.h>
61 1.1 tsubai #include <machine/pio.h>
62 1.1 tsubai #include <machine/intr.h>
63 1.1 tsubai
64 1.1 tsubai #include <dev/pci/pcivar.h>
65 1.1 tsubai #include <dev/pci/pcireg.h>
66 1.33 macallan #include <dev/pci/ppbreg.h>
67 1.32 macallan #include <dev/pci/pcidevs.h>
68 1.1 tsubai
69 1.10 tsubai #include <dev/ofw/openfirm.h>
70 1.10 tsubai #include <dev/ofw/ofw_pci.h>
71 1.10 tsubai
72 1.10 tsubai static void fixpci __P((int, pci_chipset_tag_t));
73 1.10 tsubai static int find_node_intr __P((int, u_int32_t *, u_int32_t *));
74 1.33 macallan static void fix_cardbus_bridge(int, pci_chipset_tag_t, pcitag_t);
75 1.10 tsubai
76 1.3 tsubai /*
77 1.3 tsubai * PCI doesn't have any special needs; just use the generic versions
78 1.3 tsubai * of these functions.
79 1.3 tsubai */
80 1.3 tsubai struct macppc_bus_dma_tag pci_bus_dma_tag = {
81 1.3 tsubai 0, /* _bounce_thresh */
82 1.3 tsubai _bus_dmamap_create,
83 1.3 tsubai _bus_dmamap_destroy,
84 1.3 tsubai _bus_dmamap_load,
85 1.3 tsubai _bus_dmamap_load_mbuf,
86 1.3 tsubai _bus_dmamap_load_uio,
87 1.3 tsubai _bus_dmamap_load_raw,
88 1.3 tsubai _bus_dmamap_unload,
89 1.3 tsubai NULL, /* _dmamap_sync */
90 1.3 tsubai _bus_dmamem_alloc,
91 1.3 tsubai _bus_dmamem_free,
92 1.3 tsubai _bus_dmamem_map,
93 1.3 tsubai _bus_dmamem_unmap,
94 1.3 tsubai _bus_dmamem_mmap,
95 1.3 tsubai };
96 1.1 tsubai
97 1.1 tsubai void
98 1.1 tsubai pci_attach_hook(parent, self, pba)
99 1.1 tsubai struct device *parent, *self;
100 1.1 tsubai struct pcibus_attach_args *pba;
101 1.1 tsubai {
102 1.10 tsubai pci_chipset_tag_t pc = pba->pba_pc;
103 1.10 tsubai int bus = pba->pba_bus;
104 1.10 tsubai int node, nn, sz;
105 1.10 tsubai int32_t busrange[2];
106 1.10 tsubai
107 1.10 tsubai for (node = pc->node; node; node = nn) {
108 1.10 tsubai sz = OF_getprop(node, "bus-range", busrange, 8);
109 1.10 tsubai if (sz == 8 && busrange[0] == bus) {
110 1.10 tsubai fixpci(node, pc);
111 1.10 tsubai return;
112 1.10 tsubai }
113 1.10 tsubai if ((nn = OF_child(node)) != 0)
114 1.10 tsubai continue;
115 1.10 tsubai while ((nn = OF_peer(node)) == 0) {
116 1.10 tsubai node = OF_parent(node);
117 1.10 tsubai if (node == pc->node)
118 1.10 tsubai return; /* not found */
119 1.10 tsubai }
120 1.10 tsubai }
121 1.1 tsubai }
122 1.1 tsubai
123 1.1 tsubai int
124 1.1 tsubai pci_bus_maxdevs(pc, busno)
125 1.1 tsubai pci_chipset_tag_t pc;
126 1.1 tsubai int busno;
127 1.1 tsubai {
128 1.1 tsubai
129 1.1 tsubai /*
130 1.1 tsubai * Bus number is irrelevant. Configuration Mechanism 1 is in
131 1.1 tsubai * use, can have devices 0-32 (i.e. the `normal' range).
132 1.1 tsubai */
133 1.3 tsubai return 32;
134 1.1 tsubai }
135 1.1 tsubai
136 1.1 tsubai pcitag_t
137 1.1 tsubai pci_make_tag(pc, bus, device, function)
138 1.1 tsubai pci_chipset_tag_t pc;
139 1.1 tsubai int bus, device, function;
140 1.1 tsubai {
141 1.1 tsubai pcitag_t tag;
142 1.1 tsubai
143 1.1 tsubai if (bus >= 256 || device >= 32 || function >= 8)
144 1.1 tsubai panic("pci_make_tag: bad request");
145 1.1 tsubai
146 1.9 thorpej /* XXX magic number */
147 1.3 tsubai tag = 0x80000000 | (bus << 16) | (device << 11) | (function << 8);
148 1.1 tsubai
149 1.1 tsubai return tag;
150 1.1 tsubai }
151 1.1 tsubai
152 1.1 tsubai void
153 1.1 tsubai pci_decompose_tag(pc, tag, bp, dp, fp)
154 1.1 tsubai pci_chipset_tag_t pc;
155 1.1 tsubai pcitag_t tag;
156 1.1 tsubai int *bp, *dp, *fp;
157 1.1 tsubai {
158 1.9 thorpej
159 1.3 tsubai if (bp != NULL)
160 1.3 tsubai *bp = (tag >> 16) & 0xff;
161 1.3 tsubai if (dp != NULL)
162 1.3 tsubai *dp = (tag >> 11) & 0x1f;
163 1.3 tsubai if (fp != NULL)
164 1.9 thorpej *fp = (tag >> 8) & 0x07;
165 1.1 tsubai }
166 1.1 tsubai
167 1.1 tsubai pcireg_t
168 1.1 tsubai pci_conf_read(pc, tag, reg)
169 1.1 tsubai pci_chipset_tag_t pc;
170 1.1 tsubai pcitag_t tag;
171 1.1 tsubai int reg;
172 1.1 tsubai {
173 1.2 tsubai
174 1.10 tsubai return (*pc->conf_read)(pc, tag, reg);
175 1.1 tsubai }
176 1.1 tsubai
177 1.1 tsubai void
178 1.1 tsubai pci_conf_write(pc, tag, reg, data)
179 1.1 tsubai pci_chipset_tag_t pc;
180 1.1 tsubai pcitag_t tag;
181 1.1 tsubai int reg;
182 1.1 tsubai pcireg_t data;
183 1.1 tsubai {
184 1.2 tsubai
185 1.10 tsubai (*pc->conf_write)(pc, tag, reg, data);
186 1.1 tsubai }
187 1.1 tsubai
188 1.1 tsubai int
189 1.14 sommerfe pci_intr_map(pa, ihp)
190 1.14 sommerfe struct pci_attach_args *pa;
191 1.1 tsubai pci_intr_handle_t *ihp;
192 1.1 tsubai {
193 1.14 sommerfe int pin = pa->pa_intrpin;
194 1.14 sommerfe int line = pa->pa_intrline;
195 1.30 sanjayl
196 1.31 briggs #if DEBUG
197 1.30 sanjayl printf("%s: pin: %d, line: %d\n", __FUNCTION__, pin, line);
198 1.31 briggs #endif
199 1.1 tsubai
200 1.1 tsubai if (pin == 0) {
201 1.1 tsubai /* No IRQ used. */
202 1.30 sanjayl printf("pci_intr_map: interrupt pin %d\n", pin);
203 1.1 tsubai goto bad;
204 1.1 tsubai }
205 1.1 tsubai
206 1.1 tsubai if (pin > 4) {
207 1.1 tsubai printf("pci_intr_map: bad interrupt pin %d\n", pin);
208 1.1 tsubai goto bad;
209 1.1 tsubai }
210 1.1 tsubai
211 1.1 tsubai /*
212 1.1 tsubai * Section 6.2.4, `Miscellaneous Functions', says that 255 means
213 1.1 tsubai * `unknown' or `no connection' on a PC. We assume that a device with
214 1.1 tsubai * `no connection' either doesn't have an interrupt (in which case the
215 1.1 tsubai * pin number should be 0, and would have been noticed above), or
216 1.1 tsubai * wasn't configured by the BIOS (in which case we punt, since there's
217 1.1 tsubai * no real way we can know how the interrupt lines are mapped in the
218 1.1 tsubai * hardware).
219 1.1 tsubai *
220 1.1 tsubai * XXX
221 1.1 tsubai * Since IRQ 0 is only used by the clock, and we can't actually be sure
222 1.1 tsubai * that the BIOS did its job, we also recognize that as meaning that
223 1.1 tsubai * the BIOS has not configured the device.
224 1.1 tsubai */
225 1.1 tsubai if (line == 0 || line == 255) {
226 1.1 tsubai printf("pci_intr_map: no mapping for pin %c\n", '@' + pin);
227 1.1 tsubai goto bad;
228 1.1 tsubai } else {
229 1.1 tsubai if (line >= ICU_LEN) {
230 1.1 tsubai printf("pci_intr_map: bad interrupt line %d\n", line);
231 1.1 tsubai goto bad;
232 1.1 tsubai }
233 1.1 tsubai }
234 1.1 tsubai
235 1.1 tsubai *ihp = line;
236 1.1 tsubai return 0;
237 1.1 tsubai
238 1.1 tsubai bad:
239 1.1 tsubai *ihp = -1;
240 1.1 tsubai return 1;
241 1.1 tsubai }
242 1.1 tsubai
243 1.1 tsubai const char *
244 1.1 tsubai pci_intr_string(pc, ih)
245 1.1 tsubai pci_chipset_tag_t pc;
246 1.1 tsubai pci_intr_handle_t ih;
247 1.1 tsubai {
248 1.1 tsubai static char irqstr[8]; /* 4 + 2 + NULL + sanity */
249 1.1 tsubai
250 1.1 tsubai if (ih == 0 || ih >= ICU_LEN)
251 1.20 provos panic("pci_intr_string: bogus handle 0x%x", ih);
252 1.1 tsubai
253 1.1 tsubai sprintf(irqstr, "irq %d", ih);
254 1.1 tsubai return (irqstr);
255 1.1 tsubai
256 1.11 cgd }
257 1.11 cgd
258 1.11 cgd const struct evcnt *
259 1.11 cgd pci_intr_evcnt(pc, ih)
260 1.11 cgd pci_chipset_tag_t pc;
261 1.11 cgd pci_intr_handle_t ih;
262 1.11 cgd {
263 1.11 cgd
264 1.11 cgd /* XXX for now, no evcnt parent reported */
265 1.11 cgd return NULL;
266 1.1 tsubai }
267 1.1 tsubai
268 1.1 tsubai void *
269 1.1 tsubai pci_intr_establish(pc, ih, level, func, arg)
270 1.1 tsubai pci_chipset_tag_t pc;
271 1.1 tsubai pci_intr_handle_t ih;
272 1.1 tsubai int level, (*func) __P((void *));
273 1.1 tsubai void *arg;
274 1.1 tsubai {
275 1.1 tsubai
276 1.1 tsubai if (ih == 0 || ih >= ICU_LEN)
277 1.20 provos panic("pci_intr_establish: bogus handle 0x%x", ih);
278 1.1 tsubai
279 1.1 tsubai return intr_establish(ih, IST_LEVEL, level, func, arg);
280 1.1 tsubai }
281 1.1 tsubai
282 1.1 tsubai void
283 1.1 tsubai pci_intr_disestablish(pc, cookie)
284 1.1 tsubai pci_chipset_tag_t pc;
285 1.1 tsubai void *cookie;
286 1.1 tsubai {
287 1.1 tsubai
288 1.1 tsubai intr_disestablish(cookie);
289 1.10 tsubai }
290 1.10 tsubai
291 1.10 tsubai #define pcibus(x) \
292 1.10 tsubai (((x) & OFW_PCI_PHYS_HI_BUSMASK) >> OFW_PCI_PHYS_HI_BUSSHIFT)
293 1.10 tsubai #define pcidev(x) \
294 1.10 tsubai (((x) & OFW_PCI_PHYS_HI_DEVICEMASK) >> OFW_PCI_PHYS_HI_DEVICESHIFT)
295 1.10 tsubai #define pcifunc(x) \
296 1.10 tsubai (((x) & OFW_PCI_PHYS_HI_FUNCTIONMASK) >> OFW_PCI_PHYS_HI_FUNCTIONSHIFT)
297 1.10 tsubai
298 1.10 tsubai void
299 1.10 tsubai fixpci(parent, pc)
300 1.10 tsubai int parent;
301 1.10 tsubai pci_chipset_tag_t pc;
302 1.10 tsubai {
303 1.10 tsubai int node;
304 1.10 tsubai pcitag_t tag;
305 1.33 macallan pcireg_t csr, intr, id, cr;
306 1.22 matt int len, i, ilen;
307 1.10 tsubai int32_t irqs[4];
308 1.10 tsubai struct {
309 1.10 tsubai u_int32_t phys_hi, phys_mid, phys_lo;
310 1.10 tsubai u_int32_t size_hi, size_lo;
311 1.10 tsubai } addr[8];
312 1.22 matt struct {
313 1.22 matt u_int32_t phys_hi, phys_mid, phys_lo;
314 1.22 matt u_int32_t icells[5];
315 1.22 matt } iaddr;
316 1.10 tsubai
317 1.22 matt len = OF_getprop(parent, "#interrupt-cells", &ilen, sizeof(ilen));
318 1.22 matt if (len < 0)
319 1.22 matt ilen = 0;
320 1.10 tsubai for (node = OF_child(parent); node; node = OF_peer(node)) {
321 1.10 tsubai len = OF_getprop(node, "assigned-addresses", addr,
322 1.10 tsubai sizeof(addr));
323 1.10 tsubai if (len < (int)sizeof(addr[0]))
324 1.10 tsubai continue;
325 1.10 tsubai
326 1.10 tsubai tag = pci_make_tag(pc, pcibus(addr[0].phys_hi),
327 1.10 tsubai pcidev(addr[0].phys_hi),
328 1.10 tsubai pcifunc(addr[0].phys_hi));
329 1.10 tsubai
330 1.10 tsubai /*
331 1.10 tsubai * Make sure the IO and MEM enable bits are set in the CSR.
332 1.10 tsubai */
333 1.10 tsubai csr = pci_conf_read(pc, tag, PCI_COMMAND_STATUS_REG);
334 1.10 tsubai csr &= ~(PCI_COMMAND_IO_ENABLE | PCI_COMMAND_MEM_ENABLE);
335 1.10 tsubai
336 1.10 tsubai for (i = 0; i < len / sizeof(addr[0]); i++) {
337 1.10 tsubai switch (addr[i].phys_hi & OFW_PCI_PHYS_HI_SPACEMASK) {
338 1.10 tsubai case OFW_PCI_PHYS_HI_SPACE_IO:
339 1.10 tsubai csr |= PCI_COMMAND_IO_ENABLE;
340 1.10 tsubai break;
341 1.10 tsubai
342 1.10 tsubai case OFW_PCI_PHYS_HI_SPACE_MEM32:
343 1.19 wrstuden case OFW_PCI_PHYS_HI_SPACE_MEM64:
344 1.10 tsubai csr |= PCI_COMMAND_MEM_ENABLE;
345 1.10 tsubai break;
346 1.10 tsubai }
347 1.10 tsubai }
348 1.10 tsubai
349 1.10 tsubai pci_conf_write(pc, tag, PCI_COMMAND_STATUS_REG, csr);
350 1.10 tsubai
351 1.10 tsubai /*
352 1.10 tsubai * Make sure the line register is programmed with the
353 1.10 tsubai * interrupt mapping.
354 1.10 tsubai */
355 1.23 matt if (ilen == 0) {
356 1.23 matt /*
357 1.23 matt * Early Apple OFW implementation don't handle
358 1.23 matt * interrupts as defined by the OFW PCI bindings.
359 1.23 matt */
360 1.23 matt len = OF_getprop(node, "AAPL,interrupts", irqs, 4);
361 1.23 matt } else {
362 1.23 matt iaddr.phys_hi = addr[0].phys_hi;
363 1.23 matt iaddr.phys_mid = addr[0].phys_mid;
364 1.23 matt iaddr.phys_lo = addr[0].phys_lo;
365 1.23 matt /*
366 1.23 matt * Thankfully, PCI can only have one entry in its
367 1.23 matt * "interrupts" property.
368 1.23 matt */
369 1.23 matt len = OF_getprop(node, "interrupts", &iaddr.icells[0],
370 1.23 matt 4*ilen);
371 1.23 matt if (len != 4*ilen)
372 1.23 matt continue;
373 1.23 matt len = find_node_intr(node, &iaddr.phys_hi, irqs);
374 1.23 matt }
375 1.27 briggs if (len <= 0) {
376 1.27 briggs /*
377 1.27 briggs * If we still don't have an interrupt, try one
378 1.27 briggs * more time. This case covers devices behind the
379 1.27 briggs * PCI-PCI bridge in a UMAX S900 or similar (9500?)
380 1.27 briggs * system. These slots all share the bridge's
381 1.27 briggs * interrupt.
382 1.27 briggs */
383 1.27 briggs len = find_node_intr(node, &addr[0].phys_hi, irqs);
384 1.27 briggs if (len <= 0)
385 1.27 briggs continue;
386 1.22 matt }
387 1.32 macallan
388 1.32 macallan /*
389 1.32 macallan * For PowerBook 2400, 3400 and original G3:
390 1.32 macallan * check if we have a 2nd ohare PIC - if so frob the built-in
391 1.32 macallan * tlp's IRQ to 60
392 1.32 macallan * first see if we have something on bus 0 device 13 and if
393 1.32 macallan * it's a DEC 21041
394 1.32 macallan */
395 1.32 macallan id = pci_conf_read(pc, tag, PCI_ID_REG);
396 1.32 macallan if ((tag == pci_make_tag(pc, 0, 13, 0)) &&
397 1.32 macallan (PCI_VENDOR(id) == PCI_VENDOR_DEC) &&
398 1.32 macallan (PCI_PRODUCT(id) == PCI_PRODUCT_DEC_21041)) {
399 1.32 macallan
400 1.32 macallan /* now look for the 2nd ohare */
401 1.32 macallan if (OF_finddevice("/bandit/pci106b,7") != -1) {
402 1.32 macallan
403 1.32 macallan irqs[0] = 60;
404 1.32 macallan printf("\nohare: frobbing tlp IRQ to 60");
405 1.32 macallan }
406 1.32 macallan }
407 1.32 macallan
408 1.27 briggs intr = pci_conf_read(pc, tag, PCI_INTERRUPT_REG);
409 1.27 briggs intr &= ~PCI_INTERRUPT_LINE_MASK;
410 1.27 briggs intr |= irqs[0] & PCI_INTERRUPT_LINE_MASK;
411 1.27 briggs pci_conf_write(pc, tag, PCI_INTERRUPT_REG, intr);
412 1.33 macallan
413 1.33 macallan /* fix secondary bus numbers on CardBus bridges */
414 1.33 macallan cr = pci_conf_read(pc, tag, PCI_CLASS_REG);
415 1.33 macallan if ((PCI_CLASS(cr) == PCI_CLASS_BRIDGE) &&
416 1.33 macallan (PCI_SUBCLASS(cr) == PCI_SUBCLASS_BRIDGE_CARDBUS)) {
417 1.33 macallan uint32_t bi, busid;
418 1.33 macallan
419 1.33 macallan /*
420 1.33 macallan * we found a CardBus bridge. Check if the bus number
421 1.33 macallan * is sane
422 1.33 macallan */
423 1.33 macallan bi = pci_conf_read(pc, tag, PPB_REG_BUSINFO);
424 1.33 macallan busid = bi & 0xff;
425 1.33 macallan if (busid == 0) {
426 1.33 macallan fix_cardbus_bridge(node, pc, tag);
427 1.33 macallan }
428 1.33 macallan }
429 1.33 macallan }
430 1.33 macallan }
431 1.33 macallan
432 1.33 macallan static void
433 1.33 macallan fix_cardbus_bridge(int node, pci_chipset_tag_t pc, pcitag_t tag)
434 1.33 macallan {
435 1.33 macallan uint32_t bus_number;
436 1.33 macallan pcireg_t bi;
437 1.33 macallan int bus, dev, fn, ih, len;
438 1.33 macallan char path[256];
439 1.33 macallan
440 1.33 macallan len = OF_package_to_path(node, path, sizeof(path));
441 1.33 macallan path[len] = 0;
442 1.33 macallan
443 1.33 macallan ih = OF_open(path);
444 1.33 macallan OF_call_method("load-ata", ih, 0, 0);
445 1.33 macallan OF_close(ih);
446 1.33 macallan
447 1.33 macallan if (OF_getprop(node, "AAPL,bus-id", &bus_number, sizeof(bus_number))
448 1.33 macallan > 0) {
449 1.33 macallan
450 1.33 macallan printf("\n%s: fixing bus number to %d", path, bus_number);
451 1.33 macallan pci_decompose_tag(pc, tag, &bus, &dev, &fn);
452 1.33 macallan bi = pci_conf_read(pc, tag, PPB_REG_BUSINFO);
453 1.33 macallan bi &= 0xff000000;
454 1.33 macallan /* XXX subordinate is always 32 here */
455 1.33 macallan bi |= (bus & 0xff) | (bus_number << 8) | 0x200000;
456 1.33 macallan pci_conf_write(pc, tag, PPB_REG_BUSINFO, bi);
457 1.10 tsubai }
458 1.10 tsubai }
459 1.10 tsubai
460 1.10 tsubai /*
461 1.10 tsubai * Find PCI IRQ of the node from OF tree.
462 1.10 tsubai */
463 1.10 tsubai int
464 1.10 tsubai find_node_intr(node, addr, intr)
465 1.10 tsubai int node;
466 1.10 tsubai u_int32_t *addr, *intr;
467 1.10 tsubai {
468 1.10 tsubai int parent, len, mlen, iparent;
469 1.10 tsubai int match, i;
470 1.22 matt u_int32_t map[160];
471 1.22 matt const u_int32_t *mp;
472 1.28 matt u_int32_t imapmask[8], maskedaddr[8];
473 1.22 matt u_int32_t acells, icells;
474 1.10 tsubai char name[32];
475 1.10 tsubai
476 1.30 sanjayl /* XXXSL: 1st check for a interrupt-parent property */
477 1.30 sanjayl if (OF_getprop(node, "interrupt-parent", &iparent, sizeof(iparent)) == sizeof(iparent))
478 1.30 sanjayl {
479 1.30 sanjayl /* How many cells to specify an interrupt ?? */
480 1.30 sanjayl if (OF_getprop(iparent, "#interrupt-cells", &icells, 4) != 4)
481 1.30 sanjayl return -1;
482 1.30 sanjayl
483 1.30 sanjayl if (OF_getprop(node, "interrupts", &map, sizeof(map)) != (icells * 4))
484 1.30 sanjayl return -1;
485 1.30 sanjayl
486 1.30 sanjayl memcpy(intr, map, icells * 4);
487 1.30 sanjayl return (icells * 4);
488 1.30 sanjayl }
489 1.30 sanjayl
490 1.10 tsubai parent = OF_parent(node);
491 1.10 tsubai len = OF_getprop(parent, "interrupt-map", map, sizeof(map));
492 1.28 matt mlen = OF_getprop(parent, "interrupt-map-mask", imapmask,
493 1.28 matt sizeof(imapmask));
494 1.10 tsubai
495 1.22 matt if (mlen != -1)
496 1.22 matt memcpy(maskedaddr, addr, mlen);
497 1.22 matt again:
498 1.10 tsubai if (len == -1 || mlen == -1)
499 1.10 tsubai goto nomap;
500 1.10 tsubai
501 1.10 tsubai #ifdef DIAGNOSTIC
502 1.28 matt if (mlen == sizeof(imapmask)) {
503 1.10 tsubai printf("interrupt-map too long\n");
504 1.10 tsubai return -1;
505 1.10 tsubai }
506 1.10 tsubai #endif
507 1.10 tsubai
508 1.10 tsubai /* mask addr by "interrupt-map-mask" */
509 1.10 tsubai for (i = 0; i < mlen / 4; i++)
510 1.28 matt maskedaddr[i] &= imapmask[i];
511 1.10 tsubai
512 1.10 tsubai mp = map;
513 1.22 matt i = 0;
514 1.10 tsubai while (len > mlen) {
515 1.18 wiz match = memcmp(maskedaddr, mp, mlen);
516 1.10 tsubai mp += mlen / 4;
517 1.10 tsubai len -= mlen;
518 1.10 tsubai
519 1.10 tsubai /*
520 1.22 matt * We must read "#address-cells" and "#interrupt-cells" each
521 1.22 matt * time because each interrupt-parent may be different.
522 1.10 tsubai */
523 1.10 tsubai iparent = *mp++;
524 1.10 tsubai len -= 4;
525 1.25 matt i = OF_getprop(iparent, "#address-cells", &acells, 4);
526 1.25 matt if (i <= 0)
527 1.25 matt acells = 0;
528 1.25 matt else if (i != 4)
529 1.22 matt return -1;
530 1.10 tsubai if (OF_getprop(iparent, "#interrupt-cells", &icells, 4) != 4)
531 1.22 matt return -1;
532 1.10 tsubai
533 1.10 tsubai /* Found. */
534 1.10 tsubai if (match == 0) {
535 1.22 matt /*
536 1.22 matt * We matched on address/interrupt, but are we done?
537 1.22 matt */
538 1.22 matt if (acells == 0) { /* XXX */
539 1.22 matt /*
540 1.22 matt * If we are at the interrupt controller,
541 1.22 matt * we are finally done. Save the result and
542 1.22 matt * return.
543 1.22 matt */
544 1.22 matt memcpy(intr, mp, icells * 4);
545 1.22 matt return icells * 4;
546 1.22 matt }
547 1.22 matt /*
548 1.22 matt * We are now at an intermedia interrupt node. We
549 1.22 matt * need to use its interrupt mask and map the
550 1.24 wiz * supplied address/interrupt via its map.
551 1.22 matt */
552 1.22 matt mlen = OF_getprop(iparent, "interrupt-map-mask",
553 1.28 matt imapmask, sizeof(imapmask));
554 1.22 matt #ifdef DIAGNOSTIC
555 1.22 matt if (mlen != (acells + icells)*4) {
556 1.22 matt printf("interrupt-map inconsistent (%d, %d)\n",
557 1.22 matt mlen, (acells + icells)*4);
558 1.22 matt return -1;
559 1.22 matt }
560 1.22 matt #endif
561 1.22 matt memcpy(maskedaddr, mp, mlen);
562 1.22 matt len = OF_getprop(iparent, "interrupt-map", map,
563 1.22 matt sizeof(map));
564 1.22 matt goto again;
565 1.10 tsubai }
566 1.10 tsubai
567 1.22 matt mp += (acells + icells);
568 1.22 matt len -= (acells + icells) * 4;
569 1.10 tsubai }
570 1.10 tsubai
571 1.10 tsubai nomap:
572 1.10 tsubai /*
573 1.10 tsubai * If the node has no interrupt property and the parent is a
574 1.10 tsubai * pci-bridge, use parent's interrupt. This occurs on a PCI
575 1.10 tsubai * slot. (e.g. AHA-3940)
576 1.10 tsubai */
577 1.18 wiz memset(name, 0, sizeof(name));
578 1.10 tsubai OF_getprop(parent, "name", name, sizeof(name));
579 1.10 tsubai if (strcmp(name, "pci-bridge") == 0) {
580 1.10 tsubai len = OF_getprop(parent, "AAPL,interrupts", intr, 4) ;
581 1.10 tsubai if (len == 4)
582 1.10 tsubai return len;
583 1.22 matt #if 0
584 1.15 tsubai /*
585 1.15 tsubai * XXX I don't know what is the correct local address.
586 1.15 tsubai * XXX Use the first entry for now.
587 1.15 tsubai */
588 1.15 tsubai len = OF_getprop(parent, "interrupt-map", map, sizeof(map));
589 1.15 tsubai if (len >= 36) {
590 1.15 tsubai addr = &map[5];
591 1.15 tsubai return find_node_intr(parent, addr, intr);
592 1.15 tsubai }
593 1.22 matt #endif
594 1.10 tsubai }
595 1.10 tsubai
596 1.26 briggs /*
597 1.26 briggs * If all else fails, attempt to get AAPL, interrupts property.
598 1.26 briggs * Grackle, at least, uses this instead of above in some cases.
599 1.26 briggs */
600 1.26 briggs len = OF_getprop(node, "AAPL,interrupts", intr, 4) ;
601 1.10 tsubai if (len == 4)
602 1.10 tsubai return len;
603 1.10 tsubai
604 1.10 tsubai return -1;
605 1.1 tsubai }
606