pci_machdep.c revision 1.5 1 1.5 mycroft /* $NetBSD: pci_machdep.c,v 1.5 1998/08/15 03:02:41 mycroft Exp $ */
2 1.1 tsubai
3 1.1 tsubai /*
4 1.1 tsubai * Copyright (c) 1996 Christopher G. Demetriou. All rights reserved.
5 1.5 mycroft * Copyright (c) 1994 Charles M. Hannum. All rights reserved.
6 1.1 tsubai *
7 1.1 tsubai * Redistribution and use in source and binary forms, with or without
8 1.1 tsubai * modification, are permitted provided that the following conditions
9 1.1 tsubai * are met:
10 1.1 tsubai * 1. Redistributions of source code must retain the above copyright
11 1.1 tsubai * notice, this list of conditions and the following disclaimer.
12 1.1 tsubai * 2. Redistributions in binary form must reproduce the above copyright
13 1.1 tsubai * notice, this list of conditions and the following disclaimer in the
14 1.1 tsubai * documentation and/or other materials provided with the distribution.
15 1.1 tsubai * 3. All advertising materials mentioning features or use of this software
16 1.1 tsubai * must display the following acknowledgement:
17 1.5 mycroft * This product includes software developed by Charles M. Hannum.
18 1.1 tsubai * 4. The name of the author may not be used to endorse or promote products
19 1.1 tsubai * derived from this software without specific prior written permission.
20 1.1 tsubai *
21 1.1 tsubai * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
22 1.1 tsubai * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
23 1.1 tsubai * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
24 1.1 tsubai * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
25 1.1 tsubai * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
26 1.1 tsubai * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
27 1.1 tsubai * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
28 1.1 tsubai * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
29 1.1 tsubai * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
30 1.1 tsubai * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
31 1.1 tsubai */
32 1.1 tsubai
33 1.1 tsubai /*
34 1.1 tsubai * Machine-specific functions for PCI autoconfiguration.
35 1.1 tsubai *
36 1.1 tsubai * On PCs, there are two methods of generating PCI configuration cycles.
37 1.1 tsubai * We try to detect the appropriate mechanism for this machine and set
38 1.1 tsubai * up a few function pointers to access the correct method directly.
39 1.1 tsubai *
40 1.1 tsubai * The configuration method can be hard-coded in the config file by
41 1.1 tsubai * using `options PCI_CONF_MODE=N', where `N' is the configuration mode
42 1.1 tsubai * as defined section 3.6.4.1, `Generating Configuration Cycles'.
43 1.1 tsubai */
44 1.1 tsubai
45 1.1 tsubai #include <sys/types.h>
46 1.1 tsubai #include <sys/param.h>
47 1.1 tsubai #include <sys/time.h>
48 1.1 tsubai #include <sys/systm.h>
49 1.1 tsubai #include <sys/errno.h>
50 1.1 tsubai #include <sys/device.h>
51 1.1 tsubai
52 1.1 tsubai #include <vm/vm.h>
53 1.1 tsubai #include <vm/vm_kern.h>
54 1.1 tsubai
55 1.3 tsubai #define _MACPPC_BUS_DMA_PRIVATE
56 1.3 tsubai #include <machine/bus.h>
57 1.3 tsubai
58 1.1 tsubai #include <machine/bus.h>
59 1.1 tsubai #include <machine/pio.h>
60 1.1 tsubai #include <machine/intr.h>
61 1.1 tsubai
62 1.1 tsubai #include <dev/pci/pcivar.h>
63 1.1 tsubai #include <dev/pci/pcireg.h>
64 1.1 tsubai
65 1.3 tsubai /*
66 1.3 tsubai * PCI doesn't have any special needs; just use the generic versions
67 1.3 tsubai * of these functions.
68 1.3 tsubai */
69 1.3 tsubai struct macppc_bus_dma_tag pci_bus_dma_tag = {
70 1.3 tsubai 0, /* _bounce_thresh */
71 1.3 tsubai _bus_dmamap_create,
72 1.3 tsubai _bus_dmamap_destroy,
73 1.3 tsubai _bus_dmamap_load,
74 1.3 tsubai _bus_dmamap_load_mbuf,
75 1.3 tsubai _bus_dmamap_load_uio,
76 1.3 tsubai _bus_dmamap_load_raw,
77 1.3 tsubai _bus_dmamap_unload,
78 1.3 tsubai NULL, /* _dmamap_sync */
79 1.3 tsubai _bus_dmamem_alloc,
80 1.3 tsubai _bus_dmamem_free,
81 1.3 tsubai _bus_dmamem_map,
82 1.3 tsubai _bus_dmamem_unmap,
83 1.3 tsubai _bus_dmamem_mmap,
84 1.3 tsubai };
85 1.1 tsubai
86 1.1 tsubai void
87 1.1 tsubai pci_attach_hook(parent, self, pba)
88 1.1 tsubai struct device *parent, *self;
89 1.1 tsubai struct pcibus_attach_args *pba;
90 1.1 tsubai {
91 1.1 tsubai }
92 1.1 tsubai
93 1.1 tsubai int
94 1.1 tsubai pci_bus_maxdevs(pc, busno)
95 1.1 tsubai pci_chipset_tag_t pc;
96 1.1 tsubai int busno;
97 1.1 tsubai {
98 1.1 tsubai
99 1.1 tsubai /*
100 1.1 tsubai * Bus number is irrelevant. Configuration Mechanism 1 is in
101 1.1 tsubai * use, can have devices 0-32 (i.e. the `normal' range).
102 1.1 tsubai */
103 1.3 tsubai return 32;
104 1.1 tsubai }
105 1.1 tsubai
106 1.1 tsubai pcitag_t
107 1.1 tsubai pci_make_tag(pc, bus, device, function)
108 1.1 tsubai pci_chipset_tag_t pc;
109 1.1 tsubai int bus, device, function;
110 1.1 tsubai {
111 1.1 tsubai pcitag_t tag;
112 1.1 tsubai
113 1.1 tsubai if (bus >= 256 || device >= 32 || function >= 8)
114 1.1 tsubai panic("pci_make_tag: bad request");
115 1.1 tsubai
116 1.3 tsubai tag = 0x80000000 | (bus << 16) | (device << 11) | (function << 8);
117 1.1 tsubai
118 1.1 tsubai return tag;
119 1.1 tsubai }
120 1.1 tsubai
121 1.1 tsubai void
122 1.1 tsubai pci_decompose_tag(pc, tag, bp, dp, fp)
123 1.1 tsubai pci_chipset_tag_t pc;
124 1.1 tsubai pcitag_t tag;
125 1.1 tsubai int *bp, *dp, *fp;
126 1.1 tsubai {
127 1.3 tsubai if (bp != NULL)
128 1.3 tsubai *bp = (tag >> 16) & 0xff;
129 1.3 tsubai if (dp != NULL)
130 1.3 tsubai *dp = (tag >> 11) & 0x1f;
131 1.3 tsubai if (fp != NULL)
132 1.3 tsubai *fp = (tag >> 8) & 0x7;
133 1.3 tsubai
134 1.1 tsubai return;
135 1.1 tsubai }
136 1.1 tsubai
137 1.1 tsubai pcireg_t
138 1.1 tsubai pci_conf_read(pc, tag, reg)
139 1.1 tsubai pci_chipset_tag_t pc;
140 1.1 tsubai pcitag_t tag;
141 1.1 tsubai int reg;
142 1.1 tsubai {
143 1.1 tsubai pcireg_t data;
144 1.2 tsubai struct pci_bridge *r;
145 1.1 tsubai
146 1.2 tsubai if (pc == PCI_CHIPSET_MPC106) {
147 1.2 tsubai r = &pci_bridges[0];
148 1.2 tsubai
149 1.2 tsubai out32rb(r->addr, tag | reg);
150 1.2 tsubai data = in32rb(r->data);
151 1.2 tsubai out32rb(r->addr, 0);
152 1.2 tsubai } else {
153 1.3 tsubai int bus, dev, func;
154 1.3 tsubai
155 1.3 tsubai pci_decompose_tag(pc, tag, &bus, &dev, &func);
156 1.3 tsubai
157 1.3 tsubai /*
158 1.3 tsubai * bandit's minimum device number is 11. So we behave
159 1.3 tsubai * as if there is no device when dev < 11.
160 1.3 tsubai */
161 1.3 tsubai if (dev < 11) {
162 1.3 tsubai if (reg == PCI_ID_REG)
163 1.3 tsubai return 0xffffffff;
164 1.3 tsubai panic("pci_conf_read");
165 1.3 tsubai }
166 1.3 tsubai
167 1.2 tsubai r = &pci_bridges[pc];
168 1.2 tsubai
169 1.3 tsubai out32rb(r->addr, (1 << dev) | reg);
170 1.2 tsubai DELAY(10);
171 1.2 tsubai data = in32rb(r->data);
172 1.2 tsubai DELAY(10);
173 1.2 tsubai out32rb(r->addr, 0);
174 1.2 tsubai DELAY(10);
175 1.2 tsubai }
176 1.1 tsubai
177 1.1 tsubai return data;
178 1.1 tsubai }
179 1.1 tsubai
180 1.1 tsubai void
181 1.1 tsubai pci_conf_write(pc, tag, reg, data)
182 1.1 tsubai pci_chipset_tag_t pc;
183 1.1 tsubai pcitag_t tag;
184 1.1 tsubai int reg;
185 1.1 tsubai pcireg_t data;
186 1.1 tsubai {
187 1.2 tsubai struct pci_bridge *r = &pci_bridges[pc];
188 1.1 tsubai
189 1.2 tsubai if (pc == PCI_CHIPSET_MPC106) {
190 1.2 tsubai r = &pci_bridges[0];
191 1.2 tsubai
192 1.2 tsubai out32rb(r->addr, tag | reg);
193 1.2 tsubai out32rb(r->data, data);
194 1.2 tsubai out32rb(r->addr, 0);
195 1.2 tsubai } else {
196 1.3 tsubai int bus, dev, func;
197 1.3 tsubai
198 1.3 tsubai pci_decompose_tag(pc, tag, &bus, &dev, &func);
199 1.3 tsubai
200 1.3 tsubai if (dev < 11)
201 1.4 tsubai panic("pci_conf_write");
202 1.3 tsubai
203 1.2 tsubai r = &pci_bridges[pc];
204 1.2 tsubai
205 1.3 tsubai out32rb(r->addr, (1 << dev) | reg);
206 1.2 tsubai DELAY(10);
207 1.2 tsubai out32rb(r->data, data);
208 1.2 tsubai DELAY(10);
209 1.2 tsubai out32rb(r->addr, 0);
210 1.2 tsubai DELAY(10);
211 1.2 tsubai }
212 1.1 tsubai }
213 1.1 tsubai
214 1.1 tsubai int
215 1.1 tsubai pci_intr_map(pc, intrtag, pin, line, ihp)
216 1.1 tsubai pci_chipset_tag_t pc;
217 1.1 tsubai pcitag_t intrtag;
218 1.1 tsubai int pin, line;
219 1.1 tsubai pci_intr_handle_t *ihp;
220 1.1 tsubai {
221 1.1 tsubai
222 1.1 tsubai if (pin == 0) {
223 1.1 tsubai /* No IRQ used. */
224 1.1 tsubai goto bad;
225 1.1 tsubai }
226 1.1 tsubai
227 1.1 tsubai if (pin > 4) {
228 1.1 tsubai printf("pci_intr_map: bad interrupt pin %d\n", pin);
229 1.1 tsubai goto bad;
230 1.1 tsubai }
231 1.1 tsubai
232 1.1 tsubai /*
233 1.1 tsubai * Section 6.2.4, `Miscellaneous Functions', says that 255 means
234 1.1 tsubai * `unknown' or `no connection' on a PC. We assume that a device with
235 1.1 tsubai * `no connection' either doesn't have an interrupt (in which case the
236 1.1 tsubai * pin number should be 0, and would have been noticed above), or
237 1.1 tsubai * wasn't configured by the BIOS (in which case we punt, since there's
238 1.1 tsubai * no real way we can know how the interrupt lines are mapped in the
239 1.1 tsubai * hardware).
240 1.1 tsubai *
241 1.1 tsubai * XXX
242 1.1 tsubai * Since IRQ 0 is only used by the clock, and we can't actually be sure
243 1.1 tsubai * that the BIOS did its job, we also recognize that as meaning that
244 1.1 tsubai * the BIOS has not configured the device.
245 1.1 tsubai */
246 1.1 tsubai if (line == 0 || line == 255) {
247 1.1 tsubai printf("pci_intr_map: no mapping for pin %c\n", '@' + pin);
248 1.1 tsubai goto bad;
249 1.1 tsubai } else {
250 1.1 tsubai if (line >= ICU_LEN) {
251 1.1 tsubai printf("pci_intr_map: bad interrupt line %d\n", line);
252 1.1 tsubai goto bad;
253 1.1 tsubai }
254 1.1 tsubai }
255 1.1 tsubai
256 1.1 tsubai *ihp = line;
257 1.1 tsubai return 0;
258 1.1 tsubai
259 1.1 tsubai bad:
260 1.1 tsubai *ihp = -1;
261 1.1 tsubai return 1;
262 1.1 tsubai }
263 1.1 tsubai
264 1.1 tsubai const char *
265 1.1 tsubai pci_intr_string(pc, ih)
266 1.1 tsubai pci_chipset_tag_t pc;
267 1.1 tsubai pci_intr_handle_t ih;
268 1.1 tsubai {
269 1.1 tsubai static char irqstr[8]; /* 4 + 2 + NULL + sanity */
270 1.1 tsubai
271 1.1 tsubai if (ih == 0 || ih >= ICU_LEN)
272 1.1 tsubai panic("pci_intr_string: bogus handle 0x%x\n", ih);
273 1.1 tsubai
274 1.1 tsubai sprintf(irqstr, "irq %d", ih);
275 1.1 tsubai return (irqstr);
276 1.1 tsubai
277 1.1 tsubai }
278 1.1 tsubai
279 1.1 tsubai extern void * intr_establish();
280 1.1 tsubai extern void intr_disestablish();
281 1.1 tsubai
282 1.1 tsubai void *
283 1.1 tsubai pci_intr_establish(pc, ih, level, func, arg)
284 1.1 tsubai pci_chipset_tag_t pc;
285 1.1 tsubai pci_intr_handle_t ih;
286 1.1 tsubai int level, (*func) __P((void *));
287 1.1 tsubai void *arg;
288 1.1 tsubai {
289 1.1 tsubai
290 1.1 tsubai if (ih == 0 || ih >= ICU_LEN)
291 1.1 tsubai panic("pci_intr_establish: bogus handle 0x%x\n", ih);
292 1.1 tsubai
293 1.1 tsubai return intr_establish(ih, IST_LEVEL, level, func, arg);
294 1.1 tsubai }
295 1.1 tsubai
296 1.1 tsubai void
297 1.1 tsubai pci_intr_disestablish(pc, cookie)
298 1.1 tsubai pci_chipset_tag_t pc;
299 1.1 tsubai void *cookie;
300 1.1 tsubai {
301 1.1 tsubai
302 1.1 tsubai intr_disestablish(cookie);
303 1.1 tsubai }
304