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pci_machdep.c revision 1.9.2.3
      1  1.9.2.2   bouyer /*	$NetBSD: pci_machdep.c,v 1.9.2.3 2001/01/18 09:22:42 bouyer Exp $	*/
      2      1.1   tsubai 
      3      1.1   tsubai /*
      4      1.1   tsubai  * Copyright (c) 1996 Christopher G. Demetriou.  All rights reserved.
      5      1.5  mycroft  * Copyright (c) 1994 Charles M. Hannum.  All rights reserved.
      6      1.1   tsubai  *
      7      1.1   tsubai  * Redistribution and use in source and binary forms, with or without
      8      1.1   tsubai  * modification, are permitted provided that the following conditions
      9      1.1   tsubai  * are met:
     10      1.1   tsubai  * 1. Redistributions of source code must retain the above copyright
     11      1.1   tsubai  *    notice, this list of conditions and the following disclaimer.
     12      1.1   tsubai  * 2. Redistributions in binary form must reproduce the above copyright
     13      1.1   tsubai  *    notice, this list of conditions and the following disclaimer in the
     14      1.1   tsubai  *    documentation and/or other materials provided with the distribution.
     15      1.1   tsubai  * 3. All advertising materials mentioning features or use of this software
     16      1.1   tsubai  *    must display the following acknowledgement:
     17      1.5  mycroft  *	This product includes software developed by Charles M. Hannum.
     18      1.1   tsubai  * 4. The name of the author may not be used to endorse or promote products
     19      1.1   tsubai  *    derived from this software without specific prior written permission.
     20      1.1   tsubai  *
     21      1.1   tsubai  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
     22      1.1   tsubai  * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
     23      1.1   tsubai  * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
     24      1.1   tsubai  * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
     25      1.1   tsubai  * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
     26      1.1   tsubai  * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
     27      1.1   tsubai  * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
     28      1.1   tsubai  * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
     29      1.1   tsubai  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
     30      1.1   tsubai  * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
     31      1.1   tsubai  */
     32      1.1   tsubai 
     33      1.1   tsubai /*
     34      1.1   tsubai  * Machine-specific functions for PCI autoconfiguration.
     35      1.1   tsubai  *
     36      1.1   tsubai  * On PCs, there are two methods of generating PCI configuration cycles.
     37      1.1   tsubai  * We try to detect the appropriate mechanism for this machine and set
     38      1.1   tsubai  * up a few function pointers to access the correct method directly.
     39      1.1   tsubai  *
     40      1.1   tsubai  * The configuration method can be hard-coded in the config file by
     41      1.1   tsubai  * using `options PCI_CONF_MODE=N', where `N' is the configuration mode
     42      1.1   tsubai  * as defined section 3.6.4.1, `Generating Configuration Cycles'.
     43      1.1   tsubai  */
     44      1.1   tsubai 
     45      1.1   tsubai #include <sys/types.h>
     46      1.1   tsubai #include <sys/param.h>
     47      1.1   tsubai #include <sys/time.h>
     48      1.1   tsubai #include <sys/systm.h>
     49      1.1   tsubai #include <sys/errno.h>
     50      1.1   tsubai #include <sys/device.h>
     51      1.1   tsubai 
     52  1.9.2.1   bouyer #include <uvm/uvm_extern.h>
     53      1.1   tsubai 
     54      1.3   tsubai #define _MACPPC_BUS_DMA_PRIVATE
     55      1.3   tsubai #include <machine/bus.h>
     56      1.3   tsubai 
     57      1.1   tsubai #include <machine/bus.h>
     58      1.1   tsubai #include <machine/pio.h>
     59      1.1   tsubai #include <machine/intr.h>
     60      1.1   tsubai 
     61      1.1   tsubai #include <dev/pci/pcivar.h>
     62      1.1   tsubai #include <dev/pci/pcireg.h>
     63      1.1   tsubai 
     64  1.9.2.1   bouyer #include <dev/ofw/openfirm.h>
     65  1.9.2.1   bouyer #include <dev/ofw/ofw_pci.h>
     66  1.9.2.1   bouyer 
     67  1.9.2.1   bouyer static void fixpci __P((int, pci_chipset_tag_t));
     68  1.9.2.1   bouyer static int find_node_intr __P((int, u_int32_t *, u_int32_t *));
     69  1.9.2.1   bouyer 
     70      1.3   tsubai /*
     71      1.3   tsubai  * PCI doesn't have any special needs; just use the generic versions
     72      1.3   tsubai  * of these functions.
     73      1.3   tsubai  */
     74      1.3   tsubai struct macppc_bus_dma_tag pci_bus_dma_tag = {
     75      1.3   tsubai 	0,			/* _bounce_thresh */
     76      1.3   tsubai 	_bus_dmamap_create,
     77      1.3   tsubai 	_bus_dmamap_destroy,
     78      1.3   tsubai 	_bus_dmamap_load,
     79      1.3   tsubai 	_bus_dmamap_load_mbuf,
     80      1.3   tsubai 	_bus_dmamap_load_uio,
     81      1.3   tsubai 	_bus_dmamap_load_raw,
     82      1.3   tsubai 	_bus_dmamap_unload,
     83      1.3   tsubai 	NULL,			/* _dmamap_sync */
     84      1.3   tsubai 	_bus_dmamem_alloc,
     85      1.3   tsubai 	_bus_dmamem_free,
     86      1.3   tsubai 	_bus_dmamem_map,
     87      1.3   tsubai 	_bus_dmamem_unmap,
     88      1.3   tsubai 	_bus_dmamem_mmap,
     89      1.3   tsubai };
     90      1.1   tsubai 
     91      1.1   tsubai void
     92      1.1   tsubai pci_attach_hook(parent, self, pba)
     93      1.1   tsubai 	struct device *parent, *self;
     94      1.1   tsubai 	struct pcibus_attach_args *pba;
     95      1.1   tsubai {
     96  1.9.2.1   bouyer 	pci_chipset_tag_t pc = pba->pba_pc;
     97  1.9.2.1   bouyer 	int bus = pba->pba_bus;
     98  1.9.2.1   bouyer 	int node, nn, sz;
     99  1.9.2.1   bouyer 	int32_t busrange[2];
    100  1.9.2.1   bouyer 
    101  1.9.2.1   bouyer 	for (node = pc->node; node; node = nn) {
    102  1.9.2.1   bouyer 		sz = OF_getprop(node, "bus-range", busrange, 8);
    103  1.9.2.1   bouyer 		if (sz == 8 && busrange[0] == bus) {
    104  1.9.2.1   bouyer 			fixpci(node, pc);
    105  1.9.2.1   bouyer 			return;
    106  1.9.2.1   bouyer 		}
    107  1.9.2.1   bouyer 		if ((nn = OF_child(node)) != 0)
    108  1.9.2.1   bouyer 			continue;
    109  1.9.2.1   bouyer 		while ((nn = OF_peer(node)) == 0) {
    110  1.9.2.1   bouyer 			node = OF_parent(node);
    111  1.9.2.1   bouyer 			if (node == pc->node)
    112  1.9.2.1   bouyer 				return;		/* not found */
    113  1.9.2.1   bouyer 		}
    114  1.9.2.1   bouyer 	}
    115      1.1   tsubai }
    116      1.1   tsubai 
    117      1.1   tsubai int
    118      1.1   tsubai pci_bus_maxdevs(pc, busno)
    119      1.1   tsubai 	pci_chipset_tag_t pc;
    120      1.1   tsubai 	int busno;
    121      1.1   tsubai {
    122      1.1   tsubai 
    123      1.1   tsubai 	/*
    124      1.1   tsubai 	 * Bus number is irrelevant.  Configuration Mechanism 1 is in
    125      1.1   tsubai 	 * use, can have devices 0-32 (i.e. the `normal' range).
    126      1.1   tsubai 	 */
    127      1.3   tsubai 	return 32;
    128      1.1   tsubai }
    129      1.1   tsubai 
    130      1.1   tsubai pcitag_t
    131      1.1   tsubai pci_make_tag(pc, bus, device, function)
    132      1.1   tsubai 	pci_chipset_tag_t pc;
    133      1.1   tsubai 	int bus, device, function;
    134      1.1   tsubai {
    135      1.1   tsubai 	pcitag_t tag;
    136      1.1   tsubai 
    137      1.1   tsubai 	if (bus >= 256 || device >= 32 || function >= 8)
    138      1.1   tsubai 		panic("pci_make_tag: bad request");
    139      1.1   tsubai 
    140      1.9  thorpej 	/* XXX magic number */
    141      1.3   tsubai 	tag = 0x80000000 | (bus << 16) | (device << 11) | (function << 8);
    142      1.1   tsubai 
    143      1.1   tsubai 	return tag;
    144      1.1   tsubai }
    145      1.1   tsubai 
    146      1.1   tsubai void
    147      1.1   tsubai pci_decompose_tag(pc, tag, bp, dp, fp)
    148      1.1   tsubai 	pci_chipset_tag_t pc;
    149      1.1   tsubai 	pcitag_t tag;
    150      1.1   tsubai 	int *bp, *dp, *fp;
    151      1.1   tsubai {
    152      1.9  thorpej 
    153      1.3   tsubai 	if (bp != NULL)
    154      1.3   tsubai 		*bp = (tag >> 16) & 0xff;
    155      1.3   tsubai 	if (dp != NULL)
    156      1.3   tsubai 		*dp = (tag >> 11) & 0x1f;
    157      1.3   tsubai 	if (fp != NULL)
    158      1.9  thorpej 		*fp = (tag >> 8) & 0x07;
    159      1.1   tsubai }
    160      1.1   tsubai 
    161      1.1   tsubai pcireg_t
    162      1.1   tsubai pci_conf_read(pc, tag, reg)
    163      1.1   tsubai 	pci_chipset_tag_t pc;
    164      1.1   tsubai 	pcitag_t tag;
    165      1.1   tsubai 	int reg;
    166      1.1   tsubai {
    167      1.1   tsubai 
    168  1.9.2.1   bouyer 	return (*pc->conf_read)(pc, tag, reg);
    169      1.1   tsubai }
    170      1.1   tsubai 
    171      1.1   tsubai void
    172      1.1   tsubai pci_conf_write(pc, tag, reg, data)
    173      1.1   tsubai 	pci_chipset_tag_t pc;
    174      1.1   tsubai 	pcitag_t tag;
    175      1.1   tsubai 	int reg;
    176      1.1   tsubai 	pcireg_t data;
    177      1.1   tsubai {
    178      1.9  thorpej 
    179  1.9.2.1   bouyer 	(*pc->conf_write)(pc, tag, reg, data);
    180      1.1   tsubai }
    181      1.1   tsubai 
    182      1.1   tsubai int
    183  1.9.2.2   bouyer pci_intr_map(pa, ihp)
    184  1.9.2.2   bouyer 	struct pci_attach_args *pa;
    185      1.1   tsubai 	pci_intr_handle_t *ihp;
    186      1.1   tsubai {
    187  1.9.2.2   bouyer 	int pin = pa->pa_intrpin;
    188  1.9.2.2   bouyer 	int line = pa->pa_intrline;
    189      1.1   tsubai 
    190      1.1   tsubai 	if (pin == 0) {
    191      1.1   tsubai 		/* No IRQ used. */
    192      1.1   tsubai 		goto bad;
    193      1.1   tsubai 	}
    194      1.1   tsubai 
    195      1.1   tsubai 	if (pin > 4) {
    196      1.1   tsubai 		printf("pci_intr_map: bad interrupt pin %d\n", pin);
    197      1.1   tsubai 		goto bad;
    198      1.1   tsubai 	}
    199      1.1   tsubai 
    200      1.1   tsubai 	/*
    201      1.1   tsubai 	 * Section 6.2.4, `Miscellaneous Functions', says that 255 means
    202      1.1   tsubai 	 * `unknown' or `no connection' on a PC.  We assume that a device with
    203      1.1   tsubai 	 * `no connection' either doesn't have an interrupt (in which case the
    204      1.1   tsubai 	 * pin number should be 0, and would have been noticed above), or
    205      1.1   tsubai 	 * wasn't configured by the BIOS (in which case we punt, since there's
    206      1.1   tsubai 	 * no real way we can know how the interrupt lines are mapped in the
    207      1.1   tsubai 	 * hardware).
    208      1.1   tsubai 	 *
    209      1.1   tsubai 	 * XXX
    210      1.1   tsubai 	 * Since IRQ 0 is only used by the clock, and we can't actually be sure
    211      1.1   tsubai 	 * that the BIOS did its job, we also recognize that as meaning that
    212      1.1   tsubai 	 * the BIOS has not configured the device.
    213      1.1   tsubai 	 */
    214      1.1   tsubai 	if (line == 0 || line == 255) {
    215      1.1   tsubai 		printf("pci_intr_map: no mapping for pin %c\n", '@' + pin);
    216      1.1   tsubai 		goto bad;
    217      1.1   tsubai 	} else {
    218      1.1   tsubai 		if (line >= ICU_LEN) {
    219      1.1   tsubai 			printf("pci_intr_map: bad interrupt line %d\n", line);
    220      1.1   tsubai 			goto bad;
    221      1.1   tsubai 		}
    222      1.1   tsubai 	}
    223      1.1   tsubai 
    224      1.1   tsubai 	*ihp = line;
    225      1.1   tsubai 	return 0;
    226      1.1   tsubai 
    227      1.1   tsubai bad:
    228      1.1   tsubai 	*ihp = -1;
    229      1.1   tsubai 	return 1;
    230      1.1   tsubai }
    231      1.1   tsubai 
    232      1.1   tsubai const char *
    233      1.1   tsubai pci_intr_string(pc, ih)
    234      1.1   tsubai 	pci_chipset_tag_t pc;
    235      1.1   tsubai 	pci_intr_handle_t ih;
    236      1.1   tsubai {
    237      1.1   tsubai 	static char irqstr[8];		/* 4 + 2 + NULL + sanity */
    238      1.1   tsubai 
    239      1.1   tsubai 	if (ih == 0 || ih >= ICU_LEN)
    240      1.1   tsubai 		panic("pci_intr_string: bogus handle 0x%x\n", ih);
    241      1.1   tsubai 
    242      1.1   tsubai 	sprintf(irqstr, "irq %d", ih);
    243      1.1   tsubai 	return (irqstr);
    244      1.1   tsubai 
    245      1.1   tsubai }
    246      1.1   tsubai 
    247  1.9.2.1   bouyer const struct evcnt *
    248  1.9.2.1   bouyer pci_intr_evcnt(pc, ih)
    249  1.9.2.1   bouyer 	pci_chipset_tag_t pc;
    250  1.9.2.1   bouyer 	pci_intr_handle_t ih;
    251  1.9.2.1   bouyer {
    252  1.9.2.1   bouyer 
    253  1.9.2.1   bouyer 	/* XXX for now, no evcnt parent reported */
    254  1.9.2.1   bouyer 	return NULL;
    255  1.9.2.1   bouyer }
    256  1.9.2.1   bouyer 
    257      1.1   tsubai extern void * intr_establish();
    258      1.1   tsubai extern void intr_disestablish();
    259      1.1   tsubai 
    260      1.1   tsubai void *
    261      1.1   tsubai pci_intr_establish(pc, ih, level, func, arg)
    262      1.1   tsubai 	pci_chipset_tag_t pc;
    263      1.1   tsubai 	pci_intr_handle_t ih;
    264      1.1   tsubai 	int level, (*func) __P((void *));
    265      1.1   tsubai 	void *arg;
    266      1.1   tsubai {
    267      1.1   tsubai 
    268      1.1   tsubai 	if (ih == 0 || ih >= ICU_LEN)
    269      1.1   tsubai 		panic("pci_intr_establish: bogus handle 0x%x\n", ih);
    270      1.1   tsubai 
    271      1.1   tsubai 	return intr_establish(ih, IST_LEVEL, level, func, arg);
    272      1.1   tsubai }
    273      1.1   tsubai 
    274      1.1   tsubai void
    275      1.1   tsubai pci_intr_disestablish(pc, cookie)
    276      1.1   tsubai 	pci_chipset_tag_t pc;
    277      1.1   tsubai 	void *cookie;
    278      1.1   tsubai {
    279      1.1   tsubai 
    280      1.1   tsubai 	intr_disestablish(cookie);
    281  1.9.2.1   bouyer }
    282  1.9.2.1   bouyer 
    283  1.9.2.1   bouyer #define pcibus(x) \
    284  1.9.2.1   bouyer 	(((x) & OFW_PCI_PHYS_HI_BUSMASK) >> OFW_PCI_PHYS_HI_BUSSHIFT)
    285  1.9.2.1   bouyer #define pcidev(x) \
    286  1.9.2.1   bouyer 	(((x) & OFW_PCI_PHYS_HI_DEVICEMASK) >> OFW_PCI_PHYS_HI_DEVICESHIFT)
    287  1.9.2.1   bouyer #define pcifunc(x) \
    288  1.9.2.1   bouyer 	(((x) & OFW_PCI_PHYS_HI_FUNCTIONMASK) >> OFW_PCI_PHYS_HI_FUNCTIONSHIFT)
    289  1.9.2.1   bouyer 
    290  1.9.2.1   bouyer void
    291  1.9.2.1   bouyer fixpci(parent, pc)
    292  1.9.2.1   bouyer 	int parent;
    293  1.9.2.1   bouyer 	pci_chipset_tag_t pc;
    294  1.9.2.1   bouyer {
    295  1.9.2.1   bouyer 	int node;
    296  1.9.2.1   bouyer 	pcitag_t tag;
    297  1.9.2.1   bouyer 	pcireg_t csr, intr;
    298  1.9.2.1   bouyer 	int len, i;
    299  1.9.2.1   bouyer 	int32_t irqs[4];
    300  1.9.2.1   bouyer 	struct {
    301  1.9.2.1   bouyer 		u_int32_t phys_hi, phys_mid, phys_lo;
    302  1.9.2.1   bouyer 		u_int32_t size_hi, size_lo;
    303  1.9.2.1   bouyer 	} addr[8];
    304  1.9.2.1   bouyer 
    305  1.9.2.1   bouyer 	for (node = OF_child(parent); node; node = OF_peer(node)) {
    306  1.9.2.1   bouyer 		len = OF_getprop(node, "assigned-addresses", addr,
    307  1.9.2.1   bouyer 				 sizeof(addr));
    308  1.9.2.1   bouyer 		if (len < (int)sizeof(addr[0]))
    309  1.9.2.1   bouyer 			continue;
    310  1.9.2.1   bouyer 
    311  1.9.2.1   bouyer 		tag = pci_make_tag(pc, pcibus(addr[0].phys_hi),
    312  1.9.2.1   bouyer 				   pcidev(addr[0].phys_hi),
    313  1.9.2.1   bouyer 				   pcifunc(addr[0].phys_hi));
    314  1.9.2.1   bouyer 
    315  1.9.2.1   bouyer 		/*
    316  1.9.2.1   bouyer 		 * Make sure the IO and MEM enable bits are set in the CSR.
    317  1.9.2.1   bouyer 		 */
    318  1.9.2.1   bouyer 		csr = pci_conf_read(pc, tag, PCI_COMMAND_STATUS_REG);
    319  1.9.2.1   bouyer 		csr &= ~(PCI_COMMAND_IO_ENABLE | PCI_COMMAND_MEM_ENABLE);
    320  1.9.2.1   bouyer 
    321  1.9.2.1   bouyer 		for (i = 0; i < len / sizeof(addr[0]); i++) {
    322  1.9.2.1   bouyer 			switch (addr[i].phys_hi & OFW_PCI_PHYS_HI_SPACEMASK) {
    323  1.9.2.1   bouyer 			case OFW_PCI_PHYS_HI_SPACE_IO:
    324  1.9.2.1   bouyer 				csr |= PCI_COMMAND_IO_ENABLE;
    325  1.9.2.1   bouyer 				break;
    326  1.9.2.1   bouyer 
    327  1.9.2.1   bouyer 			case OFW_PCI_PHYS_HI_SPACE_MEM32:
    328  1.9.2.1   bouyer 				csr |= PCI_COMMAND_MEM_ENABLE;
    329  1.9.2.1   bouyer 				break;
    330  1.9.2.1   bouyer 			}
    331  1.9.2.1   bouyer 		}
    332  1.9.2.1   bouyer 
    333  1.9.2.1   bouyer 		pci_conf_write(pc, tag, PCI_COMMAND_STATUS_REG, csr);
    334  1.9.2.1   bouyer 
    335  1.9.2.1   bouyer 		/*
    336  1.9.2.1   bouyer 		 * Make sure the line register is programmed with the
    337  1.9.2.1   bouyer 		 * interrupt mapping.
    338  1.9.2.1   bouyer 		 */
    339  1.9.2.1   bouyer 		if (find_node_intr(node, &addr[0].phys_hi, irqs) == -1)
    340  1.9.2.1   bouyer 			continue;
    341  1.9.2.1   bouyer 
    342  1.9.2.1   bouyer 		intr = pci_conf_read(pc, tag, PCI_INTERRUPT_REG);
    343  1.9.2.1   bouyer 		intr &= ~PCI_INTERRUPT_LINE_MASK;
    344  1.9.2.1   bouyer 		intr |= irqs[0] & PCI_INTERRUPT_LINE_MASK;
    345  1.9.2.1   bouyer 		pci_conf_write(pc, tag, PCI_INTERRUPT_REG, intr);
    346  1.9.2.1   bouyer 	}
    347  1.9.2.1   bouyer }
    348  1.9.2.1   bouyer 
    349  1.9.2.1   bouyer /*
    350  1.9.2.1   bouyer  * Find PCI IRQ of the node from OF tree.
    351  1.9.2.1   bouyer  */
    352  1.9.2.1   bouyer int
    353  1.9.2.1   bouyer find_node_intr(node, addr, intr)
    354  1.9.2.1   bouyer 	int node;
    355  1.9.2.1   bouyer 	u_int32_t *addr, *intr;
    356  1.9.2.1   bouyer {
    357  1.9.2.1   bouyer 	int parent, len, mlen, iparent;
    358  1.9.2.1   bouyer 	int match, i;
    359  1.9.2.1   bouyer 	u_int32_t map[64], *mp;
    360  1.9.2.1   bouyer 	u_int32_t imask[8], maskedaddr[8];
    361  1.9.2.1   bouyer 	u_int32_t icells;
    362  1.9.2.1   bouyer 	char name[32];
    363  1.9.2.1   bouyer 
    364  1.9.2.1   bouyer 	len = OF_getprop(node, "AAPL,interrupts", intr, 4) ;
    365  1.9.2.1   bouyer 	if (len == 4)
    366  1.9.2.1   bouyer 		return len;
    367  1.9.2.1   bouyer 
    368  1.9.2.1   bouyer 	parent = OF_parent(node);
    369  1.9.2.1   bouyer 	len = OF_getprop(parent, "interrupt-map", map, sizeof(map));
    370  1.9.2.1   bouyer 	mlen = OF_getprop(parent, "interrupt-map-mask", imask, sizeof(imask));
    371  1.9.2.1   bouyer 
    372  1.9.2.1   bouyer 	if (len == -1 || mlen == -1)
    373  1.9.2.1   bouyer 		goto nomap;
    374  1.9.2.1   bouyer 
    375  1.9.2.1   bouyer #ifdef DIAGNOSTIC
    376  1.9.2.1   bouyer 	if (mlen == sizeof(imask)) {
    377  1.9.2.1   bouyer 		printf("interrupt-map too long\n");
    378  1.9.2.1   bouyer 		return -1;
    379  1.9.2.1   bouyer 	}
    380  1.9.2.1   bouyer #endif
    381  1.9.2.1   bouyer 
    382  1.9.2.1   bouyer 	/* mask addr by "interrupt-map-mask" */
    383  1.9.2.1   bouyer 	bcopy(addr, maskedaddr, mlen);
    384  1.9.2.1   bouyer 	for (i = 0; i < mlen / 4; i++)
    385  1.9.2.1   bouyer 		maskedaddr[i] &= imask[i];
    386  1.9.2.1   bouyer 
    387  1.9.2.1   bouyer 	mp = map;
    388  1.9.2.1   bouyer 	while (len > mlen) {
    389  1.9.2.1   bouyer 		match = bcmp(maskedaddr, mp, mlen);
    390  1.9.2.1   bouyer 		mp += mlen / 4;
    391  1.9.2.1   bouyer 		len -= mlen;
    392  1.9.2.1   bouyer 
    393  1.9.2.1   bouyer 		/*
    394  1.9.2.1   bouyer 		 * We must read "#interrupt-cells" for each time because
    395  1.9.2.3   bouyer 		 * interrupt-parent may be different.
    396  1.9.2.1   bouyer 		 */
    397  1.9.2.1   bouyer 		iparent = *mp++;
    398  1.9.2.1   bouyer 		len -= 4;
    399  1.9.2.1   bouyer 		if (OF_getprop(iparent, "#interrupt-cells", &icells, 4) != 4)
    400  1.9.2.3   bouyer 			goto nomap;
    401  1.9.2.1   bouyer 
    402  1.9.2.1   bouyer 		/* Found. */
    403  1.9.2.1   bouyer 		if (match == 0) {
    404  1.9.2.1   bouyer 			bcopy(mp, intr, icells * 4);
    405  1.9.2.1   bouyer 			return icells * 4;
    406  1.9.2.1   bouyer 		}
    407  1.9.2.1   bouyer 
    408  1.9.2.1   bouyer 		mp += icells;
    409  1.9.2.1   bouyer 		len -= icells * 4;
    410  1.9.2.1   bouyer 	}
    411  1.9.2.1   bouyer 
    412  1.9.2.1   bouyer nomap:
    413  1.9.2.1   bouyer 	/*
    414  1.9.2.1   bouyer 	 * If the node has no interrupt property and the parent is a
    415  1.9.2.1   bouyer 	 * pci-bridge, use parent's interrupt.  This occurs on a PCI
    416  1.9.2.1   bouyer 	 * slot.  (e.g. AHA-3940)
    417  1.9.2.1   bouyer 	 */
    418  1.9.2.1   bouyer 	bzero(name, sizeof(name));
    419  1.9.2.1   bouyer 	OF_getprop(parent, "name", name, sizeof(name));
    420  1.9.2.1   bouyer 	if (strcmp(name, "pci-bridge") == 0) {
    421  1.9.2.1   bouyer 		len = OF_getprop(parent, "AAPL,interrupts", intr, 4) ;
    422  1.9.2.1   bouyer 		if (len == 4)
    423  1.9.2.1   bouyer 			return len;
    424  1.9.2.3   bouyer 		/*
    425  1.9.2.3   bouyer 		 * XXX I don't know what is the correct local address.
    426  1.9.2.3   bouyer 		 * XXX Use the first entry for now.
    427  1.9.2.3   bouyer 		 */
    428  1.9.2.3   bouyer 		len = OF_getprop(parent, "interrupt-map", map, sizeof(map));
    429  1.9.2.3   bouyer 		if (len >= 36) {
    430  1.9.2.3   bouyer 			addr = &map[5];
    431  1.9.2.3   bouyer 			return find_node_intr(parent, addr, intr);
    432  1.9.2.3   bouyer 		}
    433  1.9.2.1   bouyer 	}
    434  1.9.2.1   bouyer 
    435  1.9.2.1   bouyer 	/* XXX This may be wrong... */
    436  1.9.2.1   bouyer 	len = OF_getprop(node, "interrupts", intr, 4) ;
    437  1.9.2.1   bouyer 	if (len == 4)
    438  1.9.2.1   bouyer 		return len;
    439  1.9.2.1   bouyer 
    440  1.9.2.1   bouyer 	return -1;
    441      1.1   tsubai }
    442