pci_machdep.c revision 1.24 1 /* $NetBSD: pci_machdep.c,v 1.24 2004/02/24 15:16:04 wiz Exp $ */
2
3 /*
4 * Copyright (c) 1996 Christopher G. Demetriou. All rights reserved.
5 * Copyright (c) 1994 Charles M. Hannum. All rights reserved.
6 *
7 * Redistribution and use in source and binary forms, with or without
8 * modification, are permitted provided that the following conditions
9 * are met:
10 * 1. Redistributions of source code must retain the above copyright
11 * notice, this list of conditions and the following disclaimer.
12 * 2. Redistributions in binary form must reproduce the above copyright
13 * notice, this list of conditions and the following disclaimer in the
14 * documentation and/or other materials provided with the distribution.
15 * 3. All advertising materials mentioning features or use of this software
16 * must display the following acknowledgement:
17 * This product includes software developed by Charles M. Hannum.
18 * 4. The name of the author may not be used to endorse or promote products
19 * derived from this software without specific prior written permission.
20 *
21 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
22 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
23 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
24 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
25 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
26 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
27 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
28 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
29 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
30 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
31 */
32
33 /*
34 * Machine-specific functions for PCI autoconfiguration.
35 *
36 * On PCs, there are two methods of generating PCI configuration cycles.
37 * We try to detect the appropriate mechanism for this machine and set
38 * up a few function pointers to access the correct method directly.
39 *
40 * The configuration method can be hard-coded in the config file by
41 * using `options PCI_CONF_MODE=N', where `N' is the configuration mode
42 * as defined section 3.6.4.1, `Generating Configuration Cycles'.
43 */
44
45 #include <sys/cdefs.h>
46 __KERNEL_RCSID(0, "$NetBSD: pci_machdep.c,v 1.24 2004/02/24 15:16:04 wiz Exp $");
47
48 #include <sys/types.h>
49 #include <sys/param.h>
50 #include <sys/time.h>
51 #include <sys/systm.h>
52 #include <sys/errno.h>
53 #include <sys/device.h>
54
55 #include <uvm/uvm_extern.h>
56
57 #define _MACPPC_BUS_DMA_PRIVATE
58 #include <machine/bus.h>
59
60 #include <machine/bus.h>
61 #include <machine/pio.h>
62 #include <machine/intr.h>
63
64 #include <dev/pci/pcivar.h>
65 #include <dev/pci/pcireg.h>
66
67 #include <dev/ofw/openfirm.h>
68 #include <dev/ofw/ofw_pci.h>
69
70 static void fixpci __P((int, pci_chipset_tag_t));
71 static int find_node_intr __P((int, u_int32_t *, u_int32_t *));
72
73 /*
74 * PCI doesn't have any special needs; just use the generic versions
75 * of these functions.
76 */
77 struct macppc_bus_dma_tag pci_bus_dma_tag = {
78 0, /* _bounce_thresh */
79 _bus_dmamap_create,
80 _bus_dmamap_destroy,
81 _bus_dmamap_load,
82 _bus_dmamap_load_mbuf,
83 _bus_dmamap_load_uio,
84 _bus_dmamap_load_raw,
85 _bus_dmamap_unload,
86 NULL, /* _dmamap_sync */
87 _bus_dmamem_alloc,
88 _bus_dmamem_free,
89 _bus_dmamem_map,
90 _bus_dmamem_unmap,
91 _bus_dmamem_mmap,
92 };
93
94 void
95 pci_attach_hook(parent, self, pba)
96 struct device *parent, *self;
97 struct pcibus_attach_args *pba;
98 {
99 pci_chipset_tag_t pc = pba->pba_pc;
100 int bus = pba->pba_bus;
101 int node, nn, sz;
102 int32_t busrange[2];
103
104 for (node = pc->node; node; node = nn) {
105 sz = OF_getprop(node, "bus-range", busrange, 8);
106 if (sz == 8 && busrange[0] == bus) {
107 fixpci(node, pc);
108 return;
109 }
110 if ((nn = OF_child(node)) != 0)
111 continue;
112 while ((nn = OF_peer(node)) == 0) {
113 node = OF_parent(node);
114 if (node == pc->node)
115 return; /* not found */
116 }
117 }
118 }
119
120 int
121 pci_bus_maxdevs(pc, busno)
122 pci_chipset_tag_t pc;
123 int busno;
124 {
125
126 /*
127 * Bus number is irrelevant. Configuration Mechanism 1 is in
128 * use, can have devices 0-32 (i.e. the `normal' range).
129 */
130 return 32;
131 }
132
133 pcitag_t
134 pci_make_tag(pc, bus, device, function)
135 pci_chipset_tag_t pc;
136 int bus, device, function;
137 {
138 pcitag_t tag;
139
140 if (bus >= 256 || device >= 32 || function >= 8)
141 panic("pci_make_tag: bad request");
142
143 /* XXX magic number */
144 tag = 0x80000000 | (bus << 16) | (device << 11) | (function << 8);
145
146 return tag;
147 }
148
149 void
150 pci_decompose_tag(pc, tag, bp, dp, fp)
151 pci_chipset_tag_t pc;
152 pcitag_t tag;
153 int *bp, *dp, *fp;
154 {
155
156 if (bp != NULL)
157 *bp = (tag >> 16) & 0xff;
158 if (dp != NULL)
159 *dp = (tag >> 11) & 0x1f;
160 if (fp != NULL)
161 *fp = (tag >> 8) & 0x07;
162 }
163
164 pcireg_t
165 pci_conf_read(pc, tag, reg)
166 pci_chipset_tag_t pc;
167 pcitag_t tag;
168 int reg;
169 {
170
171 return (*pc->conf_read)(pc, tag, reg);
172 }
173
174 void
175 pci_conf_write(pc, tag, reg, data)
176 pci_chipset_tag_t pc;
177 pcitag_t tag;
178 int reg;
179 pcireg_t data;
180 {
181
182 (*pc->conf_write)(pc, tag, reg, data);
183 }
184
185 int
186 pci_intr_map(pa, ihp)
187 struct pci_attach_args *pa;
188 pci_intr_handle_t *ihp;
189 {
190 int pin = pa->pa_intrpin;
191 int line = pa->pa_intrline;
192
193 if (pin == 0) {
194 /* No IRQ used. */
195 goto bad;
196 }
197
198 if (pin > 4) {
199 printf("pci_intr_map: bad interrupt pin %d\n", pin);
200 goto bad;
201 }
202
203 /*
204 * Section 6.2.4, `Miscellaneous Functions', says that 255 means
205 * `unknown' or `no connection' on a PC. We assume that a device with
206 * `no connection' either doesn't have an interrupt (in which case the
207 * pin number should be 0, and would have been noticed above), or
208 * wasn't configured by the BIOS (in which case we punt, since there's
209 * no real way we can know how the interrupt lines are mapped in the
210 * hardware).
211 *
212 * XXX
213 * Since IRQ 0 is only used by the clock, and we can't actually be sure
214 * that the BIOS did its job, we also recognize that as meaning that
215 * the BIOS has not configured the device.
216 */
217 if (line == 0 || line == 255) {
218 printf("pci_intr_map: no mapping for pin %c\n", '@' + pin);
219 goto bad;
220 } else {
221 if (line >= ICU_LEN) {
222 printf("pci_intr_map: bad interrupt line %d\n", line);
223 goto bad;
224 }
225 }
226
227 *ihp = line;
228 return 0;
229
230 bad:
231 *ihp = -1;
232 return 1;
233 }
234
235 const char *
236 pci_intr_string(pc, ih)
237 pci_chipset_tag_t pc;
238 pci_intr_handle_t ih;
239 {
240 static char irqstr[8]; /* 4 + 2 + NULL + sanity */
241
242 if (ih == 0 || ih >= ICU_LEN)
243 panic("pci_intr_string: bogus handle 0x%x", ih);
244
245 sprintf(irqstr, "irq %d", ih);
246 return (irqstr);
247
248 }
249
250 const struct evcnt *
251 pci_intr_evcnt(pc, ih)
252 pci_chipset_tag_t pc;
253 pci_intr_handle_t ih;
254 {
255
256 /* XXX for now, no evcnt parent reported */
257 return NULL;
258 }
259
260 void *
261 pci_intr_establish(pc, ih, level, func, arg)
262 pci_chipset_tag_t pc;
263 pci_intr_handle_t ih;
264 int level, (*func) __P((void *));
265 void *arg;
266 {
267
268 if (ih == 0 || ih >= ICU_LEN)
269 panic("pci_intr_establish: bogus handle 0x%x", ih);
270
271 return intr_establish(ih, IST_LEVEL, level, func, arg);
272 }
273
274 void
275 pci_intr_disestablish(pc, cookie)
276 pci_chipset_tag_t pc;
277 void *cookie;
278 {
279
280 intr_disestablish(cookie);
281 }
282
283 #define pcibus(x) \
284 (((x) & OFW_PCI_PHYS_HI_BUSMASK) >> OFW_PCI_PHYS_HI_BUSSHIFT)
285 #define pcidev(x) \
286 (((x) & OFW_PCI_PHYS_HI_DEVICEMASK) >> OFW_PCI_PHYS_HI_DEVICESHIFT)
287 #define pcifunc(x) \
288 (((x) & OFW_PCI_PHYS_HI_FUNCTIONMASK) >> OFW_PCI_PHYS_HI_FUNCTIONSHIFT)
289
290 void
291 fixpci(parent, pc)
292 int parent;
293 pci_chipset_tag_t pc;
294 {
295 int node;
296 pcitag_t tag;
297 pcireg_t csr, intr;
298 int len, i, ilen;
299 int32_t irqs[4];
300 struct {
301 u_int32_t phys_hi, phys_mid, phys_lo;
302 u_int32_t size_hi, size_lo;
303 } addr[8];
304 struct {
305 u_int32_t phys_hi, phys_mid, phys_lo;
306 u_int32_t icells[5];
307 } iaddr;
308
309 len = OF_getprop(parent, "#interrupt-cells", &ilen, sizeof(ilen));
310 if (len < 0)
311 ilen = 0;
312 for (node = OF_child(parent); node; node = OF_peer(node)) {
313 len = OF_getprop(node, "assigned-addresses", addr,
314 sizeof(addr));
315 if (len < (int)sizeof(addr[0]))
316 continue;
317
318 tag = pci_make_tag(pc, pcibus(addr[0].phys_hi),
319 pcidev(addr[0].phys_hi),
320 pcifunc(addr[0].phys_hi));
321
322 /*
323 * Make sure the IO and MEM enable bits are set in the CSR.
324 */
325 csr = pci_conf_read(pc, tag, PCI_COMMAND_STATUS_REG);
326 csr &= ~(PCI_COMMAND_IO_ENABLE | PCI_COMMAND_MEM_ENABLE);
327
328 for (i = 0; i < len / sizeof(addr[0]); i++) {
329 switch (addr[i].phys_hi & OFW_PCI_PHYS_HI_SPACEMASK) {
330 case OFW_PCI_PHYS_HI_SPACE_IO:
331 csr |= PCI_COMMAND_IO_ENABLE;
332 break;
333
334 case OFW_PCI_PHYS_HI_SPACE_MEM32:
335 case OFW_PCI_PHYS_HI_SPACE_MEM64:
336 csr |= PCI_COMMAND_MEM_ENABLE;
337 break;
338 }
339 }
340
341 pci_conf_write(pc, tag, PCI_COMMAND_STATUS_REG, csr);
342
343 /*
344 * Make sure the line register is programmed with the
345 * interrupt mapping.
346 */
347 if (ilen == 0) {
348 /*
349 * Early Apple OFW implementation don't handle
350 * interrupts as defined by the OFW PCI bindings.
351 */
352 len = OF_getprop(node, "AAPL,interrupts", irqs, 4);
353 } else {
354 iaddr.phys_hi = addr[0].phys_hi;
355 iaddr.phys_mid = addr[0].phys_mid;
356 iaddr.phys_lo = addr[0].phys_lo;
357 /*
358 * Thankfully, PCI can only have one entry in its
359 * "interrupts" property.
360 */
361 len = OF_getprop(node, "interrupts", &iaddr.icells[0],
362 4*ilen);
363 if (len != 4*ilen)
364 continue;
365 len = find_node_intr(node, &iaddr.phys_hi, irqs);
366 }
367 if (len > 0) {
368 intr = pci_conf_read(pc, tag, PCI_INTERRUPT_REG);
369 intr &= ~PCI_INTERRUPT_LINE_MASK;
370 intr |= irqs[0] & PCI_INTERRUPT_LINE_MASK;
371 pci_conf_write(pc, tag, PCI_INTERRUPT_REG, intr);
372 }
373 }
374 }
375
376 /*
377 * Find PCI IRQ of the node from OF tree.
378 */
379 int
380 find_node_intr(node, addr, intr)
381 int node;
382 u_int32_t *addr, *intr;
383 {
384 int parent, len, mlen, iparent;
385 int match, i;
386 u_int32_t map[160];
387 const u_int32_t *mp;
388 u_int32_t imask[8], maskedaddr[8];
389 u_int32_t acells, icells;
390 char name[32];
391
392 parent = OF_parent(node);
393 len = OF_getprop(parent, "interrupt-map", map, sizeof(map));
394 mlen = OF_getprop(parent, "interrupt-map-mask", imask, sizeof(imask));
395
396 if (mlen != -1)
397 memcpy(maskedaddr, addr, mlen);
398 again:
399 if (len == -1 || mlen == -1)
400 goto nomap;
401
402 #ifdef DIAGNOSTIC
403 if (mlen == sizeof(imask)) {
404 printf("interrupt-map too long\n");
405 return -1;
406 }
407 #endif
408
409 /* mask addr by "interrupt-map-mask" */
410 for (i = 0; i < mlen / 4; i++)
411 maskedaddr[i] &= imask[i];
412
413 mp = map;
414 i = 0;
415 while (len > mlen) {
416 match = memcmp(maskedaddr, mp, mlen);
417 mp += mlen / 4;
418 len -= mlen;
419
420 /*
421 * We must read "#address-cells" and "#interrupt-cells" each
422 * time because each interrupt-parent may be different.
423 */
424 iparent = *mp++;
425 len -= 4;
426 if (OF_getprop(iparent, "#address-cells", &acells, 4) != 4)
427 return -1;
428 if (OF_getprop(iparent, "#interrupt-cells", &icells, 4) != 4)
429 return -1;
430
431 /* Found. */
432 if (match == 0) {
433 /*
434 * We matched on address/interrupt, but are we done?
435 */
436 if (acells == 0) { /* XXX */
437 /*
438 * If we are at the interrupt controller,
439 * we are finally done. Save the result and
440 * return.
441 */
442 memcpy(intr, mp, icells * 4);
443 return icells * 4;
444 }
445 /*
446 * We are now at an intermedia interrupt node. We
447 * need to use its interrupt mask and map the
448 * supplied address/interrupt via its map.
449 */
450 mlen = OF_getprop(iparent, "interrupt-map-mask",
451 imask, sizeof(imask));
452 #ifdef DIAGNOSTIC
453 if (mlen != (acells + icells)*4) {
454 printf("interrupt-map inconsistent (%d, %d)\n",
455 mlen, (acells + icells)*4);
456 return -1;
457 }
458 #endif
459 memcpy(maskedaddr, mp, mlen);
460 len = OF_getprop(iparent, "interrupt-map", map,
461 sizeof(map));
462 goto again;
463 }
464
465 mp += (acells + icells);
466 len -= (acells + icells) * 4;
467 }
468
469 nomap:
470 /*
471 * If the node has no interrupt property and the parent is a
472 * pci-bridge, use parent's interrupt. This occurs on a PCI
473 * slot. (e.g. AHA-3940)
474 */
475 memset(name, 0, sizeof(name));
476 OF_getprop(parent, "name", name, sizeof(name));
477 if (strcmp(name, "pci-bridge") == 0) {
478 len = OF_getprop(parent, "AAPL,interrupts", intr, 4) ;
479 if (len == 4)
480 return len;
481 #if 0
482 /*
483 * XXX I don't know what is the correct local address.
484 * XXX Use the first entry for now.
485 */
486 len = OF_getprop(parent, "interrupt-map", map, sizeof(map));
487 if (len >= 36) {
488 addr = &map[5];
489 return find_node_intr(parent, addr, intr);
490 }
491 #endif
492 }
493
494 #if 0
495 /* XXX This may be wrong... */
496 len = OF_getprop(node, "interrupts", intr, 4) ;
497 if (len == 4)
498 return len;
499 #endif
500
501 return -1;
502 }
503