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pci_machdep.c revision 1.3
      1 /*	$NetBSD: pci_machdep.c,v 1.3 1998/07/17 18:31:56 tsubai Exp $	*/
      2 
      3 /*
      4  * Copyright (c) 1996 Christopher G. Demetriou.  All rights reserved.
      5  * Copyright (c) 1994 Charles Hannum.  All rights reserved.
      6  *
      7  * Redistribution and use in source and binary forms, with or without
      8  * modification, are permitted provided that the following conditions
      9  * are met:
     10  * 1. Redistributions of source code must retain the above copyright
     11  *    notice, this list of conditions and the following disclaimer.
     12  * 2. Redistributions in binary form must reproduce the above copyright
     13  *    notice, this list of conditions and the following disclaimer in the
     14  *    documentation and/or other materials provided with the distribution.
     15  * 3. All advertising materials mentioning features or use of this software
     16  *    must display the following acknowledgement:
     17  *	This product includes software developed by Charles Hannum.
     18  * 4. The name of the author may not be used to endorse or promote products
     19  *    derived from this software without specific prior written permission.
     20  *
     21  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
     22  * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
     23  * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
     24  * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
     25  * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
     26  * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
     27  * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
     28  * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
     29  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
     30  * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
     31  */
     32 
     33 /*
     34  * Machine-specific functions for PCI autoconfiguration.
     35  *
     36  * On PCs, there are two methods of generating PCI configuration cycles.
     37  * We try to detect the appropriate mechanism for this machine and set
     38  * up a few function pointers to access the correct method directly.
     39  *
     40  * The configuration method can be hard-coded in the config file by
     41  * using `options PCI_CONF_MODE=N', where `N' is the configuration mode
     42  * as defined section 3.6.4.1, `Generating Configuration Cycles'.
     43  */
     44 
     45 #include <sys/types.h>
     46 #include <sys/param.h>
     47 #include <sys/time.h>
     48 #include <sys/systm.h>
     49 #include <sys/errno.h>
     50 #include <sys/device.h>
     51 
     52 #include <vm/vm.h>
     53 #include <vm/vm_kern.h>
     54 
     55 #define _MACPPC_BUS_DMA_PRIVATE
     56 #include <machine/bus.h>
     57 
     58 #include <machine/bus.h>
     59 #include <machine/pio.h>
     60 #include <machine/intr.h>
     61 
     62 #include <dev/pci/pcivar.h>
     63 #include <dev/pci/pcireg.h>
     64 
     65 /*
     66  * PCI doesn't have any special needs; just use the generic versions
     67  * of these functions.
     68  */
     69 struct macppc_bus_dma_tag pci_bus_dma_tag = {
     70 	0,			/* _bounce_thresh */
     71 	_bus_dmamap_create,
     72 	_bus_dmamap_destroy,
     73 	_bus_dmamap_load,
     74 	_bus_dmamap_load_mbuf,
     75 	_bus_dmamap_load_uio,
     76 	_bus_dmamap_load_raw,
     77 	_bus_dmamap_unload,
     78 	NULL,			/* _dmamap_sync */
     79 	_bus_dmamem_alloc,
     80 	_bus_dmamem_free,
     81 	_bus_dmamem_map,
     82 	_bus_dmamem_unmap,
     83 	_bus_dmamem_mmap,
     84 };
     85 
     86 void
     87 pci_attach_hook(parent, self, pba)
     88 	struct device *parent, *self;
     89 	struct pcibus_attach_args *pba;
     90 {
     91 }
     92 
     93 int
     94 pci_bus_maxdevs(pc, busno)
     95 	pci_chipset_tag_t pc;
     96 	int busno;
     97 {
     98 
     99 	/*
    100 	 * Bus number is irrelevant.  Configuration Mechanism 1 is in
    101 	 * use, can have devices 0-32 (i.e. the `normal' range).
    102 	 */
    103 	return 32;
    104 }
    105 
    106 pcitag_t
    107 pci_make_tag(pc, bus, device, function)
    108 	pci_chipset_tag_t pc;
    109 	int bus, device, function;
    110 {
    111 	pcitag_t tag;
    112 
    113 	if (bus >= 256 || device >= 32 || function >= 8)
    114 		panic("pci_make_tag: bad request");
    115 
    116 	tag = 0x80000000 | (bus << 16) | (device << 11) | (function << 8);
    117 
    118 	return tag;
    119 }
    120 
    121 void
    122 pci_decompose_tag(pc, tag, bp, dp, fp)
    123 	pci_chipset_tag_t pc;
    124 	pcitag_t tag;
    125 	int *bp, *dp, *fp;
    126 {
    127 	if (bp != NULL)
    128 		*bp = (tag >> 16) & 0xff;
    129 	if (dp != NULL)
    130 		*dp = (tag >> 11) & 0x1f;
    131 	if (fp != NULL)
    132 		*fp = (tag >> 8) & 0x7;
    133 
    134 	return;
    135 }
    136 
    137 pcireg_t
    138 pci_conf_read(pc, tag, reg)
    139 	pci_chipset_tag_t pc;
    140 	pcitag_t tag;
    141 	int reg;
    142 {
    143 	pcireg_t data;
    144 	struct pci_bridge *r;
    145 
    146 	if (pc == PCI_CHIPSET_MPC106) {
    147 		r = &pci_bridges[0];
    148 
    149 		out32rb(r->addr, tag | reg);
    150 		data = in32rb(r->data);
    151 		out32rb(r->addr, 0);
    152 	} else {
    153 		int bus, dev, func;
    154 
    155 		pci_decompose_tag(pc, tag, &bus, &dev, &func);
    156 
    157 		/*
    158 		 * bandit's minimum device number is 11.  So we behave
    159 		 * as if there is no device when dev < 11.
    160 		 */
    161 		if (dev < 11) {
    162 			if (reg == PCI_ID_REG)
    163 				return 0xffffffff;
    164 			panic("pci_conf_read");
    165 		}
    166 
    167 		r = &pci_bridges[pc];
    168 
    169 		out32rb(r->addr, (1 << dev) | reg);
    170 		DELAY(10);
    171 		data = in32rb(r->data);
    172 		DELAY(10);
    173 		out32rb(r->addr, 0);
    174 		DELAY(10);
    175 	}
    176 
    177 	return data;
    178 }
    179 
    180 void
    181 pci_conf_write(pc, tag, reg, data)
    182 	pci_chipset_tag_t pc;
    183 	pcitag_t tag;
    184 	int reg;
    185 	pcireg_t data;
    186 {
    187 	struct pci_bridge *r = &pci_bridges[pc];
    188 
    189 	if (pc == PCI_CHIPSET_MPC106) {
    190 		r = &pci_bridges[0];
    191 
    192 		out32rb(r->addr, tag | reg);
    193 		out32rb(r->data, data);
    194 		out32rb(r->addr, 0);
    195 	} else {
    196 		int bus, dev, func;
    197 
    198 		pci_decompose_tag(pc, tag, &bus, &dev, &func);
    199 
    200 		if (dev < 11)
    201 			panic("pci_conf_read");
    202 
    203 		r = &pci_bridges[pc];
    204 
    205 		out32rb(r->addr, (1 << dev) | reg);
    206 		DELAY(10);
    207 		out32rb(r->data, data);
    208 		DELAY(10);
    209 		out32rb(r->addr, 0);
    210 		DELAY(10);
    211 	}
    212 }
    213 
    214 int
    215 pci_intr_map(pc, intrtag, pin, line, ihp)
    216 	pci_chipset_tag_t pc;
    217 	pcitag_t intrtag;
    218 	int pin, line;
    219 	pci_intr_handle_t *ihp;
    220 {
    221 
    222 	if (pin == 0) {
    223 		/* No IRQ used. */
    224 		goto bad;
    225 	}
    226 
    227 	if (pin > 4) {
    228 		printf("pci_intr_map: bad interrupt pin %d\n", pin);
    229 		goto bad;
    230 	}
    231 
    232 	/*
    233 	 * Section 6.2.4, `Miscellaneous Functions', says that 255 means
    234 	 * `unknown' or `no connection' on a PC.  We assume that a device with
    235 	 * `no connection' either doesn't have an interrupt (in which case the
    236 	 * pin number should be 0, and would have been noticed above), or
    237 	 * wasn't configured by the BIOS (in which case we punt, since there's
    238 	 * no real way we can know how the interrupt lines are mapped in the
    239 	 * hardware).
    240 	 *
    241 	 * XXX
    242 	 * Since IRQ 0 is only used by the clock, and we can't actually be sure
    243 	 * that the BIOS did its job, we also recognize that as meaning that
    244 	 * the BIOS has not configured the device.
    245 	 */
    246 	if (line == 0 || line == 255) {
    247 		printf("pci_intr_map: no mapping for pin %c\n", '@' + pin);
    248 		goto bad;
    249 	} else {
    250 		if (line >= ICU_LEN) {
    251 			printf("pci_intr_map: bad interrupt line %d\n", line);
    252 			goto bad;
    253 		}
    254 	}
    255 
    256 	*ihp = line;
    257 	return 0;
    258 
    259 bad:
    260 	*ihp = -1;
    261 	return 1;
    262 }
    263 
    264 const char *
    265 pci_intr_string(pc, ih)
    266 	pci_chipset_tag_t pc;
    267 	pci_intr_handle_t ih;
    268 {
    269 	static char irqstr[8];		/* 4 + 2 + NULL + sanity */
    270 
    271 	if (ih == 0 || ih >= ICU_LEN)
    272 		panic("pci_intr_string: bogus handle 0x%x\n", ih);
    273 
    274 	sprintf(irqstr, "irq %d", ih);
    275 	return (irqstr);
    276 
    277 }
    278 
    279 extern void * intr_establish();
    280 extern void intr_disestablish();
    281 
    282 void *
    283 pci_intr_establish(pc, ih, level, func, arg)
    284 	pci_chipset_tag_t pc;
    285 	pci_intr_handle_t ih;
    286 	int level, (*func) __P((void *));
    287 	void *arg;
    288 {
    289 
    290 	if (ih == 0 || ih >= ICU_LEN)
    291 		panic("pci_intr_establish: bogus handle 0x%x\n", ih);
    292 
    293 	return intr_establish(ih, IST_LEVEL, level, func, arg);
    294 }
    295 
    296 void
    297 pci_intr_disestablish(pc, cookie)
    298 	pci_chipset_tag_t pc;
    299 	void *cookie;
    300 {
    301 
    302 	intr_disestablish(cookie);
    303 }
    304