pci_machdep.c revision 1.31 1 /* $NetBSD: pci_machdep.c,v 1.31 2006/09/24 19:17:56 briggs Exp $ */
2
3 /*
4 * Copyright (c) 1996 Christopher G. Demetriou. All rights reserved.
5 * Copyright (c) 1994 Charles M. Hannum. All rights reserved.
6 *
7 * Redistribution and use in source and binary forms, with or without
8 * modification, are permitted provided that the following conditions
9 * are met:
10 * 1. Redistributions of source code must retain the above copyright
11 * notice, this list of conditions and the following disclaimer.
12 * 2. Redistributions in binary form must reproduce the above copyright
13 * notice, this list of conditions and the following disclaimer in the
14 * documentation and/or other materials provided with the distribution.
15 * 3. All advertising materials mentioning features or use of this software
16 * must display the following acknowledgement:
17 * This product includes software developed by Charles M. Hannum.
18 * 4. The name of the author may not be used to endorse or promote products
19 * derived from this software without specific prior written permission.
20 *
21 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
22 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
23 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
24 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
25 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
26 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
27 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
28 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
29 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
30 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
31 */
32
33 /*
34 * Machine-specific functions for PCI autoconfiguration.
35 *
36 * On PCs, there are two methods of generating PCI configuration cycles.
37 * We try to detect the appropriate mechanism for this machine and set
38 * up a few function pointers to access the correct method directly.
39 *
40 * The configuration method can be hard-coded in the config file by
41 * using `options PCI_CONF_MODE=N', where `N' is the configuration mode
42 * as defined section 3.6.4.1, `Generating Configuration Cycles'.
43 */
44
45 #include <sys/cdefs.h>
46 __KERNEL_RCSID(0, "$NetBSD: pci_machdep.c,v 1.31 2006/09/24 19:17:56 briggs Exp $");
47
48 #include <sys/types.h>
49 #include <sys/param.h>
50 #include <sys/time.h>
51 #include <sys/systm.h>
52 #include <sys/errno.h>
53 #include <sys/device.h>
54
55 #include <uvm/uvm_extern.h>
56
57 #define _MACPPC_BUS_DMA_PRIVATE
58 #include <machine/bus.h>
59
60 #include <machine/bus.h>
61 #include <machine/pio.h>
62 #include <machine/intr.h>
63
64 #include <dev/pci/pcivar.h>
65 #include <dev/pci/pcireg.h>
66
67 #include <dev/ofw/openfirm.h>
68 #include <dev/ofw/ofw_pci.h>
69
70 static void fixpci __P((int, pci_chipset_tag_t));
71 static int find_node_intr __P((int, u_int32_t *, u_int32_t *));
72
73 /*
74 * PCI doesn't have any special needs; just use the generic versions
75 * of these functions.
76 */
77 struct macppc_bus_dma_tag pci_bus_dma_tag = {
78 0, /* _bounce_thresh */
79 _bus_dmamap_create,
80 _bus_dmamap_destroy,
81 _bus_dmamap_load,
82 _bus_dmamap_load_mbuf,
83 _bus_dmamap_load_uio,
84 _bus_dmamap_load_raw,
85 _bus_dmamap_unload,
86 NULL, /* _dmamap_sync */
87 _bus_dmamem_alloc,
88 _bus_dmamem_free,
89 _bus_dmamem_map,
90 _bus_dmamem_unmap,
91 _bus_dmamem_mmap,
92 };
93
94 void
95 pci_attach_hook(parent, self, pba)
96 struct device *parent, *self;
97 struct pcibus_attach_args *pba;
98 {
99 pci_chipset_tag_t pc = pba->pba_pc;
100 int bus = pba->pba_bus;
101 int node, nn, sz;
102 int32_t busrange[2];
103
104 for (node = pc->node; node; node = nn) {
105 sz = OF_getprop(node, "bus-range", busrange, 8);
106 if (sz == 8 && busrange[0] == bus) {
107 fixpci(node, pc);
108 return;
109 }
110 if ((nn = OF_child(node)) != 0)
111 continue;
112 while ((nn = OF_peer(node)) == 0) {
113 node = OF_parent(node);
114 if (node == pc->node)
115 return; /* not found */
116 }
117 }
118 }
119
120 int
121 pci_bus_maxdevs(pc, busno)
122 pci_chipset_tag_t pc;
123 int busno;
124 {
125
126 /*
127 * Bus number is irrelevant. Configuration Mechanism 1 is in
128 * use, can have devices 0-32 (i.e. the `normal' range).
129 */
130 return 32;
131 }
132
133 pcitag_t
134 pci_make_tag(pc, bus, device, function)
135 pci_chipset_tag_t pc;
136 int bus, device, function;
137 {
138 pcitag_t tag;
139
140 if (bus >= 256 || device >= 32 || function >= 8)
141 panic("pci_make_tag: bad request");
142
143 /* XXX magic number */
144 tag = 0x80000000 | (bus << 16) | (device << 11) | (function << 8);
145
146 return tag;
147 }
148
149 void
150 pci_decompose_tag(pc, tag, bp, dp, fp)
151 pci_chipset_tag_t pc;
152 pcitag_t tag;
153 int *bp, *dp, *fp;
154 {
155
156 if (bp != NULL)
157 *bp = (tag >> 16) & 0xff;
158 if (dp != NULL)
159 *dp = (tag >> 11) & 0x1f;
160 if (fp != NULL)
161 *fp = (tag >> 8) & 0x07;
162 }
163
164 pcireg_t
165 pci_conf_read(pc, tag, reg)
166 pci_chipset_tag_t pc;
167 pcitag_t tag;
168 int reg;
169 {
170
171 return (*pc->conf_read)(pc, tag, reg);
172 }
173
174 void
175 pci_conf_write(pc, tag, reg, data)
176 pci_chipset_tag_t pc;
177 pcitag_t tag;
178 int reg;
179 pcireg_t data;
180 {
181
182 (*pc->conf_write)(pc, tag, reg, data);
183 }
184
185 int
186 pci_intr_map(pa, ihp)
187 struct pci_attach_args *pa;
188 pci_intr_handle_t *ihp;
189 {
190 int pin = pa->pa_intrpin;
191 int line = pa->pa_intrline;
192
193 #if DEBUG
194 printf("%s: pin: %d, line: %d\n", __FUNCTION__, pin, line);
195 #endif
196
197 if (pin == 0) {
198 /* No IRQ used. */
199 printf("pci_intr_map: interrupt pin %d\n", pin);
200 goto bad;
201 }
202
203 if (pin > 4) {
204 printf("pci_intr_map: bad interrupt pin %d\n", pin);
205 goto bad;
206 }
207
208 /*
209 * Section 6.2.4, `Miscellaneous Functions', says that 255 means
210 * `unknown' or `no connection' on a PC. We assume that a device with
211 * `no connection' either doesn't have an interrupt (in which case the
212 * pin number should be 0, and would have been noticed above), or
213 * wasn't configured by the BIOS (in which case we punt, since there's
214 * no real way we can know how the interrupt lines are mapped in the
215 * hardware).
216 *
217 * XXX
218 * Since IRQ 0 is only used by the clock, and we can't actually be sure
219 * that the BIOS did its job, we also recognize that as meaning that
220 * the BIOS has not configured the device.
221 */
222 if (line == 0 || line == 255) {
223 printf("pci_intr_map: no mapping for pin %c\n", '@' + pin);
224 goto bad;
225 } else {
226 if (line >= ICU_LEN) {
227 printf("pci_intr_map: bad interrupt line %d\n", line);
228 goto bad;
229 }
230 }
231
232 *ihp = line;
233 return 0;
234
235 bad:
236 *ihp = -1;
237 return 1;
238 }
239
240 const char *
241 pci_intr_string(pc, ih)
242 pci_chipset_tag_t pc;
243 pci_intr_handle_t ih;
244 {
245 static char irqstr[8]; /* 4 + 2 + NULL + sanity */
246
247 if (ih == 0 || ih >= ICU_LEN)
248 panic("pci_intr_string: bogus handle 0x%x", ih);
249
250 sprintf(irqstr, "irq %d", ih);
251 return (irqstr);
252
253 }
254
255 const struct evcnt *
256 pci_intr_evcnt(pc, ih)
257 pci_chipset_tag_t pc;
258 pci_intr_handle_t ih;
259 {
260
261 /* XXX for now, no evcnt parent reported */
262 return NULL;
263 }
264
265 void *
266 pci_intr_establish(pc, ih, level, func, arg)
267 pci_chipset_tag_t pc;
268 pci_intr_handle_t ih;
269 int level, (*func) __P((void *));
270 void *arg;
271 {
272
273 if (ih == 0 || ih >= ICU_LEN)
274 panic("pci_intr_establish: bogus handle 0x%x", ih);
275
276 return intr_establish(ih, IST_LEVEL, level, func, arg);
277 }
278
279 void
280 pci_intr_disestablish(pc, cookie)
281 pci_chipset_tag_t pc;
282 void *cookie;
283 {
284
285 intr_disestablish(cookie);
286 }
287
288 #define pcibus(x) \
289 (((x) & OFW_PCI_PHYS_HI_BUSMASK) >> OFW_PCI_PHYS_HI_BUSSHIFT)
290 #define pcidev(x) \
291 (((x) & OFW_PCI_PHYS_HI_DEVICEMASK) >> OFW_PCI_PHYS_HI_DEVICESHIFT)
292 #define pcifunc(x) \
293 (((x) & OFW_PCI_PHYS_HI_FUNCTIONMASK) >> OFW_PCI_PHYS_HI_FUNCTIONSHIFT)
294
295 void
296 fixpci(parent, pc)
297 int parent;
298 pci_chipset_tag_t pc;
299 {
300 int node;
301 pcitag_t tag;
302 pcireg_t csr, intr;
303 int len, i, ilen;
304 int32_t irqs[4];
305 struct {
306 u_int32_t phys_hi, phys_mid, phys_lo;
307 u_int32_t size_hi, size_lo;
308 } addr[8];
309 struct {
310 u_int32_t phys_hi, phys_mid, phys_lo;
311 u_int32_t icells[5];
312 } iaddr;
313
314 len = OF_getprop(parent, "#interrupt-cells", &ilen, sizeof(ilen));
315 if (len < 0)
316 ilen = 0;
317 for (node = OF_child(parent); node; node = OF_peer(node)) {
318 len = OF_getprop(node, "assigned-addresses", addr,
319 sizeof(addr));
320 if (len < (int)sizeof(addr[0]))
321 continue;
322
323 tag = pci_make_tag(pc, pcibus(addr[0].phys_hi),
324 pcidev(addr[0].phys_hi),
325 pcifunc(addr[0].phys_hi));
326
327 /*
328 * Make sure the IO and MEM enable bits are set in the CSR.
329 */
330 csr = pci_conf_read(pc, tag, PCI_COMMAND_STATUS_REG);
331 csr &= ~(PCI_COMMAND_IO_ENABLE | PCI_COMMAND_MEM_ENABLE);
332
333 for (i = 0; i < len / sizeof(addr[0]); i++) {
334 switch (addr[i].phys_hi & OFW_PCI_PHYS_HI_SPACEMASK) {
335 case OFW_PCI_PHYS_HI_SPACE_IO:
336 csr |= PCI_COMMAND_IO_ENABLE;
337 break;
338
339 case OFW_PCI_PHYS_HI_SPACE_MEM32:
340 case OFW_PCI_PHYS_HI_SPACE_MEM64:
341 csr |= PCI_COMMAND_MEM_ENABLE;
342 break;
343 }
344 }
345
346 pci_conf_write(pc, tag, PCI_COMMAND_STATUS_REG, csr);
347
348 /*
349 * Make sure the line register is programmed with the
350 * interrupt mapping.
351 */
352 if (ilen == 0) {
353 /*
354 * Early Apple OFW implementation don't handle
355 * interrupts as defined by the OFW PCI bindings.
356 */
357 len = OF_getprop(node, "AAPL,interrupts", irqs, 4);
358 } else {
359 iaddr.phys_hi = addr[0].phys_hi;
360 iaddr.phys_mid = addr[0].phys_mid;
361 iaddr.phys_lo = addr[0].phys_lo;
362 /*
363 * Thankfully, PCI can only have one entry in its
364 * "interrupts" property.
365 */
366 len = OF_getprop(node, "interrupts", &iaddr.icells[0],
367 4*ilen);
368 if (len != 4*ilen)
369 continue;
370 len = find_node_intr(node, &iaddr.phys_hi, irqs);
371 }
372 if (len <= 0) {
373 /*
374 * If we still don't have an interrupt, try one
375 * more time. This case covers devices behind the
376 * PCI-PCI bridge in a UMAX S900 or similar (9500?)
377 * system. These slots all share the bridge's
378 * interrupt.
379 */
380 len = find_node_intr(node, &addr[0].phys_hi, irqs);
381 if (len <= 0)
382 continue;
383 }
384 intr = pci_conf_read(pc, tag, PCI_INTERRUPT_REG);
385 intr &= ~PCI_INTERRUPT_LINE_MASK;
386 intr |= irqs[0] & PCI_INTERRUPT_LINE_MASK;
387 pci_conf_write(pc, tag, PCI_INTERRUPT_REG, intr);
388 }
389 }
390
391 /*
392 * Find PCI IRQ of the node from OF tree.
393 */
394 int
395 find_node_intr(node, addr, intr)
396 int node;
397 u_int32_t *addr, *intr;
398 {
399 int parent, len, mlen, iparent;
400 int match, i;
401 u_int32_t map[160];
402 const u_int32_t *mp;
403 u_int32_t imapmask[8], maskedaddr[8];
404 u_int32_t acells, icells;
405 char name[32];
406
407 /* XXXSL: 1st check for a interrupt-parent property */
408 if (OF_getprop(node, "interrupt-parent", &iparent, sizeof(iparent)) == sizeof(iparent))
409 {
410 /* How many cells to specify an interrupt ?? */
411 if (OF_getprop(iparent, "#interrupt-cells", &icells, 4) != 4)
412 return -1;
413
414 if (OF_getprop(node, "interrupts", &map, sizeof(map)) != (icells * 4))
415 return -1;
416
417 memcpy(intr, map, icells * 4);
418 return (icells * 4);
419 }
420
421 parent = OF_parent(node);
422 len = OF_getprop(parent, "interrupt-map", map, sizeof(map));
423 mlen = OF_getprop(parent, "interrupt-map-mask", imapmask,
424 sizeof(imapmask));
425
426 if (mlen != -1)
427 memcpy(maskedaddr, addr, mlen);
428 again:
429 if (len == -1 || mlen == -1)
430 goto nomap;
431
432 #ifdef DIAGNOSTIC
433 if (mlen == sizeof(imapmask)) {
434 printf("interrupt-map too long\n");
435 return -1;
436 }
437 #endif
438
439 /* mask addr by "interrupt-map-mask" */
440 for (i = 0; i < mlen / 4; i++)
441 maskedaddr[i] &= imapmask[i];
442
443 mp = map;
444 i = 0;
445 while (len > mlen) {
446 match = memcmp(maskedaddr, mp, mlen);
447 mp += mlen / 4;
448 len -= mlen;
449
450 /*
451 * We must read "#address-cells" and "#interrupt-cells" each
452 * time because each interrupt-parent may be different.
453 */
454 iparent = *mp++;
455 len -= 4;
456 i = OF_getprop(iparent, "#address-cells", &acells, 4);
457 if (i <= 0)
458 acells = 0;
459 else if (i != 4)
460 return -1;
461 if (OF_getprop(iparent, "#interrupt-cells", &icells, 4) != 4)
462 return -1;
463
464 /* Found. */
465 if (match == 0) {
466 /*
467 * We matched on address/interrupt, but are we done?
468 */
469 if (acells == 0) { /* XXX */
470 /*
471 * If we are at the interrupt controller,
472 * we are finally done. Save the result and
473 * return.
474 */
475 memcpy(intr, mp, icells * 4);
476 return icells * 4;
477 }
478 /*
479 * We are now at an intermedia interrupt node. We
480 * need to use its interrupt mask and map the
481 * supplied address/interrupt via its map.
482 */
483 mlen = OF_getprop(iparent, "interrupt-map-mask",
484 imapmask, sizeof(imapmask));
485 #ifdef DIAGNOSTIC
486 if (mlen != (acells + icells)*4) {
487 printf("interrupt-map inconsistent (%d, %d)\n",
488 mlen, (acells + icells)*4);
489 return -1;
490 }
491 #endif
492 memcpy(maskedaddr, mp, mlen);
493 len = OF_getprop(iparent, "interrupt-map", map,
494 sizeof(map));
495 goto again;
496 }
497
498 mp += (acells + icells);
499 len -= (acells + icells) * 4;
500 }
501
502 nomap:
503 /*
504 * If the node has no interrupt property and the parent is a
505 * pci-bridge, use parent's interrupt. This occurs on a PCI
506 * slot. (e.g. AHA-3940)
507 */
508 memset(name, 0, sizeof(name));
509 OF_getprop(parent, "name", name, sizeof(name));
510 if (strcmp(name, "pci-bridge") == 0) {
511 len = OF_getprop(parent, "AAPL,interrupts", intr, 4) ;
512 if (len == 4)
513 return len;
514 #if 0
515 /*
516 * XXX I don't know what is the correct local address.
517 * XXX Use the first entry for now.
518 */
519 len = OF_getprop(parent, "interrupt-map", map, sizeof(map));
520 if (len >= 36) {
521 addr = &map[5];
522 return find_node_intr(parent, addr, intr);
523 }
524 #endif
525 }
526
527 /*
528 * If all else fails, attempt to get AAPL, interrupts property.
529 * Grackle, at least, uses this instead of above in some cases.
530 */
531 len = OF_getprop(node, "AAPL,interrupts", intr, 4) ;
532 if (len == 4)
533 return len;
534
535 return -1;
536 }
537