pci_machdep.c revision 1.32 1 /* $NetBSD: pci_machdep.c,v 1.32 2006/09/27 22:44:18 macallan Exp $ */
2
3 /*
4 * Copyright (c) 1996 Christopher G. Demetriou. All rights reserved.
5 * Copyright (c) 1994 Charles M. Hannum. All rights reserved.
6 *
7 * Redistribution and use in source and binary forms, with or without
8 * modification, are permitted provided that the following conditions
9 * are met:
10 * 1. Redistributions of source code must retain the above copyright
11 * notice, this list of conditions and the following disclaimer.
12 * 2. Redistributions in binary form must reproduce the above copyright
13 * notice, this list of conditions and the following disclaimer in the
14 * documentation and/or other materials provided with the distribution.
15 * 3. All advertising materials mentioning features or use of this software
16 * must display the following acknowledgement:
17 * This product includes software developed by Charles M. Hannum.
18 * 4. The name of the author may not be used to endorse or promote products
19 * derived from this software without specific prior written permission.
20 *
21 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
22 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
23 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
24 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
25 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
26 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
27 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
28 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
29 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
30 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
31 */
32
33 /*
34 * Machine-specific functions for PCI autoconfiguration.
35 *
36 * On PCs, there are two methods of generating PCI configuration cycles.
37 * We try to detect the appropriate mechanism for this machine and set
38 * up a few function pointers to access the correct method directly.
39 *
40 * The configuration method can be hard-coded in the config file by
41 * using `options PCI_CONF_MODE=N', where `N' is the configuration mode
42 * as defined section 3.6.4.1, `Generating Configuration Cycles'.
43 */
44
45 #include <sys/cdefs.h>
46 __KERNEL_RCSID(0, "$NetBSD: pci_machdep.c,v 1.32 2006/09/27 22:44:18 macallan Exp $");
47
48 #include <sys/types.h>
49 #include <sys/param.h>
50 #include <sys/time.h>
51 #include <sys/systm.h>
52 #include <sys/errno.h>
53 #include <sys/device.h>
54
55 #include <uvm/uvm_extern.h>
56
57 #define _MACPPC_BUS_DMA_PRIVATE
58 #include <machine/bus.h>
59
60 #include <machine/bus.h>
61 #include <machine/pio.h>
62 #include <machine/intr.h>
63
64 #include <dev/pci/pcivar.h>
65 #include <dev/pci/pcireg.h>
66 #include <dev/pci/pcidevs.h>
67
68 #include <dev/ofw/openfirm.h>
69 #include <dev/ofw/ofw_pci.h>
70
71 static void fixpci __P((int, pci_chipset_tag_t));
72 static int find_node_intr __P((int, u_int32_t *, u_int32_t *));
73
74 /*
75 * PCI doesn't have any special needs; just use the generic versions
76 * of these functions.
77 */
78 struct macppc_bus_dma_tag pci_bus_dma_tag = {
79 0, /* _bounce_thresh */
80 _bus_dmamap_create,
81 _bus_dmamap_destroy,
82 _bus_dmamap_load,
83 _bus_dmamap_load_mbuf,
84 _bus_dmamap_load_uio,
85 _bus_dmamap_load_raw,
86 _bus_dmamap_unload,
87 NULL, /* _dmamap_sync */
88 _bus_dmamem_alloc,
89 _bus_dmamem_free,
90 _bus_dmamem_map,
91 _bus_dmamem_unmap,
92 _bus_dmamem_mmap,
93 };
94
95 void
96 pci_attach_hook(parent, self, pba)
97 struct device *parent, *self;
98 struct pcibus_attach_args *pba;
99 {
100 pci_chipset_tag_t pc = pba->pba_pc;
101 int bus = pba->pba_bus;
102 int node, nn, sz;
103 int32_t busrange[2];
104
105 for (node = pc->node; node; node = nn) {
106 sz = OF_getprop(node, "bus-range", busrange, 8);
107 if (sz == 8 && busrange[0] == bus) {
108 fixpci(node, pc);
109 return;
110 }
111 if ((nn = OF_child(node)) != 0)
112 continue;
113 while ((nn = OF_peer(node)) == 0) {
114 node = OF_parent(node);
115 if (node == pc->node)
116 return; /* not found */
117 }
118 }
119 }
120
121 int
122 pci_bus_maxdevs(pc, busno)
123 pci_chipset_tag_t pc;
124 int busno;
125 {
126
127 /*
128 * Bus number is irrelevant. Configuration Mechanism 1 is in
129 * use, can have devices 0-32 (i.e. the `normal' range).
130 */
131 return 32;
132 }
133
134 pcitag_t
135 pci_make_tag(pc, bus, device, function)
136 pci_chipset_tag_t pc;
137 int bus, device, function;
138 {
139 pcitag_t tag;
140
141 if (bus >= 256 || device >= 32 || function >= 8)
142 panic("pci_make_tag: bad request");
143
144 /* XXX magic number */
145 tag = 0x80000000 | (bus << 16) | (device << 11) | (function << 8);
146
147 return tag;
148 }
149
150 void
151 pci_decompose_tag(pc, tag, bp, dp, fp)
152 pci_chipset_tag_t pc;
153 pcitag_t tag;
154 int *bp, *dp, *fp;
155 {
156
157 if (bp != NULL)
158 *bp = (tag >> 16) & 0xff;
159 if (dp != NULL)
160 *dp = (tag >> 11) & 0x1f;
161 if (fp != NULL)
162 *fp = (tag >> 8) & 0x07;
163 }
164
165 pcireg_t
166 pci_conf_read(pc, tag, reg)
167 pci_chipset_tag_t pc;
168 pcitag_t tag;
169 int reg;
170 {
171
172 return (*pc->conf_read)(pc, tag, reg);
173 }
174
175 void
176 pci_conf_write(pc, tag, reg, data)
177 pci_chipset_tag_t pc;
178 pcitag_t tag;
179 int reg;
180 pcireg_t data;
181 {
182
183 (*pc->conf_write)(pc, tag, reg, data);
184 }
185
186 int
187 pci_intr_map(pa, ihp)
188 struct pci_attach_args *pa;
189 pci_intr_handle_t *ihp;
190 {
191 int pin = pa->pa_intrpin;
192 int line = pa->pa_intrline;
193
194 #if DEBUG
195 printf("%s: pin: %d, line: %d\n", __FUNCTION__, pin, line);
196 #endif
197
198 if (pin == 0) {
199 /* No IRQ used. */
200 printf("pci_intr_map: interrupt pin %d\n", pin);
201 goto bad;
202 }
203
204 if (pin > 4) {
205 printf("pci_intr_map: bad interrupt pin %d\n", pin);
206 goto bad;
207 }
208
209 /*
210 * Section 6.2.4, `Miscellaneous Functions', says that 255 means
211 * `unknown' or `no connection' on a PC. We assume that a device with
212 * `no connection' either doesn't have an interrupt (in which case the
213 * pin number should be 0, and would have been noticed above), or
214 * wasn't configured by the BIOS (in which case we punt, since there's
215 * no real way we can know how the interrupt lines are mapped in the
216 * hardware).
217 *
218 * XXX
219 * Since IRQ 0 is only used by the clock, and we can't actually be sure
220 * that the BIOS did its job, we also recognize that as meaning that
221 * the BIOS has not configured the device.
222 */
223 if (line == 0 || line == 255) {
224 printf("pci_intr_map: no mapping for pin %c\n", '@' + pin);
225 goto bad;
226 } else {
227 if (line >= ICU_LEN) {
228 printf("pci_intr_map: bad interrupt line %d\n", line);
229 goto bad;
230 }
231 }
232
233 *ihp = line;
234 return 0;
235
236 bad:
237 *ihp = -1;
238 return 1;
239 }
240
241 const char *
242 pci_intr_string(pc, ih)
243 pci_chipset_tag_t pc;
244 pci_intr_handle_t ih;
245 {
246 static char irqstr[8]; /* 4 + 2 + NULL + sanity */
247
248 if (ih == 0 || ih >= ICU_LEN)
249 panic("pci_intr_string: bogus handle 0x%x", ih);
250
251 sprintf(irqstr, "irq %d", ih);
252 return (irqstr);
253
254 }
255
256 const struct evcnt *
257 pci_intr_evcnt(pc, ih)
258 pci_chipset_tag_t pc;
259 pci_intr_handle_t ih;
260 {
261
262 /* XXX for now, no evcnt parent reported */
263 return NULL;
264 }
265
266 void *
267 pci_intr_establish(pc, ih, level, func, arg)
268 pci_chipset_tag_t pc;
269 pci_intr_handle_t ih;
270 int level, (*func) __P((void *));
271 void *arg;
272 {
273
274 if (ih == 0 || ih >= ICU_LEN)
275 panic("pci_intr_establish: bogus handle 0x%x", ih);
276
277 return intr_establish(ih, IST_LEVEL, level, func, arg);
278 }
279
280 void
281 pci_intr_disestablish(pc, cookie)
282 pci_chipset_tag_t pc;
283 void *cookie;
284 {
285
286 intr_disestablish(cookie);
287 }
288
289 #define pcibus(x) \
290 (((x) & OFW_PCI_PHYS_HI_BUSMASK) >> OFW_PCI_PHYS_HI_BUSSHIFT)
291 #define pcidev(x) \
292 (((x) & OFW_PCI_PHYS_HI_DEVICEMASK) >> OFW_PCI_PHYS_HI_DEVICESHIFT)
293 #define pcifunc(x) \
294 (((x) & OFW_PCI_PHYS_HI_FUNCTIONMASK) >> OFW_PCI_PHYS_HI_FUNCTIONSHIFT)
295
296 void
297 fixpci(parent, pc)
298 int parent;
299 pci_chipset_tag_t pc;
300 {
301 int node;
302 pcitag_t tag;
303 pcireg_t csr, intr, id;
304 int len, i, ilen;
305 int32_t irqs[4];
306 struct {
307 u_int32_t phys_hi, phys_mid, phys_lo;
308 u_int32_t size_hi, size_lo;
309 } addr[8];
310 struct {
311 u_int32_t phys_hi, phys_mid, phys_lo;
312 u_int32_t icells[5];
313 } iaddr;
314
315 len = OF_getprop(parent, "#interrupt-cells", &ilen, sizeof(ilen));
316 if (len < 0)
317 ilen = 0;
318 for (node = OF_child(parent); node; node = OF_peer(node)) {
319 len = OF_getprop(node, "assigned-addresses", addr,
320 sizeof(addr));
321 if (len < (int)sizeof(addr[0]))
322 continue;
323
324 tag = pci_make_tag(pc, pcibus(addr[0].phys_hi),
325 pcidev(addr[0].phys_hi),
326 pcifunc(addr[0].phys_hi));
327
328 /*
329 * Make sure the IO and MEM enable bits are set in the CSR.
330 */
331 csr = pci_conf_read(pc, tag, PCI_COMMAND_STATUS_REG);
332 csr &= ~(PCI_COMMAND_IO_ENABLE | PCI_COMMAND_MEM_ENABLE);
333
334 for (i = 0; i < len / sizeof(addr[0]); i++) {
335 switch (addr[i].phys_hi & OFW_PCI_PHYS_HI_SPACEMASK) {
336 case OFW_PCI_PHYS_HI_SPACE_IO:
337 csr |= PCI_COMMAND_IO_ENABLE;
338 break;
339
340 case OFW_PCI_PHYS_HI_SPACE_MEM32:
341 case OFW_PCI_PHYS_HI_SPACE_MEM64:
342 csr |= PCI_COMMAND_MEM_ENABLE;
343 break;
344 }
345 }
346
347 pci_conf_write(pc, tag, PCI_COMMAND_STATUS_REG, csr);
348
349 /*
350 * Make sure the line register is programmed with the
351 * interrupt mapping.
352 */
353 if (ilen == 0) {
354 /*
355 * Early Apple OFW implementation don't handle
356 * interrupts as defined by the OFW PCI bindings.
357 */
358 len = OF_getprop(node, "AAPL,interrupts", irqs, 4);
359 } else {
360 iaddr.phys_hi = addr[0].phys_hi;
361 iaddr.phys_mid = addr[0].phys_mid;
362 iaddr.phys_lo = addr[0].phys_lo;
363 /*
364 * Thankfully, PCI can only have one entry in its
365 * "interrupts" property.
366 */
367 len = OF_getprop(node, "interrupts", &iaddr.icells[0],
368 4*ilen);
369 if (len != 4*ilen)
370 continue;
371 len = find_node_intr(node, &iaddr.phys_hi, irqs);
372 }
373 if (len <= 0) {
374 /*
375 * If we still don't have an interrupt, try one
376 * more time. This case covers devices behind the
377 * PCI-PCI bridge in a UMAX S900 or similar (9500?)
378 * system. These slots all share the bridge's
379 * interrupt.
380 */
381 len = find_node_intr(node, &addr[0].phys_hi, irqs);
382 if (len <= 0)
383 continue;
384 }
385
386 /*
387 * For PowerBook 2400, 3400 and original G3:
388 * check if we have a 2nd ohare PIC - if so frob the built-in
389 * tlp's IRQ to 60
390 * first see if we have something on bus 0 device 13 and if
391 * it's a DEC 21041
392 */
393 id = pci_conf_read(pc, tag, PCI_ID_REG);
394 if ((tag == pci_make_tag(pc, 0, 13, 0)) &&
395 (PCI_VENDOR(id) == PCI_VENDOR_DEC) &&
396 (PCI_PRODUCT(id) == PCI_PRODUCT_DEC_21041)) {
397
398 /* now look for the 2nd ohare */
399 if (OF_finddevice("/bandit/pci106b,7") != -1) {
400
401 irqs[0] = 60;
402 printf("\nohare: frobbing tlp IRQ to 60");
403 }
404 }
405
406 intr = pci_conf_read(pc, tag, PCI_INTERRUPT_REG);
407 intr &= ~PCI_INTERRUPT_LINE_MASK;
408 intr |= irqs[0] & PCI_INTERRUPT_LINE_MASK;
409 pci_conf_write(pc, tag, PCI_INTERRUPT_REG, intr);
410 }
411 }
412
413 /*
414 * Find PCI IRQ of the node from OF tree.
415 */
416 int
417 find_node_intr(node, addr, intr)
418 int node;
419 u_int32_t *addr, *intr;
420 {
421 int parent, len, mlen, iparent;
422 int match, i;
423 u_int32_t map[160];
424 const u_int32_t *mp;
425 u_int32_t imapmask[8], maskedaddr[8];
426 u_int32_t acells, icells;
427 char name[32];
428
429 /* XXXSL: 1st check for a interrupt-parent property */
430 if (OF_getprop(node, "interrupt-parent", &iparent, sizeof(iparent)) == sizeof(iparent))
431 {
432 /* How many cells to specify an interrupt ?? */
433 if (OF_getprop(iparent, "#interrupt-cells", &icells, 4) != 4)
434 return -1;
435
436 if (OF_getprop(node, "interrupts", &map, sizeof(map)) != (icells * 4))
437 return -1;
438
439 memcpy(intr, map, icells * 4);
440 return (icells * 4);
441 }
442
443 parent = OF_parent(node);
444 len = OF_getprop(parent, "interrupt-map", map, sizeof(map));
445 mlen = OF_getprop(parent, "interrupt-map-mask", imapmask,
446 sizeof(imapmask));
447
448 if (mlen != -1)
449 memcpy(maskedaddr, addr, mlen);
450 again:
451 if (len == -1 || mlen == -1)
452 goto nomap;
453
454 #ifdef DIAGNOSTIC
455 if (mlen == sizeof(imapmask)) {
456 printf("interrupt-map too long\n");
457 return -1;
458 }
459 #endif
460
461 /* mask addr by "interrupt-map-mask" */
462 for (i = 0; i < mlen / 4; i++)
463 maskedaddr[i] &= imapmask[i];
464
465 mp = map;
466 i = 0;
467 while (len > mlen) {
468 match = memcmp(maskedaddr, mp, mlen);
469 mp += mlen / 4;
470 len -= mlen;
471
472 /*
473 * We must read "#address-cells" and "#interrupt-cells" each
474 * time because each interrupt-parent may be different.
475 */
476 iparent = *mp++;
477 len -= 4;
478 i = OF_getprop(iparent, "#address-cells", &acells, 4);
479 if (i <= 0)
480 acells = 0;
481 else if (i != 4)
482 return -1;
483 if (OF_getprop(iparent, "#interrupt-cells", &icells, 4) != 4)
484 return -1;
485
486 /* Found. */
487 if (match == 0) {
488 /*
489 * We matched on address/interrupt, but are we done?
490 */
491 if (acells == 0) { /* XXX */
492 /*
493 * If we are at the interrupt controller,
494 * we are finally done. Save the result and
495 * return.
496 */
497 memcpy(intr, mp, icells * 4);
498 return icells * 4;
499 }
500 /*
501 * We are now at an intermedia interrupt node. We
502 * need to use its interrupt mask and map the
503 * supplied address/interrupt via its map.
504 */
505 mlen = OF_getprop(iparent, "interrupt-map-mask",
506 imapmask, sizeof(imapmask));
507 #ifdef DIAGNOSTIC
508 if (mlen != (acells + icells)*4) {
509 printf("interrupt-map inconsistent (%d, %d)\n",
510 mlen, (acells + icells)*4);
511 return -1;
512 }
513 #endif
514 memcpy(maskedaddr, mp, mlen);
515 len = OF_getprop(iparent, "interrupt-map", map,
516 sizeof(map));
517 goto again;
518 }
519
520 mp += (acells + icells);
521 len -= (acells + icells) * 4;
522 }
523
524 nomap:
525 /*
526 * If the node has no interrupt property and the parent is a
527 * pci-bridge, use parent's interrupt. This occurs on a PCI
528 * slot. (e.g. AHA-3940)
529 */
530 memset(name, 0, sizeof(name));
531 OF_getprop(parent, "name", name, sizeof(name));
532 if (strcmp(name, "pci-bridge") == 0) {
533 len = OF_getprop(parent, "AAPL,interrupts", intr, 4) ;
534 if (len == 4)
535 return len;
536 #if 0
537 /*
538 * XXX I don't know what is the correct local address.
539 * XXX Use the first entry for now.
540 */
541 len = OF_getprop(parent, "interrupt-map", map, sizeof(map));
542 if (len >= 36) {
543 addr = &map[5];
544 return find_node_intr(parent, addr, intr);
545 }
546 #endif
547 }
548
549 /*
550 * If all else fails, attempt to get AAPL, interrupts property.
551 * Grackle, at least, uses this instead of above in some cases.
552 */
553 len = OF_getprop(node, "AAPL,interrupts", intr, 4) ;
554 if (len == 4)
555 return len;
556
557 return -1;
558 }
559