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pci_machdep.c revision 1.33
      1 /*	$NetBSD: pci_machdep.c,v 1.33 2007/01/03 22:28:30 macallan Exp $	*/
      2 
      3 /*
      4  * Copyright (c) 1996 Christopher G. Demetriou.  All rights reserved.
      5  * Copyright (c) 1994 Charles M. Hannum.  All rights reserved.
      6  *
      7  * Redistribution and use in source and binary forms, with or without
      8  * modification, are permitted provided that the following conditions
      9  * are met:
     10  * 1. Redistributions of source code must retain the above copyright
     11  *    notice, this list of conditions and the following disclaimer.
     12  * 2. Redistributions in binary form must reproduce the above copyright
     13  *    notice, this list of conditions and the following disclaimer in the
     14  *    documentation and/or other materials provided with the distribution.
     15  * 3. All advertising materials mentioning features or use of this software
     16  *    must display the following acknowledgement:
     17  *	This product includes software developed by Charles M. Hannum.
     18  * 4. The name of the author may not be used to endorse or promote products
     19  *    derived from this software without specific prior written permission.
     20  *
     21  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
     22  * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
     23  * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
     24  * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
     25  * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
     26  * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
     27  * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
     28  * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
     29  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
     30  * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
     31  */
     32 
     33 /*
     34  * Machine-specific functions for PCI autoconfiguration.
     35  *
     36  * On PCs, there are two methods of generating PCI configuration cycles.
     37  * We try to detect the appropriate mechanism for this machine and set
     38  * up a few function pointers to access the correct method directly.
     39  *
     40  * The configuration method can be hard-coded in the config file by
     41  * using `options PCI_CONF_MODE=N', where `N' is the configuration mode
     42  * as defined section 3.6.4.1, `Generating Configuration Cycles'.
     43  */
     44 
     45 #include <sys/cdefs.h>
     46 __KERNEL_RCSID(0, "$NetBSD: pci_machdep.c,v 1.33 2007/01/03 22:28:30 macallan Exp $");
     47 
     48 #include <sys/types.h>
     49 #include <sys/param.h>
     50 #include <sys/time.h>
     51 #include <sys/systm.h>
     52 #include <sys/errno.h>
     53 #include <sys/device.h>
     54 
     55 #include <uvm/uvm_extern.h>
     56 
     57 #define _MACPPC_BUS_DMA_PRIVATE
     58 #include <machine/bus.h>
     59 
     60 #include <machine/autoconf.h>
     61 #include <machine/pio.h>
     62 #include <machine/intr.h>
     63 
     64 #include <dev/pci/pcivar.h>
     65 #include <dev/pci/pcireg.h>
     66 #include <dev/pci/ppbreg.h>
     67 #include <dev/pci/pcidevs.h>
     68 
     69 #include <dev/ofw/openfirm.h>
     70 #include <dev/ofw/ofw_pci.h>
     71 
     72 static void fixpci __P((int, pci_chipset_tag_t));
     73 static int find_node_intr __P((int, u_int32_t *, u_int32_t *));
     74 static void fix_cardbus_bridge(int, pci_chipset_tag_t, pcitag_t);
     75 
     76 /*
     77  * PCI doesn't have any special needs; just use the generic versions
     78  * of these functions.
     79  */
     80 struct macppc_bus_dma_tag pci_bus_dma_tag = {
     81 	0,			/* _bounce_thresh */
     82 	_bus_dmamap_create,
     83 	_bus_dmamap_destroy,
     84 	_bus_dmamap_load,
     85 	_bus_dmamap_load_mbuf,
     86 	_bus_dmamap_load_uio,
     87 	_bus_dmamap_load_raw,
     88 	_bus_dmamap_unload,
     89 	NULL,			/* _dmamap_sync */
     90 	_bus_dmamem_alloc,
     91 	_bus_dmamem_free,
     92 	_bus_dmamem_map,
     93 	_bus_dmamem_unmap,
     94 	_bus_dmamem_mmap,
     95 };
     96 
     97 void
     98 pci_attach_hook(parent, self, pba)
     99 	struct device *parent, *self;
    100 	struct pcibus_attach_args *pba;
    101 {
    102 	pci_chipset_tag_t pc = pba->pba_pc;
    103 	int bus = pba->pba_bus;
    104 	int node, nn, sz;
    105 	int32_t busrange[2];
    106 
    107 	for (node = pc->node; node; node = nn) {
    108 		sz = OF_getprop(node, "bus-range", busrange, 8);
    109 		if (sz == 8 && busrange[0] == bus) {
    110 			fixpci(node, pc);
    111 			return;
    112 		}
    113 		if ((nn = OF_child(node)) != 0)
    114 			continue;
    115 		while ((nn = OF_peer(node)) == 0) {
    116 			node = OF_parent(node);
    117 			if (node == pc->node)
    118 				return;		/* not found */
    119 		}
    120 	}
    121 }
    122 
    123 int
    124 pci_bus_maxdevs(pc, busno)
    125 	pci_chipset_tag_t pc;
    126 	int busno;
    127 {
    128 
    129 	/*
    130 	 * Bus number is irrelevant.  Configuration Mechanism 1 is in
    131 	 * use, can have devices 0-32 (i.e. the `normal' range).
    132 	 */
    133 	return 32;
    134 }
    135 
    136 pcitag_t
    137 pci_make_tag(pc, bus, device, function)
    138 	pci_chipset_tag_t pc;
    139 	int bus, device, function;
    140 {
    141 	pcitag_t tag;
    142 
    143 	if (bus >= 256 || device >= 32 || function >= 8)
    144 		panic("pci_make_tag: bad request");
    145 
    146 	/* XXX magic number */
    147 	tag = 0x80000000 | (bus << 16) | (device << 11) | (function << 8);
    148 
    149 	return tag;
    150 }
    151 
    152 void
    153 pci_decompose_tag(pc, tag, bp, dp, fp)
    154 	pci_chipset_tag_t pc;
    155 	pcitag_t tag;
    156 	int *bp, *dp, *fp;
    157 {
    158 
    159 	if (bp != NULL)
    160 		*bp = (tag >> 16) & 0xff;
    161 	if (dp != NULL)
    162 		*dp = (tag >> 11) & 0x1f;
    163 	if (fp != NULL)
    164 		*fp = (tag >> 8) & 0x07;
    165 }
    166 
    167 pcireg_t
    168 pci_conf_read(pc, tag, reg)
    169 	pci_chipset_tag_t pc;
    170 	pcitag_t tag;
    171 	int reg;
    172 {
    173 
    174 	return (*pc->conf_read)(pc, tag, reg);
    175 }
    176 
    177 void
    178 pci_conf_write(pc, tag, reg, data)
    179 	pci_chipset_tag_t pc;
    180 	pcitag_t tag;
    181 	int reg;
    182 	pcireg_t data;
    183 {
    184 
    185 	(*pc->conf_write)(pc, tag, reg, data);
    186 }
    187 
    188 int
    189 pci_intr_map(pa, ihp)
    190 	struct pci_attach_args *pa;
    191 	pci_intr_handle_t *ihp;
    192 {
    193 	int pin = pa->pa_intrpin;
    194 	int line = pa->pa_intrline;
    195 
    196 #if DEBUG
    197 	printf("%s: pin: %d, line: %d\n", __FUNCTION__, pin, line);
    198 #endif
    199 
    200 	if (pin == 0) {
    201 		/* No IRQ used. */
    202 		printf("pci_intr_map: interrupt pin %d\n", pin);
    203 		goto bad;
    204 	}
    205 
    206 	if (pin > 4) {
    207 		printf("pci_intr_map: bad interrupt pin %d\n", pin);
    208 		goto bad;
    209 	}
    210 
    211 	/*
    212 	 * Section 6.2.4, `Miscellaneous Functions', says that 255 means
    213 	 * `unknown' or `no connection' on a PC.  We assume that a device with
    214 	 * `no connection' either doesn't have an interrupt (in which case the
    215 	 * pin number should be 0, and would have been noticed above), or
    216 	 * wasn't configured by the BIOS (in which case we punt, since there's
    217 	 * no real way we can know how the interrupt lines are mapped in the
    218 	 * hardware).
    219 	 *
    220 	 * XXX
    221 	 * Since IRQ 0 is only used by the clock, and we can't actually be sure
    222 	 * that the BIOS did its job, we also recognize that as meaning that
    223 	 * the BIOS has not configured the device.
    224 	 */
    225 	if (line == 0 || line == 255) {
    226 		printf("pci_intr_map: no mapping for pin %c\n", '@' + pin);
    227 		goto bad;
    228 	} else {
    229 		if (line >= ICU_LEN) {
    230 			printf("pci_intr_map: bad interrupt line %d\n", line);
    231 			goto bad;
    232 		}
    233 	}
    234 
    235 	*ihp = line;
    236 	return 0;
    237 
    238 bad:
    239 	*ihp = -1;
    240 	return 1;
    241 }
    242 
    243 const char *
    244 pci_intr_string(pc, ih)
    245 	pci_chipset_tag_t pc;
    246 	pci_intr_handle_t ih;
    247 {
    248 	static char irqstr[8];		/* 4 + 2 + NULL + sanity */
    249 
    250 	if (ih == 0 || ih >= ICU_LEN)
    251 		panic("pci_intr_string: bogus handle 0x%x", ih);
    252 
    253 	sprintf(irqstr, "irq %d", ih);
    254 	return (irqstr);
    255 
    256 }
    257 
    258 const struct evcnt *
    259 pci_intr_evcnt(pc, ih)
    260 	pci_chipset_tag_t pc;
    261 	pci_intr_handle_t ih;
    262 {
    263 
    264 	/* XXX for now, no evcnt parent reported */
    265 	return NULL;
    266 }
    267 
    268 void *
    269 pci_intr_establish(pc, ih, level, func, arg)
    270 	pci_chipset_tag_t pc;
    271 	pci_intr_handle_t ih;
    272 	int level, (*func) __P((void *));
    273 	void *arg;
    274 {
    275 
    276 	if (ih == 0 || ih >= ICU_LEN)
    277 		panic("pci_intr_establish: bogus handle 0x%x", ih);
    278 
    279 	return intr_establish(ih, IST_LEVEL, level, func, arg);
    280 }
    281 
    282 void
    283 pci_intr_disestablish(pc, cookie)
    284 	pci_chipset_tag_t pc;
    285 	void *cookie;
    286 {
    287 
    288 	intr_disestablish(cookie);
    289 }
    290 
    291 #define pcibus(x) \
    292 	(((x) & OFW_PCI_PHYS_HI_BUSMASK) >> OFW_PCI_PHYS_HI_BUSSHIFT)
    293 #define pcidev(x) \
    294 	(((x) & OFW_PCI_PHYS_HI_DEVICEMASK) >> OFW_PCI_PHYS_HI_DEVICESHIFT)
    295 #define pcifunc(x) \
    296 	(((x) & OFW_PCI_PHYS_HI_FUNCTIONMASK) >> OFW_PCI_PHYS_HI_FUNCTIONSHIFT)
    297 
    298 void
    299 fixpci(parent, pc)
    300 	int parent;
    301 	pci_chipset_tag_t pc;
    302 {
    303 	int node;
    304 	pcitag_t tag;
    305 	pcireg_t csr, intr, id, cr;
    306 	int len, i, ilen;
    307 	int32_t irqs[4];
    308 	struct {
    309 		u_int32_t phys_hi, phys_mid, phys_lo;
    310 		u_int32_t size_hi, size_lo;
    311 	} addr[8];
    312 	struct {
    313 		u_int32_t phys_hi, phys_mid, phys_lo;
    314 		u_int32_t icells[5];
    315 	} iaddr;
    316 
    317 	len = OF_getprop(parent, "#interrupt-cells", &ilen, sizeof(ilen));
    318 	if (len < 0)
    319 		ilen = 0;
    320 	for (node = OF_child(parent); node; node = OF_peer(node)) {
    321 		len = OF_getprop(node, "assigned-addresses", addr,
    322 				 sizeof(addr));
    323 		if (len < (int)sizeof(addr[0]))
    324 			continue;
    325 
    326 		tag = pci_make_tag(pc, pcibus(addr[0].phys_hi),
    327 				   pcidev(addr[0].phys_hi),
    328 				   pcifunc(addr[0].phys_hi));
    329 
    330 		/*
    331 		 * Make sure the IO and MEM enable bits are set in the CSR.
    332 		 */
    333 		csr = pci_conf_read(pc, tag, PCI_COMMAND_STATUS_REG);
    334 		csr &= ~(PCI_COMMAND_IO_ENABLE | PCI_COMMAND_MEM_ENABLE);
    335 
    336 		for (i = 0; i < len / sizeof(addr[0]); i++) {
    337 			switch (addr[i].phys_hi & OFW_PCI_PHYS_HI_SPACEMASK) {
    338 			case OFW_PCI_PHYS_HI_SPACE_IO:
    339 				csr |= PCI_COMMAND_IO_ENABLE;
    340 				break;
    341 
    342 			case OFW_PCI_PHYS_HI_SPACE_MEM32:
    343 			case OFW_PCI_PHYS_HI_SPACE_MEM64:
    344 				csr |= PCI_COMMAND_MEM_ENABLE;
    345 				break;
    346 			}
    347 		}
    348 
    349 		pci_conf_write(pc, tag, PCI_COMMAND_STATUS_REG, csr);
    350 
    351 		/*
    352 		 * Make sure the line register is programmed with the
    353 		 * interrupt mapping.
    354 		 */
    355 		if (ilen == 0) {
    356 			/*
    357 			 * Early Apple OFW implementation don't handle
    358 			 * interrupts as defined by the OFW PCI bindings.
    359 			 */
    360 			len = OF_getprop(node, "AAPL,interrupts", irqs, 4);
    361 		} else {
    362 			iaddr.phys_hi = addr[0].phys_hi;
    363 			iaddr.phys_mid = addr[0].phys_mid;
    364 			iaddr.phys_lo = addr[0].phys_lo;
    365 			/*
    366 			 * Thankfully, PCI can only have one entry in its
    367 			 * "interrupts" property.
    368 			 */
    369 			len = OF_getprop(node, "interrupts", &iaddr.icells[0],
    370 			    4*ilen);
    371 			if (len != 4*ilen)
    372 				continue;
    373 			len = find_node_intr(node, &iaddr.phys_hi, irqs);
    374 		}
    375 		if (len <= 0) {
    376 			/*
    377 			 * If we still don't have an interrupt, try one
    378 			 * more time.  This case covers devices behind the
    379 			 * PCI-PCI bridge in a UMAX S900 or similar (9500?)
    380 			 * system.  These slots all share the bridge's
    381 			 * interrupt.
    382 			 */
    383 			len = find_node_intr(node, &addr[0].phys_hi, irqs);
    384 			if (len <= 0)
    385 				continue;
    386 		}
    387 
    388 		/*
    389 		 * For PowerBook 2400, 3400 and original G3:
    390 		 * check if we have a 2nd ohare PIC - if so frob the built-in
    391 		 * tlp's IRQ to 60
    392 		 * first see if we have something on bus 0 device 13 and if
    393 		 * it's a DEC 21041
    394 		 */
    395 		id = pci_conf_read(pc, tag, PCI_ID_REG);
    396 		if ((tag == pci_make_tag(pc, 0, 13, 0)) &&
    397 		    (PCI_VENDOR(id) == PCI_VENDOR_DEC) &&
    398 		    (PCI_PRODUCT(id) == PCI_PRODUCT_DEC_21041)) {
    399 
    400 			/* now look for the 2nd ohare */
    401 			if (OF_finddevice("/bandit/pci106b,7") != -1) {
    402 
    403 				irqs[0] = 60;
    404 				printf("\nohare: frobbing tlp IRQ to 60");
    405 			}
    406 		}
    407 
    408 		intr = pci_conf_read(pc, tag, PCI_INTERRUPT_REG);
    409 		intr &= ~PCI_INTERRUPT_LINE_MASK;
    410 		intr |= irqs[0] & PCI_INTERRUPT_LINE_MASK;
    411 		pci_conf_write(pc, tag, PCI_INTERRUPT_REG, intr);
    412 
    413 		/* fix secondary bus numbers on CardBus bridges */
    414 		cr = pci_conf_read(pc, tag, PCI_CLASS_REG);
    415 		if ((PCI_CLASS(cr) == PCI_CLASS_BRIDGE) &&
    416 		    (PCI_SUBCLASS(cr) == PCI_SUBCLASS_BRIDGE_CARDBUS)) {
    417 			uint32_t bi, busid;
    418 
    419 			/*
    420 			 * we found a CardBus bridge. Check if the bus number
    421 			 * is sane
    422 			 */
    423 			bi = pci_conf_read(pc, tag, PPB_REG_BUSINFO);
    424 			busid = bi & 0xff;
    425 			if (busid == 0) {
    426 				fix_cardbus_bridge(node, pc, tag);
    427 			}
    428 		}
    429 	}
    430 }
    431 
    432 static void
    433 fix_cardbus_bridge(int node, pci_chipset_tag_t pc, pcitag_t tag)
    434 {
    435 	uint32_t bus_number;
    436 	pcireg_t bi;
    437 	int bus, dev, fn, ih, len;
    438 	char path[256];
    439 
    440 	len = OF_package_to_path(node, path, sizeof(path));
    441 	path[len] = 0;
    442 
    443 	ih = OF_open(path);
    444 	OF_call_method("load-ata", ih, 0, 0);
    445 	OF_close(ih);
    446 
    447 	if (OF_getprop(node, "AAPL,bus-id", &bus_number, sizeof(bus_number))
    448 	    > 0) {
    449 
    450 		printf("\n%s: fixing bus number to %d", path, bus_number);
    451 		pci_decompose_tag(pc, tag, &bus, &dev, &fn);
    452 		bi = pci_conf_read(pc, tag, PPB_REG_BUSINFO);
    453 		bi &= 0xff000000;
    454 		/* XXX subordinate is always 32 here */
    455 		bi |= (bus & 0xff) | (bus_number << 8) | 0x200000;
    456 		pci_conf_write(pc, tag, PPB_REG_BUSINFO, bi);
    457 	}
    458 }
    459 
    460 /*
    461  * Find PCI IRQ of the node from OF tree.
    462  */
    463 int
    464 find_node_intr(node, addr, intr)
    465 	int node;
    466 	u_int32_t *addr, *intr;
    467 {
    468 	int parent, len, mlen, iparent;
    469 	int match, i;
    470 	u_int32_t map[160];
    471 	const u_int32_t *mp;
    472 	u_int32_t imapmask[8], maskedaddr[8];
    473 	u_int32_t acells, icells;
    474 	char name[32];
    475 
    476 	/* XXXSL: 1st check for a  interrupt-parent property */
    477         if (OF_getprop(node, "interrupt-parent", &iparent, sizeof(iparent)) == sizeof(iparent))
    478 	{
    479 		/* How many cells to specify an interrupt ?? */
    480 		if (OF_getprop(iparent, "#interrupt-cells", &icells, 4) != 4)
    481 			return -1;
    482 
    483 		if (OF_getprop(node, "interrupts", &map, sizeof(map)) != (icells * 4))
    484 			return -1;
    485 
    486 		memcpy(intr, map, icells * 4);
    487 		return (icells * 4);
    488 	}
    489 
    490 	parent = OF_parent(node);
    491 	len = OF_getprop(parent, "interrupt-map", map, sizeof(map));
    492 	mlen = OF_getprop(parent, "interrupt-map-mask", imapmask,
    493 	    sizeof(imapmask));
    494 
    495 	if (mlen != -1)
    496 		memcpy(maskedaddr, addr, mlen);
    497 again:
    498 	if (len == -1 || mlen == -1)
    499 		goto nomap;
    500 
    501 #ifdef DIAGNOSTIC
    502 	if (mlen == sizeof(imapmask)) {
    503 		printf("interrupt-map too long\n");
    504 		return -1;
    505 	}
    506 #endif
    507 
    508 	/* mask addr by "interrupt-map-mask" */
    509 	for (i = 0; i < mlen / 4; i++)
    510 		maskedaddr[i] &= imapmask[i];
    511 
    512 	mp = map;
    513 	i = 0;
    514 	while (len > mlen) {
    515 		match = memcmp(maskedaddr, mp, mlen);
    516 		mp += mlen / 4;
    517 		len -= mlen;
    518 
    519 		/*
    520 		 * We must read "#address-cells" and "#interrupt-cells" each
    521 		 * time because each interrupt-parent may be different.
    522 		 */
    523 		iparent = *mp++;
    524 		len -= 4;
    525 		i = OF_getprop(iparent, "#address-cells", &acells, 4);
    526 		if (i <= 0)
    527 			acells = 0;
    528 		else if (i != 4)
    529 			return -1;
    530 		if (OF_getprop(iparent, "#interrupt-cells", &icells, 4) != 4)
    531 			return -1;
    532 
    533 		/* Found. */
    534 		if (match == 0) {
    535 			/*
    536 			 * We matched on address/interrupt, but are we done?
    537 			 */
    538 			if (acells == 0) { /* XXX */
    539 				/*
    540 				 * If we are at the interrupt controller,
    541 				 * we are finally done.  Save the result and
    542 				 * return.
    543 				 */
    544 				memcpy(intr, mp, icells * 4);
    545 				return icells * 4;
    546 			}
    547 			/*
    548 			 * We are now at an intermedia interrupt node.  We
    549 			 * need to use its interrupt mask and map the
    550 			 * supplied address/interrupt via its map.
    551 			 */
    552 			mlen = OF_getprop(iparent, "interrupt-map-mask",
    553 			    imapmask, sizeof(imapmask));
    554 #ifdef DIAGNOSTIC
    555 			if (mlen != (acells + icells)*4) {
    556 				printf("interrupt-map inconsistent (%d, %d)\n",
    557 				    mlen, (acells + icells)*4);
    558 				return -1;
    559 			}
    560 #endif
    561 			memcpy(maskedaddr, mp, mlen);
    562 			len = OF_getprop(iparent, "interrupt-map", map,
    563 			    sizeof(map));
    564 			goto again;
    565 		}
    566 
    567 		mp += (acells + icells);
    568 		len -= (acells + icells) * 4;
    569 	}
    570 
    571 nomap:
    572 	/*
    573 	 * If the node has no interrupt property and the parent is a
    574 	 * pci-bridge, use parent's interrupt.  This occurs on a PCI
    575 	 * slot.  (e.g. AHA-3940)
    576 	 */
    577 	memset(name, 0, sizeof(name));
    578 	OF_getprop(parent, "name", name, sizeof(name));
    579 	if (strcmp(name, "pci-bridge") == 0) {
    580 		len = OF_getprop(parent, "AAPL,interrupts", intr, 4) ;
    581 		if (len == 4)
    582 			return len;
    583 #if 0
    584 		/*
    585 		 * XXX I don't know what is the correct local address.
    586 		 * XXX Use the first entry for now.
    587 		 */
    588 		len = OF_getprop(parent, "interrupt-map", map, sizeof(map));
    589 		if (len >= 36) {
    590 			addr = &map[5];
    591 			return find_node_intr(parent, addr, intr);
    592 		}
    593 #endif
    594 	}
    595 
    596 	/*
    597 	 * If all else fails, attempt to get AAPL, interrupts property.
    598 	 * Grackle, at least, uses this instead of above in some cases.
    599 	 */
    600 	len = OF_getprop(node, "AAPL,interrupts", intr, 4) ;
    601 	if (len == 4)
    602 		return len;
    603 
    604 	return -1;
    605 }
    606