pci_machdep.c revision 1.34.14.4 1 /* $NetBSD: pci_machdep.c,v 1.34.14.4 2007/06/07 20:30:47 garbled Exp $ */
2
3 /*
4 * Copyright (c) 1996 Christopher G. Demetriou. All rights reserved.
5 * Copyright (c) 1994 Charles M. Hannum. All rights reserved.
6 *
7 * Redistribution and use in source and binary forms, with or without
8 * modification, are permitted provided that the following conditions
9 * are met:
10 * 1. Redistributions of source code must retain the above copyright
11 * notice, this list of conditions and the following disclaimer.
12 * 2. Redistributions in binary form must reproduce the above copyright
13 * notice, this list of conditions and the following disclaimer in the
14 * documentation and/or other materials provided with the distribution.
15 * 3. All advertising materials mentioning features or use of this software
16 * must display the following acknowledgement:
17 * This product includes software developed by Charles M. Hannum.
18 * 4. The name of the author may not be used to endorse or promote products
19 * derived from this software without specific prior written permission.
20 *
21 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
22 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
23 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
24 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
25 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
26 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
27 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
28 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
29 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
30 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
31 */
32
33 /*
34 * Machine-specific functions for PCI autoconfiguration.
35 *
36 * On PCs, there are two methods of generating PCI configuration cycles.
37 * We try to detect the appropriate mechanism for this machine and set
38 * up a few function pointers to access the correct method directly.
39 *
40 * The configuration method can be hard-coded in the config file by
41 * using `options PCI_CONF_MODE=N', where `N' is the configuration mode
42 * as defined section 3.6.4.1, `Generating Configuration Cycles'.
43 */
44
45 #include <sys/cdefs.h>
46 __KERNEL_RCSID(0, "$NetBSD: pci_machdep.c,v 1.34.14.4 2007/06/07 20:30:47 garbled Exp $");
47
48 #include <sys/types.h>
49 #include <sys/param.h>
50 #include <sys/time.h>
51 #include <sys/systm.h>
52 #include <sys/errno.h>
53 #include <sys/device.h>
54
55 #include <uvm/uvm_extern.h>
56
57 #define _POWERPC_BUS_DMA_PRIVATE
58 #include <machine/bus.h>
59
60 #include <machine/autoconf.h>
61 #include <machine/intr.h>
62
63 #include <dev/pci/pcivar.h>
64 #include <dev/pci/pcireg.h>
65 #include <dev/pci/ppbreg.h>
66 #include <dev/pci/pcidevs.h>
67
68 #include <dev/ofw/openfirm.h>
69 #include <dev/ofw/ofw_pci.h>
70
71 #include "opt_macppc.h"
72
73 static void fixpci(int, pci_chipset_tag_t);
74 static int find_node_intr(int, u_int32_t *, u_int32_t *);
75 static void fix_cardbus_bridge(int, pci_chipset_tag_t, pcitag_t);
76
77 #ifdef PB3400_CARDBUS_HACK
78 int cardbus_number = 2;
79 const char *pb3400_compat[] = {"AAPL,3400/2400", NULL};
80 #endif
81
82 pcitag_t genppc_pci_indirect_make_tag(void *, int, int, int);
83 void genppc_pci_indirect_decompose_tag(void *, pcitag_t, int *, int *, int *);
84
85 /*
86 * PCI doesn't have any special needs; just use the generic versions
87 * of these functions.
88 */
89 struct powerpc_bus_dma_tag pci_bus_dma_tag = {
90 ._dmamap_create = _bus_dmamap_create,
91 ._dmamap_destroy = _bus_dmamap_destroy,
92 ._dmamap_load = _bus_dmamap_load,
93 ._dmamap_load_mbuf = _bus_dmamap_load_mbuf,
94 ._dmamap_load_uio = _bus_dmamap_load_uio,
95 ._dmamap_load_raw = _bus_dmamap_load_raw,
96 ._dmamap_unload = _bus_dmamap_unload,
97 ._dmamap_sync = NULL,
98 ._dmamem_alloc = _bus_dmamem_alloc,
99 ._dmamem_free = _bus_dmamem_free,
100 ._dmamem_map = _bus_dmamem_map,
101 ._dmamem_unmap = _bus_dmamem_unmap,
102 ._dmamem_mmap = _bus_dmamem_mmap,
103 };
104
105 void
106 macppc_pci_attach_hook(parent, self, pba)
107 struct device *parent, *self;
108 struct pcibus_attach_args *pba;
109 {
110 pci_chipset_tag_t pc = pba->pba_pc;
111 int bus = pba->pba_bus;
112 int node, nn, sz;
113 int32_t busrange[2];
114
115 for (node = pc->pc_node; node; node = nn) {
116 sz = OF_getprop(node, "bus-range", busrange, 8);
117 if (sz == 8 && busrange[0] == bus) {
118 fixpci(node, pc);
119 return;
120 }
121 if ((nn = OF_child(node)) != 0)
122 continue;
123 while ((nn = OF_peer(node)) == 0) {
124 node = OF_parent(node);
125 if (node == pc->pc_node)
126 return; /* not found */
127 }
128 }
129 }
130
131 void
132 macppc_pci_get_chipset_tag(pci_chipset_tag_t pc)
133 {
134
135 pc->pc_conf_v = (void *)pc;
136
137 pc->pc_attach_hook = macppc_pci_attach_hook;
138 pc->pc_bus_maxdevs = genppc_pci_bus_maxdevs;
139
140 pc->pc_make_tag = genppc_pci_indirect_make_tag;
141 pc->pc_decompose_tag = genppc_pci_indirect_decompose_tag;
142
143 pc->pc_intr_v = (void *)pc;
144
145 pc->pc_intr_map = genppc_pci_intr_map;
146 pc->pc_intr_string = genppc_pci_intr_string;
147 pc->pc_intr_evcnt = genppc_pci_intr_evcnt;
148 pc->pc_intr_establish = genppc_pci_intr_establish;
149 pc->pc_intr_disestablish = genppc_pci_intr_disestablish;
150
151 pc->pc_conf_interrupt = genppc_pci_conf_interrupt;
152 pc->pc_conf_hook = genppc_pci_conf_hook;
153
154 pc->pc_bus = 0;
155 pc->pc_node = 0;
156 pc->pc_memt = 0;
157 pc->pc_iot = 0;
158 }
159
160 #define pcibus(x) \
161 (((x) & OFW_PCI_PHYS_HI_BUSMASK) >> OFW_PCI_PHYS_HI_BUSSHIFT)
162 #define pcidev(x) \
163 (((x) & OFW_PCI_PHYS_HI_DEVICEMASK) >> OFW_PCI_PHYS_HI_DEVICESHIFT)
164 #define pcifunc(x) \
165 (((x) & OFW_PCI_PHYS_HI_FUNCTIONMASK) >> OFW_PCI_PHYS_HI_FUNCTIONSHIFT)
166
167 static void
168 fixpci(int parent, pci_chipset_tag_t pc)
169 {
170 int node;
171 pcitag_t tag;
172 pcireg_t csr, intr, id, cr;
173 int len, i, ilen;
174 int32_t irqs[4];
175 struct {
176 u_int32_t phys_hi, phys_mid, phys_lo;
177 u_int32_t size_hi, size_lo;
178 } addr[8];
179 struct {
180 u_int32_t phys_hi, phys_mid, phys_lo;
181 u_int32_t icells[5];
182 } iaddr;
183
184 /*
185 * first hack - here we make the Ethernet portion of a
186 * UMAX E100 card work
187 */
188 #ifdef UMAX_E100_HACK
189 tag = pci_make_tag(pc, 0, 17, 0);
190 id = pci_conf_read(pc, tag, PCI_ID_REG);
191 if ((PCI_VENDOR(id) == PCI_VENDOR_DEC) &&
192 (PCI_PRODUCT(id) == PCI_PRODUCT_DEC_21140)) {
193 /* this could be one */
194 pcireg_t isp, reg;
195 pcitag_t tag_isp = pci_make_tag(pc, 0, 13, 0);
196 /*
197 * here we go. We shouldn't encounter this anywhere else
198 * than on a UMAX S900 with an E100 board
199 * look at 00:0d:00 for a Qlogic ISP 1020 to
200 * make sure we really have an E100 here
201 */
202 aprint_debug("\nfound E100 candidate tlp");
203 isp = pci_conf_read(pc, tag_isp, PCI_ID_REG);
204 if ((PCI_VENDOR(isp) == PCI_VENDOR_QLOGIC) &&
205 (PCI_PRODUCT(isp) == PCI_PRODUCT_QLOGIC_ISP1020)) {
206
207 aprint_verbose("\nenabling UMAX E100 ethernet");
208
209 pci_conf_write(pc, tag, 0x14, 0x80000000);
210
211 /* now enable MMIO and busmastering */
212 reg = pci_conf_read(pc, tag,
213 PCI_COMMAND_STATUS_REG);
214 reg |= PCI_COMMAND_MEM_ENABLE |
215 PCI_COMMAND_MASTER_ENABLE;
216 pci_conf_write(pc, tag, PCI_COMMAND_STATUS_REG,
217 reg);
218
219 /* and finally the interrupt */
220 reg = pci_conf_read(pc, tag, PCI_INTERRUPT_REG);
221 reg &= ~PCI_INTERRUPT_LINE_MASK;
222 reg |= 23;
223 pci_conf_write(pc, tag, PCI_INTERRUPT_REG, reg);
224 }
225 }
226 #endif
227
228 len = OF_getprop(parent, "#interrupt-cells", &ilen, sizeof(ilen));
229 if (len < 0)
230 ilen = 0;
231 for (node = OF_child(parent); node; node = OF_peer(node)) {
232 len = OF_getprop(node, "assigned-addresses", addr,
233 sizeof(addr));
234 if (len < (int)sizeof(addr[0]))
235 continue;
236
237 tag = pci_make_tag(pc, pcibus(addr[0].phys_hi),
238 pcidev(addr[0].phys_hi),
239 pcifunc(addr[0].phys_hi));
240
241 /*
242 * Make sure the IO and MEM enable bits are set in the CSR.
243 */
244 csr = pci_conf_read(pc, tag, PCI_COMMAND_STATUS_REG);
245 csr &= ~(PCI_COMMAND_IO_ENABLE | PCI_COMMAND_MEM_ENABLE);
246
247 for (i = 0; i < len / sizeof(addr[0]); i++) {
248 switch (addr[i].phys_hi & OFW_PCI_PHYS_HI_SPACEMASK) {
249 case OFW_PCI_PHYS_HI_SPACE_IO:
250 csr |= PCI_COMMAND_IO_ENABLE;
251 break;
252
253 case OFW_PCI_PHYS_HI_SPACE_MEM32:
254 case OFW_PCI_PHYS_HI_SPACE_MEM64:
255 csr |= PCI_COMMAND_MEM_ENABLE;
256 break;
257 }
258 }
259
260 pci_conf_write(pc, tag, PCI_COMMAND_STATUS_REG, csr);
261
262 /*
263 * Make sure the line register is programmed with the
264 * interrupt mapping.
265 */
266 if (ilen == 0) {
267 /*
268 * Early Apple OFW implementation don't handle
269 * interrupts as defined by the OFW PCI bindings.
270 */
271 len = OF_getprop(node, "AAPL,interrupts", irqs, 4);
272 } else {
273 iaddr.phys_hi = addr[0].phys_hi;
274 iaddr.phys_mid = addr[0].phys_mid;
275 iaddr.phys_lo = addr[0].phys_lo;
276 /*
277 * Thankfully, PCI can only have one entry in its
278 * "interrupts" property.
279 */
280 len = OF_getprop(node, "interrupts", &iaddr.icells[0],
281 4*ilen);
282 if (len != 4*ilen)
283 continue;
284 len = find_node_intr(node, &iaddr.phys_hi, irqs);
285 }
286 if (len <= 0) {
287 /*
288 * If we still don't have an interrupt, try one
289 * more time. This case covers devices behind the
290 * PCI-PCI bridge in a UMAX S900 or similar (9500?)
291 * system. These slots all share the bridge's
292 * interrupt.
293 */
294 len = find_node_intr(node, &addr[0].phys_hi, irqs);
295 if (len <= 0)
296 continue;
297 }
298
299 /*
300 * For PowerBook 2400, 3400 and original G3:
301 * check if we have a 2nd ohare PIC - if so frob the built-in
302 * tlp's IRQ to 60
303 * first see if we have something on bus 0 device 13 and if
304 * it's a DEC 21041
305 */
306 id = pci_conf_read(pc, tag, PCI_ID_REG);
307 if ((tag == pci_make_tag(pc, 0, 13, 0)) &&
308 (PCI_VENDOR(id) == PCI_VENDOR_DEC) &&
309 (PCI_PRODUCT(id) == PCI_PRODUCT_DEC_21041)) {
310
311 /* now look for the 2nd ohare */
312 if (OF_finddevice("/bandit/pci106b,7") != -1) {
313
314 irqs[0] = 60;
315 aprint_verbose("\nohare: frobbing tlp IRQ to 60");
316 }
317 }
318
319 intr = pci_conf_read(pc, tag, PCI_INTERRUPT_REG);
320 intr &= ~PCI_INTERRUPT_LINE_MASK;
321 intr |= irqs[0] & PCI_INTERRUPT_LINE_MASK;
322 pci_conf_write(pc, tag, PCI_INTERRUPT_REG, intr);
323
324 /* fix secondary bus numbers on CardBus bridges */
325 cr = pci_conf_read(pc, tag, PCI_CLASS_REG);
326 if ((PCI_CLASS(cr) == PCI_CLASS_BRIDGE) &&
327 (PCI_SUBCLASS(cr) == PCI_SUBCLASS_BRIDGE_CARDBUS)) {
328 uint32_t bi, busid;
329
330 /*
331 * we found a CardBus bridge. Check if the bus number
332 * is sane
333 */
334 bi = pci_conf_read(pc, tag, PPB_REG_BUSINFO);
335 busid = bi & 0xff;
336 if (busid == 0) {
337 fix_cardbus_bridge(node, pc, tag);
338 }
339 }
340 }
341 }
342
343 static void
344 fix_cardbus_bridge(int node, pci_chipset_tag_t pc, pcitag_t tag)
345 {
346 uint32_t bus_number = 0xffffffff;
347 pcireg_t bi;
348 int bus, dev, fn, ih, len;
349 char path[256];
350
351 #if PB3400_CARDBUS_HACK
352 int root_node;
353
354 root_node = OF_finddevice("/");
355 if (of_compatible(root_node, pb3400_compat) != -1) {
356
357 bus_number = cardbus_number;
358 cardbus_number++;
359 } else {
360 #endif
361 ih = OF_open(path);
362 OF_call_method("load-ata", ih, 0, 0);
363 OF_close(ih);
364
365 OF_getprop(node, "AAPL,bus-id", &bus_number,
366 sizeof(bus_number));
367 #if PB3400_CARDBUS_HACK
368 }
369 #endif
370 if (bus_number != 0xffffffff) {
371
372 len = OF_package_to_path(node, path, sizeof(path));
373 path[len] = 0;
374 aprint_verbose("\n%s: fixing bus number to %d", path, bus_number);
375 pci_decompose_tag(pc, tag, &bus, &dev, &fn);
376 bi = pci_conf_read(pc, tag, PPB_REG_BUSINFO);
377 bi &= 0xff000000;
378 /* XXX subordinate is always 32 here */
379 bi |= (bus & 0xff) | (bus_number << 8) | 0x200000;
380 pci_conf_write(pc, tag, PPB_REG_BUSINFO, bi);
381 }
382 }
383
384 /*
385 * Find PCI IRQ of the node from OF tree.
386 */
387 static int
388 find_node_intr(int node, u_int32_t *addr, uint32_t *intr)
389 {
390 int parent, len, mlen, iparent;
391 int match, i;
392 u_int32_t map[160];
393 const u_int32_t *mp;
394 u_int32_t imapmask[8], maskedaddr[8];
395 u_int32_t acells, icells;
396 char name[32];
397
398 /* XXXSL: 1st check for a interrupt-parent property */
399 if (OF_getprop(node, "interrupt-parent", &iparent, sizeof(iparent)) == sizeof(iparent))
400 {
401 /* How many cells to specify an interrupt ?? */
402 if (OF_getprop(iparent, "#interrupt-cells", &icells, 4) != 4)
403 return -1;
404
405 if (OF_getprop(node, "interrupts", &map, sizeof(map)) != (icells * 4))
406 return -1;
407
408 memcpy(intr, map, icells * 4);
409 return (icells * 4);
410 }
411
412 parent = OF_parent(node);
413 len = OF_getprop(parent, "interrupt-map", map, sizeof(map));
414 mlen = OF_getprop(parent, "interrupt-map-mask", imapmask,
415 sizeof(imapmask));
416
417 if (mlen != -1)
418 memcpy(maskedaddr, addr, mlen);
419 again:
420 if (len == -1 || mlen == -1)
421 goto nomap;
422
423 #ifdef DIAGNOSTIC
424 if (mlen == sizeof(imapmask)) {
425 aprint_error("interrupt-map too long\n");
426 return -1;
427 }
428 #endif
429
430 /* mask addr by "interrupt-map-mask" */
431 for (i = 0; i < mlen / 4; i++)
432 maskedaddr[i] &= imapmask[i];
433
434 mp = map;
435 i = 0;
436 while (len > mlen) {
437 match = memcmp(maskedaddr, mp, mlen);
438 mp += mlen / 4;
439 len -= mlen;
440
441 /*
442 * We must read "#address-cells" and "#interrupt-cells" each
443 * time because each interrupt-parent may be different.
444 */
445 iparent = *mp++;
446 len -= 4;
447 i = OF_getprop(iparent, "#address-cells", &acells, 4);
448 if (i <= 0)
449 acells = 0;
450 else if (i != 4)
451 return -1;
452 if (OF_getprop(iparent, "#interrupt-cells", &icells, 4) != 4)
453 return -1;
454
455 /* Found. */
456 if (match == 0) {
457 /*
458 * We matched on address/interrupt, but are we done?
459 */
460 if (acells == 0) { /* XXX */
461 /*
462 * If we are at the interrupt controller,
463 * we are finally done. Save the result and
464 * return.
465 */
466 memcpy(intr, mp, icells * 4);
467 return icells * 4;
468 }
469 /*
470 * We are now at an intermedia interrupt node. We
471 * need to use its interrupt mask and map the
472 * supplied address/interrupt via its map.
473 */
474 mlen = OF_getprop(iparent, "interrupt-map-mask",
475 imapmask, sizeof(imapmask));
476 #ifdef DIAGNOSTIC
477 if (mlen != (acells + icells)*4) {
478 aprint_error("interrupt-map inconsistent (%d, %d)\n",
479 mlen, (acells + icells)*4);
480 return -1;
481 }
482 #endif
483 memcpy(maskedaddr, mp, mlen);
484 len = OF_getprop(iparent, "interrupt-map", map,
485 sizeof(map));
486 goto again;
487 }
488
489 mp += (acells + icells);
490 len -= (acells + icells) * 4;
491 }
492
493 nomap:
494 /*
495 * If the node has no interrupt property and the parent is a
496 * pci-bridge, use parent's interrupt. This occurs on a PCI
497 * slot. (e.g. AHA-3940)
498 */
499 memset(name, 0, sizeof(name));
500 OF_getprop(parent, "name", name, sizeof(name));
501 if (strcmp(name, "pci-bridge") == 0) {
502 len = OF_getprop(parent, "AAPL,interrupts", intr, 4) ;
503 if (len == 4)
504 return len;
505 #if 0
506 /*
507 * XXX I don't know what is the correct local address.
508 * XXX Use the first entry for now.
509 */
510 len = OF_getprop(parent, "interrupt-map", map, sizeof(map));
511 if (len >= 36) {
512 addr = &map[5];
513 return find_node_intr(parent, addr, intr);
514 }
515 #endif
516 }
517
518 /*
519 * If all else fails, attempt to get AAPL, interrupts property.
520 * Grackle, at least, uses this instead of above in some cases.
521 */
522 len = OF_getprop(node, "AAPL,interrupts", intr, 4) ;
523 if (len == 4)
524 return len;
525
526 return -1;
527 }
528