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pci_machdep.c revision 1.6
      1 /*	$NetBSD: pci_machdep.c,v 1.6 1998/10/21 08:58:36 tsubai Exp $	*/
      2 
      3 /*
      4  * Copyright (c) 1996 Christopher G. Demetriou.  All rights reserved.
      5  * Copyright (c) 1994 Charles M. Hannum.  All rights reserved.
      6  *
      7  * Redistribution and use in source and binary forms, with or without
      8  * modification, are permitted provided that the following conditions
      9  * are met:
     10  * 1. Redistributions of source code must retain the above copyright
     11  *    notice, this list of conditions and the following disclaimer.
     12  * 2. Redistributions in binary form must reproduce the above copyright
     13  *    notice, this list of conditions and the following disclaimer in the
     14  *    documentation and/or other materials provided with the distribution.
     15  * 3. All advertising materials mentioning features or use of this software
     16  *    must display the following acknowledgement:
     17  *	This product includes software developed by Charles M. Hannum.
     18  * 4. The name of the author may not be used to endorse or promote products
     19  *    derived from this software without specific prior written permission.
     20  *
     21  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
     22  * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
     23  * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
     24  * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
     25  * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
     26  * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
     27  * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
     28  * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
     29  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
     30  * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
     31  */
     32 
     33 /*
     34  * Machine-specific functions for PCI autoconfiguration.
     35  *
     36  * On PCs, there are two methods of generating PCI configuration cycles.
     37  * We try to detect the appropriate mechanism for this machine and set
     38  * up a few function pointers to access the correct method directly.
     39  *
     40  * The configuration method can be hard-coded in the config file by
     41  * using `options PCI_CONF_MODE=N', where `N' is the configuration mode
     42  * as defined section 3.6.4.1, `Generating Configuration Cycles'.
     43  */
     44 
     45 #include <sys/types.h>
     46 #include <sys/param.h>
     47 #include <sys/time.h>
     48 #include <sys/systm.h>
     49 #include <sys/errno.h>
     50 #include <sys/device.h>
     51 
     52 #include <vm/vm.h>
     53 #include <vm/vm_kern.h>
     54 
     55 #define _MACPPC_BUS_DMA_PRIVATE
     56 #include <machine/bus.h>
     57 
     58 #include <machine/bus.h>
     59 #include <machine/pio.h>
     60 #include <machine/intr.h>
     61 
     62 #include <dev/pci/pcivar.h>
     63 #include <dev/pci/pcireg.h>
     64 
     65 /*
     66  * PCI doesn't have any special needs; just use the generic versions
     67  * of these functions.
     68  */
     69 struct macppc_bus_dma_tag pci_bus_dma_tag = {
     70 	0,			/* _bounce_thresh */
     71 	_bus_dmamap_create,
     72 	_bus_dmamap_destroy,
     73 	_bus_dmamap_load,
     74 	_bus_dmamap_load_mbuf,
     75 	_bus_dmamap_load_uio,
     76 	_bus_dmamap_load_raw,
     77 	_bus_dmamap_unload,
     78 	NULL,			/* _dmamap_sync */
     79 	_bus_dmamem_alloc,
     80 	_bus_dmamem_free,
     81 	_bus_dmamem_map,
     82 	_bus_dmamem_unmap,
     83 	_bus_dmamem_mmap,
     84 };
     85 
     86 void
     87 pci_attach_hook(parent, self, pba)
     88 	struct device *parent, *self;
     89 	struct pcibus_attach_args *pba;
     90 {
     91 }
     92 
     93 int
     94 pci_bus_maxdevs(pc, busno)
     95 	pci_chipset_tag_t pc;
     96 	int busno;
     97 {
     98 
     99 	/*
    100 	 * Bus number is irrelevant.  Configuration Mechanism 1 is in
    101 	 * use, can have devices 0-32 (i.e. the `normal' range).
    102 	 */
    103 	return 32;
    104 }
    105 
    106 pcitag_t
    107 pci_make_tag(pc, bus, device, function)
    108 	pci_chipset_tag_t pc;
    109 	int bus, device, function;
    110 {
    111 	pcitag_t tag;
    112 
    113 	if (bus >= 256 || device >= 32 || function >= 8)
    114 		panic("pci_make_tag: bad request");
    115 
    116 	tag = 0x80000000 | (bus << 16) | (device << 11) | (function << 8);
    117 
    118 	return tag;
    119 }
    120 
    121 void
    122 pci_decompose_tag(pc, tag, bp, dp, fp)
    123 	pci_chipset_tag_t pc;
    124 	pcitag_t tag;
    125 	int *bp, *dp, *fp;
    126 {
    127 	if (bp != NULL)
    128 		*bp = (tag >> 16) & 0xff;
    129 	if (dp != NULL)
    130 		*dp = (tag >> 11) & 0x1f;
    131 	if (fp != NULL)
    132 		*fp = (tag >> 8) & 0x7;
    133 
    134 	return;
    135 }
    136 
    137 pcireg_t
    138 pci_conf_read(pc, tag, reg)
    139 	pci_chipset_tag_t pc;
    140 	pcitag_t tag;
    141 	int reg;
    142 {
    143 	pcireg_t data;
    144 	struct pci_bridge *r;
    145 
    146 	if (pc == PCI_CHIPSET_MPC106) {
    147 		r = &pci_bridges[0];
    148 
    149 		out32rb(r->addr, tag | reg);
    150 		data = in32rb(r->data);
    151 		out32rb(r->addr, 0);
    152 	} else {
    153 		int bus, dev, func;
    154 
    155 		pci_decompose_tag(pc, tag, &bus, &dev, &func);
    156 
    157 		/*
    158 		 * bandit's minimum device number is 11.  So we behave
    159 		 * as if there is no device when dev < 11.
    160 		 */
    161 		if (dev < 11) {
    162 			if (reg == PCI_ID_REG)
    163 				return 0xffffffff;
    164 			panic("pci_conf_read: dev < 11");
    165 		}
    166 		if (func > 7)
    167 			panic("pci_conf_read: func > 7");
    168 
    169 		r = &pci_bridges[pc];
    170 
    171 		out32rb(r->addr, (1 << dev) | (func << 8) | reg);
    172 		DELAY(10);
    173 		data = in32rb(r->data);
    174 		DELAY(10);
    175 		out32rb(r->addr, 0);
    176 		DELAY(10);
    177 	}
    178 
    179 	return data;
    180 }
    181 
    182 void
    183 pci_conf_write(pc, tag, reg, data)
    184 	pci_chipset_tag_t pc;
    185 	pcitag_t tag;
    186 	int reg;
    187 	pcireg_t data;
    188 {
    189 	struct pci_bridge *r = &pci_bridges[pc];
    190 
    191 	if (pc == PCI_CHIPSET_MPC106) {
    192 		r = &pci_bridges[0];
    193 
    194 		out32rb(r->addr, tag | reg);
    195 		out32rb(r->data, data);
    196 		out32rb(r->addr, 0);
    197 	} else {
    198 		int bus, dev, func;
    199 
    200 		pci_decompose_tag(pc, tag, &bus, &dev, &func);
    201 
    202 		if (dev < 11 || func > 7)
    203 			panic("pci_conf_write");
    204 
    205 		r = &pci_bridges[pc];
    206 
    207 		out32rb(r->addr, (1 << dev) | (func << 8) | reg);
    208 		DELAY(10);
    209 		out32rb(r->data, data);
    210 		DELAY(10);
    211 		out32rb(r->addr, 0);
    212 		DELAY(10);
    213 	}
    214 }
    215 
    216 int
    217 pci_intr_map(pc, intrtag, pin, line, ihp)
    218 	pci_chipset_tag_t pc;
    219 	pcitag_t intrtag;
    220 	int pin, line;
    221 	pci_intr_handle_t *ihp;
    222 {
    223 
    224 	if (pin == 0) {
    225 		/* No IRQ used. */
    226 		goto bad;
    227 	}
    228 
    229 	if (pin > 4) {
    230 		printf("pci_intr_map: bad interrupt pin %d\n", pin);
    231 		goto bad;
    232 	}
    233 
    234 	/*
    235 	 * Section 6.2.4, `Miscellaneous Functions', says that 255 means
    236 	 * `unknown' or `no connection' on a PC.  We assume that a device with
    237 	 * `no connection' either doesn't have an interrupt (in which case the
    238 	 * pin number should be 0, and would have been noticed above), or
    239 	 * wasn't configured by the BIOS (in which case we punt, since there's
    240 	 * no real way we can know how the interrupt lines are mapped in the
    241 	 * hardware).
    242 	 *
    243 	 * XXX
    244 	 * Since IRQ 0 is only used by the clock, and we can't actually be sure
    245 	 * that the BIOS did its job, we also recognize that as meaning that
    246 	 * the BIOS has not configured the device.
    247 	 */
    248 	if (line == 0 || line == 255) {
    249 		printf("pci_intr_map: no mapping for pin %c\n", '@' + pin);
    250 		goto bad;
    251 	} else {
    252 		if (line >= ICU_LEN) {
    253 			printf("pci_intr_map: bad interrupt line %d\n", line);
    254 			goto bad;
    255 		}
    256 	}
    257 
    258 	*ihp = line;
    259 	return 0;
    260 
    261 bad:
    262 	*ihp = -1;
    263 	return 1;
    264 }
    265 
    266 const char *
    267 pci_intr_string(pc, ih)
    268 	pci_chipset_tag_t pc;
    269 	pci_intr_handle_t ih;
    270 {
    271 	static char irqstr[8];		/* 4 + 2 + NULL + sanity */
    272 
    273 	if (ih == 0 || ih >= ICU_LEN)
    274 		panic("pci_intr_string: bogus handle 0x%x\n", ih);
    275 
    276 	sprintf(irqstr, "irq %d", ih);
    277 	return (irqstr);
    278 
    279 }
    280 
    281 extern void * intr_establish();
    282 extern void intr_disestablish();
    283 
    284 void *
    285 pci_intr_establish(pc, ih, level, func, arg)
    286 	pci_chipset_tag_t pc;
    287 	pci_intr_handle_t ih;
    288 	int level, (*func) __P((void *));
    289 	void *arg;
    290 {
    291 
    292 	if (ih == 0 || ih >= ICU_LEN)
    293 		panic("pci_intr_establish: bogus handle 0x%x\n", ih);
    294 
    295 	return intr_establish(ih, IST_LEVEL, level, func, arg);
    296 }
    297 
    298 void
    299 pci_intr_disestablish(pc, cookie)
    300 	pci_chipset_tag_t pc;
    301 	void *cookie;
    302 {
    303 
    304 	intr_disestablish(cookie);
    305 }
    306