pci_machdep.c revision 1.8 1 /* $NetBSD: pci_machdep.c,v 1.8 1999/03/15 03:03:10 tsubai Exp $ */
2
3 /*
4 * Copyright (c) 1996 Christopher G. Demetriou. All rights reserved.
5 * Copyright (c) 1994 Charles M. Hannum. All rights reserved.
6 *
7 * Redistribution and use in source and binary forms, with or without
8 * modification, are permitted provided that the following conditions
9 * are met:
10 * 1. Redistributions of source code must retain the above copyright
11 * notice, this list of conditions and the following disclaimer.
12 * 2. Redistributions in binary form must reproduce the above copyright
13 * notice, this list of conditions and the following disclaimer in the
14 * documentation and/or other materials provided with the distribution.
15 * 3. All advertising materials mentioning features or use of this software
16 * must display the following acknowledgement:
17 * This product includes software developed by Charles M. Hannum.
18 * 4. The name of the author may not be used to endorse or promote products
19 * derived from this software without specific prior written permission.
20 *
21 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
22 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
23 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
24 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
25 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
26 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
27 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
28 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
29 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
30 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
31 */
32
33 /*
34 * Machine-specific functions for PCI autoconfiguration.
35 *
36 * On PCs, there are two methods of generating PCI configuration cycles.
37 * We try to detect the appropriate mechanism for this machine and set
38 * up a few function pointers to access the correct method directly.
39 *
40 * The configuration method can be hard-coded in the config file by
41 * using `options PCI_CONF_MODE=N', where `N' is the configuration mode
42 * as defined section 3.6.4.1, `Generating Configuration Cycles'.
43 */
44
45 #include <sys/types.h>
46 #include <sys/param.h>
47 #include <sys/time.h>
48 #include <sys/systm.h>
49 #include <sys/errno.h>
50 #include <sys/device.h>
51
52 #include <vm/vm.h>
53 #include <vm/vm_kern.h>
54
55 #define _MACPPC_BUS_DMA_PRIVATE
56 #include <machine/bus.h>
57
58 #include <machine/bus.h>
59 #include <machine/pio.h>
60 #include <machine/intr.h>
61
62 #include <dev/pci/pcivar.h>
63 #include <dev/pci/pcireg.h>
64
65 /*
66 * PCI doesn't have any special needs; just use the generic versions
67 * of these functions.
68 */
69 struct macppc_bus_dma_tag pci_bus_dma_tag = {
70 0, /* _bounce_thresh */
71 _bus_dmamap_create,
72 _bus_dmamap_destroy,
73 _bus_dmamap_load,
74 _bus_dmamap_load_mbuf,
75 _bus_dmamap_load_uio,
76 _bus_dmamap_load_raw,
77 _bus_dmamap_unload,
78 NULL, /* _dmamap_sync */
79 _bus_dmamem_alloc,
80 _bus_dmamem_free,
81 _bus_dmamem_map,
82 _bus_dmamem_unmap,
83 _bus_dmamem_mmap,
84 };
85
86 void
87 pci_attach_hook(parent, self, pba)
88 struct device *parent, *self;
89 struct pcibus_attach_args *pba;
90 {
91 }
92
93 int
94 pci_bus_maxdevs(pc, busno)
95 pci_chipset_tag_t pc;
96 int busno;
97 {
98
99 /*
100 * Bus number is irrelevant. Configuration Mechanism 1 is in
101 * use, can have devices 0-32 (i.e. the `normal' range).
102 */
103 return 32;
104 }
105
106 pcitag_t
107 pci_make_tag(pc, bus, device, function)
108 pci_chipset_tag_t pc;
109 int bus, device, function;
110 {
111 pcitag_t tag;
112
113 if (bus >= 256 || device >= 32 || function >= 8)
114 panic("pci_make_tag: bad request");
115
116 tag = 0x80000000 | (bus << 16) | (device << 11) | (function << 8);
117
118 return tag;
119 }
120
121 void
122 pci_decompose_tag(pc, tag, bp, dp, fp)
123 pci_chipset_tag_t pc;
124 pcitag_t tag;
125 int *bp, *dp, *fp;
126 {
127 if (bp != NULL)
128 *bp = (tag >> 16) & 0xff;
129 if (dp != NULL)
130 *dp = (tag >> 11) & 0x1f;
131 if (fp != NULL)
132 *fp = (tag >> 8) & 0x7;
133
134 return;
135 }
136
137 pcireg_t
138 pci_conf_read(pc, tag, reg)
139 pci_chipset_tag_t pc;
140 pcitag_t tag;
141 int reg;
142 {
143 pcireg_t data;
144 struct pci_bridge *r;
145
146 if (pc == PCI_CHIPSET_MPC106) {
147 r = &pci_bridges[0];
148
149 out32rb(r->addr, tag | reg);
150 data = 0xffffffff;
151 if (!badaddr(r->data, 4))
152 data = in32rb(r->data);
153 out32rb(r->addr, 0);
154 } else {
155 int bus, dev, func;
156
157 pci_decompose_tag(pc, tag, &bus, &dev, &func);
158
159 r = &pci_bridges[pc];
160
161 /*
162 * bandit's minimum device number of the first bus is 11.
163 * So we behave as if there is no device when dev < 11.
164 */
165 if (func > 7)
166 panic("pci_conf_read: func > 7");
167
168 if (bus == r->bus) {
169 if (dev < 11) {
170 if (reg == PCI_ID_REG)
171 return 0xffffffff;
172 else
173 panic("pci_conf_read: dev < 11");
174 }
175 out32rb(r->addr, (1 << dev) | (func << 8) | reg);
176 } else
177 out32rb(r->addr, tag | reg | 1);
178 DELAY(10);
179 data = 0xffffffff;
180 if (!badaddr(r->data, 4))
181 data = in32rb(r->data);
182 DELAY(10);
183 out32rb(r->addr, 0);
184 DELAY(10);
185 }
186
187 return data;
188 }
189
190 void
191 pci_conf_write(pc, tag, reg, data)
192 pci_chipset_tag_t pc;
193 pcitag_t tag;
194 int reg;
195 pcireg_t data;
196 {
197 struct pci_bridge *r = &pci_bridges[pc];
198
199 if (pc == PCI_CHIPSET_MPC106) {
200 r = &pci_bridges[0];
201
202 out32rb(r->addr, tag | reg);
203 out32rb(r->data, data);
204 out32rb(r->addr, 0);
205 } else {
206 int bus, dev, func;
207
208 pci_decompose_tag(pc, tag, &bus, &dev, &func);
209 r = &pci_bridges[pc];
210
211 if (func > 7)
212 panic("pci_conf_write: func > 7");
213
214 if (bus == r->bus) {
215 if (dev < 11)
216 panic("pci_conf_write: dev < 11");
217 out32rb(r->addr, (1 << dev) | (func << 8) | reg);
218 } else
219 out32rb(r->addr, tag | reg | 1);
220 DELAY(10);
221 out32rb(r->data, data);
222 DELAY(10);
223 out32rb(r->addr, 0);
224 DELAY(10);
225 }
226 }
227
228 int
229 pci_intr_map(pc, intrtag, pin, line, ihp)
230 pci_chipset_tag_t pc;
231 pcitag_t intrtag;
232 int pin, line;
233 pci_intr_handle_t *ihp;
234 {
235
236 if (pin == 0) {
237 /* No IRQ used. */
238 goto bad;
239 }
240
241 if (pin > 4) {
242 printf("pci_intr_map: bad interrupt pin %d\n", pin);
243 goto bad;
244 }
245
246 /*
247 * Section 6.2.4, `Miscellaneous Functions', says that 255 means
248 * `unknown' or `no connection' on a PC. We assume that a device with
249 * `no connection' either doesn't have an interrupt (in which case the
250 * pin number should be 0, and would have been noticed above), or
251 * wasn't configured by the BIOS (in which case we punt, since there's
252 * no real way we can know how the interrupt lines are mapped in the
253 * hardware).
254 *
255 * XXX
256 * Since IRQ 0 is only used by the clock, and we can't actually be sure
257 * that the BIOS did its job, we also recognize that as meaning that
258 * the BIOS has not configured the device.
259 */
260 if (line == 0 || line == 255) {
261 printf("pci_intr_map: no mapping for pin %c\n", '@' + pin);
262 goto bad;
263 } else {
264 if (line >= ICU_LEN) {
265 printf("pci_intr_map: bad interrupt line %d\n", line);
266 goto bad;
267 }
268 }
269
270 *ihp = line;
271 return 0;
272
273 bad:
274 *ihp = -1;
275 return 1;
276 }
277
278 const char *
279 pci_intr_string(pc, ih)
280 pci_chipset_tag_t pc;
281 pci_intr_handle_t ih;
282 {
283 static char irqstr[8]; /* 4 + 2 + NULL + sanity */
284
285 if (ih == 0 || ih >= ICU_LEN)
286 panic("pci_intr_string: bogus handle 0x%x\n", ih);
287
288 sprintf(irqstr, "irq %d", ih);
289 return (irqstr);
290
291 }
292
293 extern void * intr_establish();
294 extern void intr_disestablish();
295
296 void *
297 pci_intr_establish(pc, ih, level, func, arg)
298 pci_chipset_tag_t pc;
299 pci_intr_handle_t ih;
300 int level, (*func) __P((void *));
301 void *arg;
302 {
303
304 if (ih == 0 || ih >= ICU_LEN)
305 panic("pci_intr_establish: bogus handle 0x%x\n", ih);
306
307 return intr_establish(ih, IST_LEVEL, level, func, arg);
308 }
309
310 void
311 pci_intr_disestablish(pc, cookie)
312 pci_chipset_tag_t pc;
313 void *cookie;
314 {
315
316 intr_disestablish(cookie);
317 }
318