pci_machdep.c revision 1.8.2.1.2.1 1 /* $NetBSD: pci_machdep.c,v 1.8.2.1.2.1 1999/06/21 00:51:41 thorpej Exp $ */
2
3 /*
4 * Copyright (c) 1996 Christopher G. Demetriou. All rights reserved.
5 * Copyright (c) 1994 Charles M. Hannum. All rights reserved.
6 *
7 * Redistribution and use in source and binary forms, with or without
8 * modification, are permitted provided that the following conditions
9 * are met:
10 * 1. Redistributions of source code must retain the above copyright
11 * notice, this list of conditions and the following disclaimer.
12 * 2. Redistributions in binary form must reproduce the above copyright
13 * notice, this list of conditions and the following disclaimer in the
14 * documentation and/or other materials provided with the distribution.
15 * 3. All advertising materials mentioning features or use of this software
16 * must display the following acknowledgement:
17 * This product includes software developed by Charles M. Hannum.
18 * 4. The name of the author may not be used to endorse or promote products
19 * derived from this software without specific prior written permission.
20 *
21 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
22 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
23 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
24 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
25 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
26 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
27 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
28 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
29 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
30 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
31 */
32
33 /*
34 * Machine-specific functions for PCI autoconfiguration.
35 *
36 * On PCs, there are two methods of generating PCI configuration cycles.
37 * We try to detect the appropriate mechanism for this machine and set
38 * up a few function pointers to access the correct method directly.
39 *
40 * The configuration method can be hard-coded in the config file by
41 * using `options PCI_CONF_MODE=N', where `N' is the configuration mode
42 * as defined section 3.6.4.1, `Generating Configuration Cycles'.
43 */
44
45 #include <sys/types.h>
46 #include <sys/param.h>
47 #include <sys/time.h>
48 #include <sys/systm.h>
49 #include <sys/errno.h>
50 #include <sys/device.h>
51
52 #include <vm/vm.h>
53 #include <vm/vm_kern.h>
54
55 #define _MACPPC_BUS_DMA_PRIVATE
56 #include <machine/bus.h>
57
58 #include <machine/bus.h>
59 #include <machine/pio.h>
60 #include <machine/intr.h>
61
62 #include <dev/pci/pcivar.h>
63 #include <dev/pci/pcireg.h>
64
65 /*
66 * PCI doesn't have any special needs; just use the generic versions
67 * of these functions.
68 */
69 struct macppc_bus_dma_tag pci_bus_dma_tag = {
70 0, /* _bounce_thresh */
71 _bus_dmamap_create,
72 _bus_dmamap_destroy,
73 _bus_dmamap_load,
74 _bus_dmamap_load_mbuf,
75 _bus_dmamap_load_uio,
76 _bus_dmamap_load_raw,
77 _bus_dmamap_unload,
78 NULL, /* _dmamap_sync */
79 _bus_dmamem_alloc,
80 _bus_dmamem_free,
81 _bus_dmamem_map,
82 _bus_dmamem_unmap,
83 _bus_dmamem_mmap,
84 };
85
86 void
87 pci_attach_hook(parent, self, pba)
88 struct device *parent, *self;
89 struct pcibus_attach_args *pba;
90 {
91
92 /* Nothing to do. */
93 }
94
95 int
96 pci_bus_maxdevs(pc, busno)
97 pci_chipset_tag_t pc;
98 int busno;
99 {
100
101 /*
102 * Bus number is irrelevant. Configuration Mechanism 1 is in
103 * use, can have devices 0-32 (i.e. the `normal' range).
104 */
105 return 32;
106 }
107
108 pcitag_t
109 pci_make_tag(pc, bus, device, function)
110 pci_chipset_tag_t pc;
111 int bus, device, function;
112 {
113 pcitag_t tag;
114
115 if (bus >= 256 || device >= 32 || function >= 8)
116 panic("pci_make_tag: bad request");
117
118 /* XXX magic number */
119 tag = 0x80000000 | (bus << 16) | (device << 11) | (function << 8);
120
121 return tag;
122 }
123
124 void
125 pci_decompose_tag(pc, tag, bp, dp, fp)
126 pci_chipset_tag_t pc;
127 pcitag_t tag;
128 int *bp, *dp, *fp;
129 {
130
131 if (bp != NULL)
132 *bp = (tag >> 16) & 0xff;
133 if (dp != NULL)
134 *dp = (tag >> 11) & 0x1f;
135 if (fp != NULL)
136 *fp = (tag >> 8) & 0x07;
137 }
138
139 pcireg_t
140 pci_conf_read(pc, tag, reg)
141 pci_chipset_tag_t pc;
142 pcitag_t tag;
143 int reg;
144 {
145 pcireg_t data;
146 struct pci_bridge *r;
147 int bus, dev, func, s;
148
149 s = splhigh();
150
151 if (pc == PCI_CHIPSET_MPC106) {
152 r = &pci_bridges[0];
153
154 out32rb(r->addr, tag | reg);
155 data = 0xffffffff;
156 if (!badaddr(r->data, 4))
157 data = in32rb(r->data);
158 out32rb(r->addr, 0);
159 } else {
160 pci_decompose_tag(pc, tag, &bus, &dev, &func);
161
162 r = &pci_bridges[pc];
163
164 /*
165 * bandit's minimum device number of the first bus is 11.
166 * So we behave as if there is no device when dev < 11.
167 */
168 if (func > 7)
169 panic("pci_conf_read: func > 7");
170
171 if (bus == r->bus) {
172 if (dev < 11) {
173 if (reg == PCI_ID_REG)
174 return 0xffffffff;
175 else
176 panic("pci_conf_read: dev < 11");
177 }
178 out32rb(r->addr, (1 << dev) | (func << 8) | reg);
179 } else
180 out32rb(r->addr, tag | reg | 1);
181 DELAY(10);
182 data = 0xffffffff;
183 if (!badaddr(r->data, 4))
184 data = in32rb(r->data);
185 DELAY(10);
186 out32rb(r->addr, 0);
187 DELAY(10);
188 }
189
190 splx(s);
191
192 return data;
193 }
194
195 void
196 pci_conf_write(pc, tag, reg, data)
197 pci_chipset_tag_t pc;
198 pcitag_t tag;
199 int reg;
200 pcireg_t data;
201 {
202 struct pci_bridge *r;
203 int bus, dev, func, s;
204
205 s = splhigh();
206
207 if (pc == PCI_CHIPSET_MPC106) {
208 r = &pci_bridges[0];
209
210 out32rb(r->addr, tag | reg);
211 out32rb(r->data, data);
212 out32rb(r->addr, 0);
213 } else {
214 r = &pci_bridges[pc];
215
216 pci_decompose_tag(pc, tag, &bus, &dev, &func);
217
218 if (func > 7)
219 panic("pci_conf_write: func > 7");
220
221 if (bus == r->bus) {
222 if (dev < 11)
223 panic("pci_conf_write: dev < 11");
224 out32rb(r->addr, (1 << dev) | (func << 8) | reg);
225 } else
226 out32rb(r->addr, tag | reg | 1);
227 DELAY(10);
228 out32rb(r->data, data);
229 DELAY(10);
230 out32rb(r->addr, 0);
231 DELAY(10);
232 }
233
234 splx(s);
235 }
236
237 int
238 pci_intr_map(pc, intrtag, pin, line, ihp)
239 pci_chipset_tag_t pc;
240 pcitag_t intrtag;
241 int pin, line;
242 pci_intr_handle_t *ihp;
243 {
244
245 if (pin == 0) {
246 /* No IRQ used. */
247 goto bad;
248 }
249
250 if (pin > 4) {
251 printf("pci_intr_map: bad interrupt pin %d\n", pin);
252 goto bad;
253 }
254
255 /*
256 * Section 6.2.4, `Miscellaneous Functions', says that 255 means
257 * `unknown' or `no connection' on a PC. We assume that a device with
258 * `no connection' either doesn't have an interrupt (in which case the
259 * pin number should be 0, and would have been noticed above), or
260 * wasn't configured by the BIOS (in which case we punt, since there's
261 * no real way we can know how the interrupt lines are mapped in the
262 * hardware).
263 *
264 * XXX
265 * Since IRQ 0 is only used by the clock, and we can't actually be sure
266 * that the BIOS did its job, we also recognize that as meaning that
267 * the BIOS has not configured the device.
268 */
269 if (line == 0 || line == 255) {
270 printf("pci_intr_map: no mapping for pin %c\n", '@' + pin);
271 goto bad;
272 } else {
273 if (line >= ICU_LEN) {
274 printf("pci_intr_map: bad interrupt line %d\n", line);
275 goto bad;
276 }
277 }
278
279 *ihp = line;
280 return 0;
281
282 bad:
283 *ihp = -1;
284 return 1;
285 }
286
287 const char *
288 pci_intr_string(pc, ih)
289 pci_chipset_tag_t pc;
290 pci_intr_handle_t ih;
291 {
292 static char irqstr[8]; /* 4 + 2 + NULL + sanity */
293
294 if (ih == 0 || ih >= ICU_LEN)
295 panic("pci_intr_string: bogus handle 0x%x\n", ih);
296
297 sprintf(irqstr, "irq %d", ih);
298 return (irqstr);
299
300 }
301
302 extern void * intr_establish();
303 extern void intr_disestablish();
304
305 void *
306 pci_intr_establish(pc, ih, level, func, arg)
307 pci_chipset_tag_t pc;
308 pci_intr_handle_t ih;
309 int level, (*func) __P((void *));
310 void *arg;
311 {
312
313 if (ih == 0 || ih >= ICU_LEN)
314 panic("pci_intr_establish: bogus handle 0x%x\n", ih);
315
316 return intr_establish(ih, IST_LEVEL, level, func, arg);
317 }
318
319 void
320 pci_intr_disestablish(pc, cookie)
321 pci_chipset_tag_t pc;
322 void *cookie;
323 {
324
325 intr_disestablish(cookie);
326 }
327