sbtimer.c revision 1.9
11.9Slukem/* $NetBSD: sbtimer.c,v 1.9 2003/07/15 02:43:41 lukem Exp $ */ 21.1Ssimonb 31.1Ssimonb/* 41.1Ssimonb * Copyright 2000, 2001 51.1Ssimonb * Broadcom Corporation. All rights reserved. 61.1Ssimonb * 71.1Ssimonb * This software is furnished under license and may be used and copied only 81.1Ssimonb * in accordance with the following terms and conditions. Subject to these 91.1Ssimonb * conditions, you may download, copy, install, use, modify and distribute 101.1Ssimonb * modified or unmodified copies of this software in source and/or binary 111.1Ssimonb * form. No title or ownership is transferred hereby. 121.1Ssimonb * 131.1Ssimonb * 1) Any source code used, modified or distributed must reproduce and 141.1Ssimonb * retain this copyright notice and list of conditions as they appear in 151.1Ssimonb * the source file. 161.1Ssimonb * 171.1Ssimonb * 2) No right is granted to use any trade name, trademark, or logo of 181.8Scgd * Broadcom Corporation. The "Broadcom Corporation" name may not be 191.8Scgd * used to endorse or promote products derived from this software 201.8Scgd * without the prior written permission of Broadcom Corporation. 211.1Ssimonb * 221.1Ssimonb * 3) THIS SOFTWARE IS PROVIDED "AS-IS" AND ANY EXPRESS OR IMPLIED 231.1Ssimonb * WARRANTIES, INCLUDING BUT NOT LIMITED TO, ANY IMPLIED WARRANTIES OF 241.1Ssimonb * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR 251.1Ssimonb * NON-INFRINGEMENT ARE DISCLAIMED. IN NO EVENT SHALL BROADCOM BE LIABLE 261.1Ssimonb * FOR ANY DAMAGES WHATSOEVER, AND IN PARTICULAR, BROADCOM SHALL NOT BE 271.1Ssimonb * LIABLE FOR DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 281.1Ssimonb * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 291.1Ssimonb * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR 301.1Ssimonb * BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, 311.1Ssimonb * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE 321.1Ssimonb * OR OTHERWISE), EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 331.1Ssimonb */ 341.9Slukem 351.9Slukem#include <sys/cdefs.h> 361.9Slukem__KERNEL_RCSID(0, "$NetBSD: sbtimer.c,v 1.9 2003/07/15 02:43:41 lukem Exp $"); 371.1Ssimonb 381.1Ssimonb#include <sys/param.h> 391.1Ssimonb#include <sys/device.h> 401.1Ssimonb#include <sys/systm.h> 411.1Ssimonb#include <sys/kernel.h> 421.1Ssimonb 431.1Ssimonb#include <mips/locore.h> 441.1Ssimonb 451.1Ssimonb#include <mips/sibyte/include/sb1250_regs.h> 461.1Ssimonb#include <mips/sibyte/include/sb1250_scd.h> 471.1Ssimonb#include <mips/sibyte/dev/sbscdvar.h> 481.1Ssimonb 491.1Ssimonbstruct sbtimer_softc { 501.1Ssimonb struct device sc_dev; 511.1Ssimonb void *sc_intrhand; 521.1Ssimonb int sc_flags; 531.1Ssimonb void *sc_addr_icnt, *sc_addr_cnt, *sc_addr_cfg; 541.1Ssimonb}; 551.1Ssimonb#define SBTIMER_CLOCK 1 561.1Ssimonb#define SBTIMER_STATCLOCK 2 571.1Ssimonb 581.1Ssimonb#define READ_REG(rp) (mips3_ld((uint64_t *)(rp))) 591.1Ssimonb#define WRITE_REG(rp, val) (mips3_sd((uint64_t *)(rp), (val))) 601.1Ssimonb 611.1Ssimonbstatic int sbtimer_match(struct device *, struct cfdata *, void *); 621.1Ssimonbstatic void sbtimer_attach(struct device *, struct device *, void *); 631.1Ssimonb 641.6SthorpejCFATTACH_DECL(sbtimer, sizeof(struct sbtimer_softc), 651.7Sthorpej sbtimer_match, sbtimer_attach, NULL, NULL); 661.1Ssimonb 671.1Ssimonbstatic void sbtimer_clockintr(void *arg, uint32_t status, uint32_t pc); 681.1Ssimonbstatic void sbtimer_statclockintr(void *arg, uint32_t status, 691.1Ssimonb uint32_t pc); 701.1Ssimonbstatic void sbtimer_miscintr(void *arg, uint32_t status, uint32_t pc); 711.1Ssimonb 721.1Ssimonbstatic void sbtimer_clock_init(void *arg); 731.1Ssimonb 741.1Ssimonbstatic int 751.1Ssimonbsbtimer_match(struct device *parent, struct cfdata *match, void *aux) 761.1Ssimonb{ 771.1Ssimonb struct sbscd_attach_args *sap = aux; 781.1Ssimonb 791.1Ssimonb if (sap->sa_locs.sa_type != SBSCD_DEVTYPE_TIMER) 801.1Ssimonb return (0); 811.1Ssimonb 821.1Ssimonb return 1; 831.1Ssimonb} 841.1Ssimonb 851.1Ssimonbstatic void 861.1Ssimonbsbtimer_attach(struct device *parent, struct device *self, void *aux) 871.1Ssimonb{ 881.1Ssimonb struct sbscd_attach_args *sa = aux; 891.1Ssimonb struct sbtimer_softc *sc = (struct sbtimer_softc *)self; 901.1Ssimonb void (*fun)(void *, uint32_t, uint32_t); 911.1Ssimonb int ipl; 921.1Ssimonb const char *comment = ""; 931.1Ssimonb 941.1Ssimonb sc->sc_flags = sc->sc_dev.dv_cfdata->cf_flags; 951.1Ssimonb sc->sc_addr_icnt = (uint64_t *)MIPS_PHYS_TO_KSEG1(sa->sa_base + 961.1Ssimonb sa->sa_locs.sa_offset + R_SCD_TIMER_INIT); 971.1Ssimonb sc->sc_addr_cnt = (uint64_t *)MIPS_PHYS_TO_KSEG1(sa->sa_base + 981.1Ssimonb sa->sa_locs.sa_offset + R_SCD_TIMER_CNT); 991.1Ssimonb sc->sc_addr_cfg = (uint64_t *)MIPS_PHYS_TO_KSEG1(sa->sa_base + 1001.1Ssimonb sa->sa_locs.sa_offset + R_SCD_TIMER_CFG); 1011.1Ssimonb 1021.1Ssimonb printf(": "); 1031.1Ssimonb if ((sc->sc_flags & SBTIMER_CLOCK) != 0) { 1041.1Ssimonb ipl = IPL_CLOCK; 1051.1Ssimonb fun = sbtimer_clockintr; 1061.1Ssimonb 1071.1Ssimonb if (system_set_clockfns(sc, sbtimer_clock_init)) { 1081.1Ssimonb /* not really the clock */ 1091.1Ssimonb sc->sc_flags &= ~SBTIMER_CLOCK; 1101.1Ssimonb comment = " (not system timer)"; 1111.1Ssimonb goto not_really; 1121.1Ssimonb } 1131.1Ssimonb printf("system timer"); 1141.1Ssimonb } else if ((sc->sc_flags & SBTIMER_STATCLOCK) != 0) { 1151.1Ssimonb ipl = IPL_STATCLOCK; 1161.1Ssimonb fun = sbtimer_statclockintr; 1171.1Ssimonb 1181.1Ssimonb /* XXX make sure it's the statclock */ 1191.1Ssimonb if (1) { 1201.1Ssimonb /* not really the statclock */ 1211.1Ssimonb sc->sc_flags &= ~SBTIMER_STATCLOCK; 1221.1Ssimonb comment = " (not system statistics timer)"; 1231.1Ssimonb goto not_really; 1241.1Ssimonb } 1251.1Ssimonb printf("system statistics timer"); 1261.1Ssimonb } else { 1271.1Ssimonbnot_really: 1281.1Ssimonb ipl = IPL_BIO; /* XXX -- pretty low */ 1291.1Ssimonb fun = sbtimer_miscintr; 1301.1Ssimonb printf("general-purpose timer%s", comment); 1311.1Ssimonb } 1321.1Ssimonb printf("\n"); 1331.1Ssimonb 1341.1Ssimonb /* clear intr & disable timer. */ 1351.1Ssimonb WRITE_REG(sc->sc_addr_cfg, 0x00); /* XXX */ 1361.1Ssimonb 1371.1Ssimonb sc->sc_intrhand = cpu_intr_establish(sa->sa_locs.sa_intr[0], ipl, 1381.1Ssimonb fun, sc); 1391.1Ssimonb} 1401.1Ssimonb 1411.1Ssimonbstatic void 1421.1Ssimonbsbtimer_clock_init(void *arg) 1431.1Ssimonb{ 1441.1Ssimonb struct sbtimer_softc *sc = arg; 1451.1Ssimonb 1461.1Ssimonb printf("%s: ", sc->sc_dev.dv_xname); 1471.1Ssimonb if ((1000000 % hz) == 0) 1481.1Ssimonb printf("%dHz system timer\n", hz); 1491.1Ssimonb else { 1501.1Ssimonb printf("cannot get %dHz clock; using 1000Hz\n", hz); 1511.1Ssimonb hz = 1000; 1521.1Ssimonb tick = 1000000 / hz; 1531.1Ssimonb } 1541.1Ssimonb 1551.1Ssimonb WRITE_REG(sc->sc_addr_cfg, 0x00); /* XXX */ 1561.1Ssimonb if (G_SYS_PLL_DIV(READ_REG(MIPS_PHYS_TO_KSEG1(A_SCD_SYSTEM_CFG))) == 0) { 1571.2Ssimonb printf("%s: PLL_DIV == 0; speeding up clock ticks for simulator\n", 1581.2Ssimonb sc->sc_dev.dv_xname); 1591.1Ssimonb WRITE_REG(sc->sc_addr_icnt, (tick/100) - 1); /* XXX */ 1601.1Ssimonb } else { 1611.1Ssimonb WRITE_REG(sc->sc_addr_icnt, tick - 1); /* XXX */ 1621.1Ssimonb } 1631.1Ssimonb WRITE_REG(sc->sc_addr_cfg, 0x03); /* XXX */ 1641.1Ssimonb} 1651.1Ssimonb 1661.1Ssimonbstatic void 1671.1Ssimonbsbtimer_clockintr(void *arg, uint32_t status, uint32_t pc) 1681.1Ssimonb{ 1691.1Ssimonb struct sbtimer_softc *sc = arg; 1701.1Ssimonb struct clockframe cf; 1711.1Ssimonb 1721.1Ssimonb /* clear interrupt, but leave timer enabled and in repeating mode */ 1731.1Ssimonb WRITE_REG(sc->sc_addr_cfg, 0x03); /* XXX */ 1741.1Ssimonb 1751.1Ssimonb cf.pc = pc; 1761.1Ssimonb cf.sr = status; 1771.3Ssimonb 1781.3Ssimonb /* reset the CPU count register (used by microtime) */ 1791.3Ssimonb mips3_cp0_count_write(0); 1801.1Ssimonb 1811.1Ssimonb hardclock(&cf); 1821.1Ssimonb} 1831.1Ssimonb 1841.1Ssimonbstatic void 1851.1Ssimonbsbtimer_statclockintr(void *arg, uint32_t status, uint32_t pc) 1861.1Ssimonb{ 1871.1Ssimonb struct sbtimer_softc *sc = arg; 1881.1Ssimonb struct clockframe cf; 1891.1Ssimonb 1901.1Ssimonb /* clear intr & disable timer, reset initial count, re-enable timer */ 1911.1Ssimonb WRITE_REG(sc->sc_addr_cfg, 0x00); /* XXX */ 1921.1Ssimonb /* XXX more to do */ 1931.1Ssimonb 1941.1Ssimonb cf.pc = pc; 1951.1Ssimonb cf.sr = status; 1961.1Ssimonb 1971.1Ssimonb statclock(&cf); 1981.1Ssimonb} 1991.1Ssimonb 2001.1Ssimonbstatic void 2011.1Ssimonbsbtimer_miscintr(void *arg, uint32_t status, uint32_t pc) 2021.1Ssimonb{ 2031.1Ssimonb struct sbtimer_softc *sc = arg; 2041.1Ssimonb 2051.1Ssimonb /* disable timer */ 2061.1Ssimonb WRITE_REG(sc->sc_addr_cfg, 0x00); /* XXX */ 2071.1Ssimonb 2081.1Ssimonb /* XXX more to do */ 2091.1Ssimonb} 210