sbtimer.c revision 1.15
1/* $NetBSD: sbtimer.c,v 1.15 2009/12/14 00:46:08 matt Exp $ */ 2 3/* 4 * Copyright 2000, 2001 5 * Broadcom Corporation. All rights reserved. 6 * 7 * This software is furnished under license and may be used and copied only 8 * in accordance with the following terms and conditions. Subject to these 9 * conditions, you may download, copy, install, use, modify and distribute 10 * modified or unmodified copies of this software in source and/or binary 11 * form. No title or ownership is transferred hereby. 12 * 13 * 1) Any source code used, modified or distributed must reproduce and 14 * retain this copyright notice and list of conditions as they appear in 15 * the source file. 16 * 17 * 2) No right is granted to use any trade name, trademark, or logo of 18 * Broadcom Corporation. The "Broadcom Corporation" name may not be 19 * used to endorse or promote products derived from this software 20 * without the prior written permission of Broadcom Corporation. 21 * 22 * 3) THIS SOFTWARE IS PROVIDED "AS-IS" AND ANY EXPRESS OR IMPLIED 23 * WARRANTIES, INCLUDING BUT NOT LIMITED TO, ANY IMPLIED WARRANTIES OF 24 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR 25 * NON-INFRINGEMENT ARE DISCLAIMED. IN NO EVENT SHALL BROADCOM BE LIABLE 26 * FOR ANY DAMAGES WHATSOEVER, AND IN PARTICULAR, BROADCOM SHALL NOT BE 27 * LIABLE FOR DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 28 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 29 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR 30 * BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, 31 * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE 32 * OR OTHERWISE), EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 33 */ 34 35#include <sys/cdefs.h> 36__KERNEL_RCSID(0, "$NetBSD: sbtimer.c,v 1.15 2009/12/14 00:46:08 matt Exp $"); 37 38#include <sys/param.h> 39#include <sys/device.h> 40#include <sys/systm.h> 41#include <sys/kernel.h> 42 43#include <mips/locore.h> 44 45#include <mips/sibyte/include/sb1250_regs.h> 46#include <mips/sibyte/include/sb1250_scd.h> 47#include <mips/sibyte/dev/sbscdvar.h> 48 49struct sbtimer_softc { 50 struct device sc_dev; 51 void *sc_intrhand; 52 int sc_flags; 53 void *sc_addr_icnt, *sc_addr_cnt, *sc_addr_cfg; 54}; 55#define SBTIMER_CLOCK 1 56#define SBTIMER_STATCLOCK 2 57 58#define READ_REG(rp) (mips3_ld((volatile uint64_t *)(rp))) 59#define WRITE_REG(rp, val) (mips3_sd((volatile uint64_t *)(rp), (val))) 60 61static int sbtimer_match(struct device *, struct cfdata *, void *); 62static void sbtimer_attach(struct device *, struct device *, void *); 63 64CFATTACH_DECL(sbtimer, sizeof(struct sbtimer_softc), 65 sbtimer_match, sbtimer_attach, NULL, NULL); 66 67static void sbtimer_clockintr(void *arg, uint32_t status, vaddr_t pc); 68static void sbtimer_statclockintr(void *arg, uint32_t status, vaddr_t pc); 69static void sbtimer_miscintr(void *arg, uint32_t status, vaddr_t pc); 70 71static void sbtimer_clock_init(void *arg); 72 73static int 74sbtimer_match(struct device *parent, struct cfdata *match, void *aux) 75{ 76 struct sbscd_attach_args *sap = aux; 77 78 if (sap->sa_locs.sa_type != SBSCD_DEVTYPE_TIMER) 79 return (0); 80 81 return 1; 82} 83 84static void 85sbtimer_attach(struct device *parent, struct device *self, void *aux) 86{ 87 struct sbscd_attach_args *sa = aux; 88 struct sbtimer_softc *sc = (struct sbtimer_softc *)self; 89 void (*fun)(void *, uint32_t, vaddr_t); 90 int ipl; 91 const char *comment = ""; 92 93 sc->sc_flags = device_cfdata(&sc->sc_dev)->cf_flags; 94 sc->sc_addr_icnt = (uint64_t *)MIPS_PHYS_TO_KSEG1(sa->sa_locs.sa_addr + 95 R_SCD_TIMER_INIT); 96 sc->sc_addr_cnt = (uint64_t *)MIPS_PHYS_TO_KSEG1(sa->sa_locs.sa_addr + 97 R_SCD_TIMER_CNT); 98 sc->sc_addr_cfg = (uint64_t *)MIPS_PHYS_TO_KSEG1(sa->sa_locs.sa_addr + 99 R_SCD_TIMER_CFG); 100 101 printf(": "); 102 if ((sc->sc_flags & SBTIMER_CLOCK) != 0) { 103 ipl = IPL_CLOCK; 104 fun = sbtimer_clockintr; 105 106 if (system_set_clockfns(sc, sbtimer_clock_init)) { 107 /* not really the clock */ 108 sc->sc_flags &= ~SBTIMER_CLOCK; 109 comment = " (not system timer)"; 110 goto not_really; 111 } 112 printf("system timer"); 113 } else if ((sc->sc_flags & SBTIMER_STATCLOCK) != 0) { 114 ipl = IPL_HIGH; 115 fun = sbtimer_statclockintr; 116 117 /* XXX make sure it's the statclock */ 118 if (1) { 119 /* not really the statclock */ 120 sc->sc_flags &= ~SBTIMER_STATCLOCK; 121 comment = " (not system statistics timer)"; 122 goto not_really; 123 } 124 printf("system statistics timer"); 125 } else { 126not_really: 127 ipl = IPL_BIO; /* XXX -- pretty low */ 128 fun = sbtimer_miscintr; 129 printf("general-purpose timer%s", comment); 130 } 131 printf("\n"); 132 133 /* clear intr & disable timer. */ 134 WRITE_REG(sc->sc_addr_cfg, 0x00); /* XXX */ 135 136 sc->sc_intrhand = cpu_intr_establish(sa->sa_locs.sa_intr[0], ipl, 137 fun, sc); 138} 139 140static void 141sbtimer_clock_init(void *arg) 142{ 143 struct sbtimer_softc *sc = arg; 144 145 printf("%s: ", sc->sc_dev.dv_xname); 146 if ((1000000 % hz) == 0) 147 printf("%dHz system timer\n", hz); 148 else { 149 printf("cannot get %dHz clock; using 1000Hz\n", hz); 150 hz = 1000; 151 tick = 1000000 / hz; 152 } 153 154 WRITE_REG(sc->sc_addr_cfg, 0x00); /* XXX */ 155 if (G_SYS_PLL_DIV(READ_REG(MIPS_PHYS_TO_KSEG1(A_SCD_SYSTEM_CFG))) == 0) { 156 printf("%s: PLL_DIV == 0; speeding up clock ticks for simulator\n", 157 sc->sc_dev.dv_xname); 158 WRITE_REG(sc->sc_addr_icnt, (tick/100) - 1); /* XXX */ 159 } else { 160 WRITE_REG(sc->sc_addr_icnt, tick - 1); /* XXX */ 161 } 162 WRITE_REG(sc->sc_addr_cfg, 0x03); /* XXX */ 163} 164 165static void 166sbtimer_clockintr(void *arg, uint32_t status, vaddr_t pc) 167{ 168 struct sbtimer_softc *sc = arg; 169 struct clockframe cf; 170 171 /* clear interrupt, but leave timer enabled and in repeating mode */ 172 WRITE_REG(sc->sc_addr_cfg, 0x03); /* XXX */ 173 174 cf.pc = pc; 175 cf.sr = status; 176 177 hardclock(&cf); 178 179 /* 180 * We never want a CPU core clock interrupt, so adjust the CP0 181 * compare register to just before the CP0 clock register's value 182 * each time. 183 */ 184 mips3_cp0_compare_write(mips3_cp0_count_read() - 1); 185} 186 187static void 188sbtimer_statclockintr(void *arg, uint32_t status, vaddr_t pc) 189{ 190 struct sbtimer_softc *sc = arg; 191 struct clockframe cf; 192 193 /* clear intr & disable timer, reset initial count, re-enable timer */ 194 WRITE_REG(sc->sc_addr_cfg, 0x00); /* XXX */ 195 /* XXX more to do */ 196 197 cf.pc = pc; 198 cf.sr = status; 199 200 statclock(&cf); 201} 202 203static void 204sbtimer_miscintr(void *arg, uint32_t status, vaddr_t pc) 205{ 206 struct sbtimer_softc *sc = arg; 207 208 /* disable timer */ 209 WRITE_REG(sc->sc_addr_cfg, 0x00); /* XXX */ 210 211 /* XXX more to do */ 212} 213