bus.h revision 1.20 1 1.20 dsl /* $NetBSD: bus.h,v 1.20 2009/03/14 14:46:02 dsl Exp $ */
2 1.4 thorpej
3 1.1 wdk /*-
4 1.4 thorpej * Copyright (c) 1996, 1997, 1998, 2001 The NetBSD Foundation, Inc.
5 1.1 wdk * All rights reserved.
6 1.1 wdk *
7 1.1 wdk * This code is derived from software contributed to The NetBSD Foundation
8 1.1 wdk * by Jason R. Thorpe of the Numerical Aerospace Simulation Facility,
9 1.1 wdk * NASA Ames Research Center.
10 1.1 wdk *
11 1.1 wdk * Redistribution and use in source and binary forms, with or without
12 1.1 wdk * modification, are permitted provided that the following conditions
13 1.1 wdk * are met:
14 1.1 wdk * 1. Redistributions of source code must retain the above copyright
15 1.1 wdk * notice, this list of conditions and the following disclaimer.
16 1.1 wdk * 2. Redistributions in binary form must reproduce the above copyright
17 1.1 wdk * notice, this list of conditions and the following disclaimer in the
18 1.1 wdk * documentation and/or other materials provided with the distribution.
19 1.1 wdk *
20 1.1 wdk * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
21 1.1 wdk * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
22 1.1 wdk * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
23 1.1 wdk * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
24 1.1 wdk * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
25 1.1 wdk * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
26 1.1 wdk * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
27 1.1 wdk * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
28 1.1 wdk * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
29 1.1 wdk * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
30 1.1 wdk * POSSIBILITY OF SUCH DAMAGE.
31 1.1 wdk */
32 1.1 wdk
33 1.1 wdk /*
34 1.1 wdk * Copyright (c) 1997 Per Fogelstrom. All rights reserved.
35 1.1 wdk * Copyright (c) 1996 Niklas Hallqvist. All rights reserved.
36 1.1 wdk *
37 1.1 wdk * Redistribution and use in source and binary forms, with or without
38 1.1 wdk * modification, are permitted provided that the following conditions
39 1.1 wdk * are met:
40 1.1 wdk * 1. Redistributions of source code must retain the above copyright
41 1.1 wdk * notice, this list of conditions and the following disclaimer.
42 1.1 wdk * 2. Redistributions in binary form must reproduce the above copyright
43 1.1 wdk * notice, this list of conditions and the following disclaimer in the
44 1.1 wdk * documentation and/or other materials provided with the distribution.
45 1.1 wdk * 3. All advertising materials mentioning features or use of this software
46 1.1 wdk * must display the following acknowledgement:
47 1.1 wdk * This product includes software developed by Christopher G. Demetriou
48 1.1 wdk * for the NetBSD Project.
49 1.1 wdk * 4. The name of the author may not be used to endorse or promote products
50 1.1 wdk * derived from this software without specific prior written permission
51 1.1 wdk *
52 1.1 wdk * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
53 1.1 wdk * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
54 1.1 wdk * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
55 1.1 wdk * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
56 1.1 wdk * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
57 1.1 wdk * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
58 1.1 wdk * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
59 1.1 wdk * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
60 1.1 wdk * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
61 1.1 wdk * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
62 1.1 wdk */
63 1.1 wdk
64 1.1 wdk #ifndef _MIPSCO_BUS_H_
65 1.1 wdk #define _MIPSCO_BUS_H_
66 1.1 wdk #ifdef _KERNEL
67 1.1 wdk
68 1.1 wdk #include <mips/locore.h>
69 1.1 wdk
70 1.1 wdk #ifdef BUS_SPACE_DEBUG
71 1.1 wdk #include <sys/systm.h> /* for printf() prototype */
72 1.1 wdk /*
73 1.1 wdk * Macros for checking the aligned-ness of pointers passed to bus
74 1.1 wdk * space ops. Strict alignment is required by the MIPS architecture,
75 1.1 wdk * and a trap will occur if unaligned access is performed. These
76 1.1 wdk * may aid in the debugging of a broken device driver by displaying
77 1.1 wdk * useful information about the problem.
78 1.1 wdk */
79 1.1 wdk #define __BUS_SPACE_ALIGNED_ADDRESS(p, t) \
80 1.1 wdk ((((u_long)(p)) & (sizeof(t)-1)) == 0)
81 1.1 wdk
82 1.1 wdk #define __BUS_SPACE_ADDRESS_SANITY(p, t, d) \
83 1.1 wdk ({ \
84 1.1 wdk if (__BUS_SPACE_ALIGNED_ADDRESS((p), t) == 0) { \
85 1.1 wdk printf("%s 0x%lx not aligned to %d bytes %s:%d\n", \
86 1.1 wdk d, (u_long)(p), sizeof(t), __FILE__, __LINE__); \
87 1.1 wdk } \
88 1.1 wdk (void) 0; \
89 1.1 wdk })
90 1.1 wdk
91 1.1 wdk #define BUS_SPACE_ALIGNED_POINTER(p, t) __BUS_SPACE_ALIGNED_ADDRESS(p, t)
92 1.1 wdk #else
93 1.1 wdk #define __BUS_SPACE_ADDRESS_SANITY(p,t,d) (void) 0
94 1.1 wdk #define BUS_SPACE_ALIGNED_POINTER(p, t) ALIGNED_POINTER(p, t)
95 1.1 wdk #endif /* BUS_SPACE_DEBUG */
96 1.1 wdk
97 1.1 wdk /*
98 1.1 wdk * Utility macro; do not use outside this file.
99 1.1 wdk */
100 1.1 wdk #ifdef __STDC__
101 1.1 wdk #define __CONCAT3(a,b,c) a##b##c
102 1.1 wdk #else
103 1.1 wdk #define __CONCAT3(a,b,c) a/**/b/**/c
104 1.1 wdk #endif
105 1.1 wdk
106 1.1 wdk /*
107 1.1 wdk * Bus address and size types
108 1.1 wdk */
109 1.1 wdk typedef u_long bus_addr_t;
110 1.1 wdk typedef u_long bus_size_t;
111 1.1 wdk
112 1.1 wdk /*
113 1.1 wdk * Access methods for bus resources and address space.
114 1.1 wdk */
115 1.1 wdk typedef u_int32_t bus_space_handle_t;
116 1.1 wdk typedef struct mipsco_bus_space *bus_space_tag_t;
117 1.1 wdk
118 1.1 wdk struct mipsco_bus_space {
119 1.1 wdk const char *bs_name;
120 1.1 wdk struct extent *bs_extent;
121 1.1 wdk bus_addr_t bs_start;
122 1.1 wdk bus_size_t bs_size;
123 1.1 wdk
124 1.1 wdk paddr_t bs_pbase;
125 1.1 wdk vaddr_t bs_vbase;
126 1.1 wdk
127 1.5 wdk u_int8_t bs_stride; /* log2(stride) */
128 1.5 wdk u_int8_t bs_bswap; /* byte swap in stream methods */
129 1.5 wdk
130 1.5 wdk u_int8_t bs_offset_1;
131 1.5 wdk u_int8_t bs_offset_2;
132 1.5 wdk u_int8_t bs_offset_4;
133 1.5 wdk u_int8_t bs_offset_8;
134 1.1 wdk
135 1.1 wdk /* compose a bus_space handle from tag/handle/addr/size/flags (MD) */
136 1.20 dsl int (*bs_compose_handle)(bus_space_tag_t, bus_addr_t,
137 1.20 dsl bus_size_t, int, bus_space_handle_t *);
138 1.1 wdk
139 1.1 wdk /* dispose a bus_space handle (MD) */
140 1.20 dsl int (*bs_dispose_handle)(bus_space_tag_t, bus_space_handle_t,
141 1.20 dsl bus_size_t);
142 1.1 wdk
143 1.1 wdk /* convert bus_space tag/handle to physical address (MD) */
144 1.20 dsl int (*bs_paddr)(bus_space_tag_t, bus_space_handle_t,
145 1.20 dsl paddr_t *);
146 1.1 wdk
147 1.1 wdk /* mapping/unmapping */
148 1.20 dsl int (*bs_map)(bus_space_tag_t, bus_addr_t, bus_size_t, int,
149 1.20 dsl bus_space_handle_t *);
150 1.20 dsl void (*bs_unmap)(bus_space_tag_t, bus_space_handle_t,
151 1.20 dsl bus_size_t);
152 1.20 dsl int (*bs_subregion)(bus_space_tag_t, bus_space_handle_t,
153 1.20 dsl bus_size_t, bus_size_t, bus_space_handle_t *);
154 1.20 dsl paddr_t (*bs_mmap)(bus_space_tag_t, bus_addr_t, off_t, int, int);
155 1.7 wdk
156 1.1 wdk
157 1.1 wdk /* allocation/deallocation */
158 1.20 dsl int (*bs_alloc)(bus_space_tag_t, bus_addr_t, bus_addr_t,
159 1.1 wdk bus_size_t, bus_size_t, bus_size_t, int,
160 1.20 dsl bus_addr_t *, bus_space_handle_t *);
161 1.20 dsl void (*bs_free)(bus_space_tag_t, bus_space_handle_t,
162 1.20 dsl bus_size_t);
163 1.1 wdk
164 1.2 wdk /* interrupt attach */
165 1.20 dsl void (*bs_intr_establish)(
166 1.2 wdk bus_space_tag_t,
167 1.2 wdk int, /*bus-specific intr*/
168 1.2 wdk int, /*priority/class*/
169 1.2 wdk int, /*flags*/
170 1.20 dsl int (*)(void *), /*handler*/
171 1.20 dsl void *); /*handler arg*/
172 1.2 wdk
173 1.1 wdk void *bs_aux;
174 1.1 wdk };
175 1.1 wdk
176 1.1 wdk /* vaddr_t argument of mipsco_bus_space_init() */
177 1.1 wdk #define MIPSCO_BUS_SPACE_UNMAPPED ((vaddr_t)0)
178 1.1 wdk
179 1.1 wdk /* machine dependent utility function for bus_space users */
180 1.20 dsl void mipsco_bus_space_malloc_set_safe(void);
181 1.20 dsl void mipsco_bus_space_init(bus_space_tag_t, const char *,
182 1.20 dsl paddr_t, vaddr_t, bus_addr_t, bus_size_t);
183 1.20 dsl void mipsco_bus_space_init_extent(bus_space_tag_t, void *, size_t);
184 1.20 dsl void mipsco_bus_space_set_aligned_stride(bus_space_tag_t, unsigned int);
185 1.20 dsl void mipsco_sparse_bus_space_init(bus_space_tag_t, const char *,
186 1.20 dsl paddr_t, bus_addr_t, bus_size_t);
187 1.20 dsl void mipsco_large_bus_space_init(bus_space_tag_t, const char *,
188 1.20 dsl paddr_t, bus_addr_t, bus_size_t);
189 1.1 wdk
190 1.1 wdk /* machine dependent utility function for bus_space implementations */
191 1.20 dsl int mipsco_bus_space_extent_malloc_flag(void);
192 1.1 wdk
193 1.1 wdk /* these are provided for subclasses which override base bus_space. */
194 1.1 wdk
195 1.20 dsl int mipsco_bus_space_compose_handle(bus_space_tag_t,
196 1.20 dsl bus_addr_t, bus_size_t, int, bus_space_handle_t *);
197 1.20 dsl int mipsco_bus_space_dispose_handle(bus_space_tag_t,
198 1.20 dsl bus_space_handle_t, bus_size_t);
199 1.20 dsl int mipsco_bus_space_paddr(bus_space_tag_t,
200 1.20 dsl bus_space_handle_t, paddr_t *);
201 1.20 dsl
202 1.20 dsl int mipsco_sparse_bus_space_compose_handle(bus_space_tag_t,
203 1.20 dsl bus_addr_t, bus_size_t, int, bus_space_handle_t *);
204 1.20 dsl int mipsco_sparse_bus_space_dispose_handle(bus_space_tag_t,
205 1.20 dsl bus_space_handle_t, bus_size_t);
206 1.20 dsl int mipsco_sparse_bus_space_paddr(bus_space_tag_t,
207 1.20 dsl bus_space_handle_t, paddr_t *);
208 1.20 dsl
209 1.20 dsl int mipsco_bus_space_map(bus_space_tag_t, bus_addr_t, bus_size_t, int,
210 1.20 dsl bus_space_handle_t *);
211 1.20 dsl void mipsco_bus_space_unmap(bus_space_tag_t, bus_space_handle_t,
212 1.20 dsl bus_size_t);
213 1.20 dsl int mipsco_bus_space_subregion(bus_space_tag_t, bus_space_handle_t,
214 1.20 dsl bus_size_t, bus_size_t, bus_space_handle_t *);
215 1.20 dsl paddr_t mipsco_bus_space_mmap(bus_space_tag_t, bus_addr_t, off_t,
216 1.20 dsl int, int);
217 1.20 dsl int mipsco_bus_space_alloc(bus_space_tag_t, bus_addr_t, bus_addr_t,
218 1.1 wdk bus_size_t, bus_size_t, bus_size_t, int, bus_addr_t *,
219 1.20 dsl bus_space_handle_t *);
220 1.1 wdk #define mipsco_bus_space_free mipsco_bus_space_unmap
221 1.1 wdk
222 1.1 wdk /*
223 1.20 dsl * int bus_space_compose_handle(bus_space_tag_t t, bus_addr_t addr,
224 1.20 dsl * bus_size_t size, int flags, bus_space_handle_t *bshp);
225 1.1 wdk *
226 1.1 wdk * MACHINE DEPENDENT, NOT PORTABLE INTERFACE:
227 1.1 wdk * Compose a bus_space handle from tag/handle/addr/size/flags.
228 1.1 wdk * A helper function for bus_space_map()/bus_space_alloc() implementation.
229 1.1 wdk */
230 1.1 wdk #define bus_space_compose_handle(bst, addr, size, flags, bshp) \
231 1.1 wdk (*(bst)->bs_compose_handle)(bst, addr, size, flags, bshp)
232 1.1 wdk
233 1.1 wdk /*
234 1.20 dsl * int bus_space_dispose_handle(bus_space_tag_t t, bus_addr_t addr,
235 1.20 dsl * bus_space_handle_t bsh, bus_size_t size);
236 1.1 wdk *
237 1.1 wdk * MACHINE DEPENDENT, NOT PORTABLE INTERFACE:
238 1.1 wdk * Dispose a bus_space handle.
239 1.1 wdk * A helper function for bus_space_unmap()/bus_space_free() implementation.
240 1.1 wdk */
241 1.1 wdk #define bus_space_dispose_handle(bst, bsh, size) \
242 1.1 wdk (*(bst)->bs_dispose_handle)(bst, bsh, size)
243 1.1 wdk
244 1.1 wdk /*
245 1.20 dsl * int bus_space_paddr(bus_space_tag_t tag,
246 1.20 dsl * bus_space_handle_t bsh, paddr_t *pap);
247 1.1 wdk *
248 1.1 wdk * MACHINE DEPENDENT, NOT PORTABLE INTERFACE:
249 1.1 wdk * (cannot be implemented on e.g. I/O space on i386, non-linear space on alpha)
250 1.1 wdk * Return physical address of a region.
251 1.1 wdk * A helper function for device mmap entry.
252 1.1 wdk */
253 1.1 wdk #define bus_space_paddr(bst, bsh, pap) \
254 1.1 wdk (*(bst)->bs_paddr)(bst, bsh, pap)
255 1.1 wdk
256 1.1 wdk /*
257 1.20 dsl * void *bus_space_vaddr(bus_space_tag_t, bus_space_handle_t);
258 1.1 wdk *
259 1.1 wdk * Get the kernel virtual address for the mapped bus space.
260 1.1 wdk * Only allowed for regions mapped with BUS_SPACE_MAP_LINEAR.
261 1.1 wdk * (XXX not enforced)
262 1.1 wdk */
263 1.1 wdk #define bus_space_vaddr(bst, bsh) \
264 1.1 wdk ((void *)(bsh))
265 1.7 wdk
266 1.7 wdk /*
267 1.20 dsl * paddr_t bus_space_mmap(bus_space_tag_t, bus_addr_t, off_t,
268 1.20 dsl * int, int);
269 1.7 wdk *
270 1.7 wdk * Mmap bus space on behalf of the user.
271 1.7 wdk */
272 1.7 wdk #define bus_space_mmap(bst, addr, off, prot, flags) \
273 1.7 wdk (*(bst)->bs_mmap)((bst), (addr), (off), (prot), (flags))
274 1.1 wdk
275 1.1 wdk /*
276 1.20 dsl * int bus_space_map(bus_space_tag_t t, bus_addr_t addr,
277 1.20 dsl * bus_size_t size, int flags, bus_space_handle_t *bshp);
278 1.1 wdk *
279 1.1 wdk * Map a region of bus space.
280 1.1 wdk */
281 1.1 wdk
282 1.1 wdk #define BUS_SPACE_MAP_CACHEABLE 0x01
283 1.1 wdk #define BUS_SPACE_MAP_LINEAR 0x02
284 1.1 wdk #define BUS_SPACE_MAP_PREFETCHABLE 0x04
285 1.1 wdk
286 1.1 wdk #define bus_space_map(t, a, s, f, hp) \
287 1.1 wdk (*(t)->bs_map)((t), (a), (s), (f), (hp))
288 1.1 wdk
289 1.1 wdk /*
290 1.20 dsl * void bus_space_unmap(bus_space_tag_t t,
291 1.20 dsl * bus_space_handle_t bsh, bus_size_t size);
292 1.1 wdk *
293 1.1 wdk * Unmap a region of bus space.
294 1.1 wdk */
295 1.1 wdk
296 1.1 wdk #define bus_space_unmap(t, h, s) \
297 1.1 wdk (*(t)->bs_unmap)((t), (h), (s))
298 1.1 wdk
299 1.1 wdk /*
300 1.20 dsl * int bus_space_subregion(bus_space_tag_t t,
301 1.1 wdk * bus_space_handle_t bsh, bus_size_t offset, bus_size_t size,
302 1.20 dsl * bus_space_handle_t *nbshp);
303 1.1 wdk *
304 1.1 wdk * Get a new handle for a subregion of an already-mapped area of bus space.
305 1.1 wdk */
306 1.1 wdk
307 1.1 wdk #define bus_space_subregion(t, h, o, s, hp) \
308 1.1 wdk (*(t)->bs_subregion)((t), (h), (o), (s), (hp))
309 1.1 wdk
310 1.1 wdk /*
311 1.20 dsl * int bus_space_alloc(bus_space_tag_t t, bus_addr_t, rstart,
312 1.1 wdk * bus_addr_t rend, bus_size_t size, bus_size_t align,
313 1.1 wdk * bus_size_t boundary, int flags, bus_addr_t *addrp,
314 1.20 dsl * bus_space_handle_t *bshp);
315 1.1 wdk *
316 1.1 wdk * Allocate a region of bus space.
317 1.1 wdk */
318 1.1 wdk
319 1.1 wdk #define bus_space_alloc(t, rs, re, s, a, b, f, ap, hp) \
320 1.1 wdk (*(t)->bs_alloc)((t), (rs), (re), (s), (a), (b), (f), (ap), (hp))
321 1.1 wdk
322 1.1 wdk /*
323 1.20 dsl * int bus_space_free(bus_space_tag_t t,
324 1.20 dsl * bus_space_handle_t bsh, bus_size_t size);
325 1.1 wdk *
326 1.1 wdk * Free a region of bus space.
327 1.1 wdk */
328 1.1 wdk
329 1.1 wdk #define bus_space_free(t, h, s) \
330 1.1 wdk (*(t)->bs_free)((t), (h), (s))
331 1.2 wdk
332 1.2 wdk /*
333 1.20 dsl * void bus_intr_establish(bus_space_tag_t bst,
334 1.20 dsl * int level, int pri, int flags, int (*func)(void *)
335 1.20 dsl * void *arg);
336 1.2 wdk *
337 1.2 wdk * Attach interrupt handler and softc argument
338 1.2 wdk */
339 1.2 wdk
340 1.2 wdk #define bus_intr_establish(t, i, c, f, ihf, iha) \
341 1.2 wdk (*(t)->bs_intr_establish)((t), (i), (c), (f), (ihf), (iha))
342 1.1 wdk
343 1.5 wdk
344 1.5 wdk /*
345 1.5 wdk * Utility macros; do not use outside this file.
346 1.5 wdk */
347 1.5 wdk #define __BS_TYPENAME(BITS) __CONCAT3(u_int,BITS,_t)
348 1.5 wdk #define __BS_OFFSET(t, o, BYTES) ((o) << (t)->bs_stride)
349 1.5 wdk #define __BS_FUNCTION(func,BYTES) __CONCAT3(func,_,BYTES)
350 1.5 wdk
351 1.5 wdk /*
352 1.5 wdk * Calculate the target address using the bus_space parameters
353 1.5 wdk */
354 1.5 wdk #define __BS_ADDR(t, h, offset, BITS, BYTES) \
355 1.5 wdk ((volatile __CONCAT3(u_int,BITS,_t) *) \
356 1.5 wdk ((h) + __BS_OFFSET(t, offset, BYTES) + \
357 1.5 wdk (t)->__CONCAT(bs_offset_,BYTES)))
358 1.5 wdk
359 1.1 wdk /*
360 1.20 dsl * u_intN_t bus_space_read_N(bus_space_tag_t tag,
361 1.20 dsl * bus_space_handle_t bsh, bus_size_t offset);
362 1.1 wdk *
363 1.1 wdk * Read a 1, 2, 4, or 8 byte quantity from bus space
364 1.1 wdk * described by tag/handle/offset.
365 1.1 wdk */
366 1.1 wdk
367 1.5 wdk #define __bus_space_read(BYTES,BITS) \
368 1.15 perry static __inline __CONCAT3(u_int,BITS,_t) \
369 1.1 wdk __CONCAT(bus_space_read_,BYTES)(bus_space_tag_t bst, \
370 1.1 wdk bus_space_handle_t bsh, bus_size_t offset) \
371 1.1 wdk { \
372 1.5 wdk return (*__BS_ADDR(bst, bsh, offset, BITS, BYTES)); \
373 1.1 wdk }
374 1.1 wdk
375 1.5 wdk __bus_space_read(1,8)
376 1.5 wdk __bus_space_read(2,16)
377 1.5 wdk __bus_space_read(4,32)
378 1.5 wdk __bus_space_read(8,64)
379 1.1 wdk
380 1.1 wdk /*
381 1.20 dsl * void bus_space_read_multi_N(bus_space_tag_t tag,
382 1.1 wdk * bus_space_handle_t bsh, bus_size_t offset,
383 1.20 dsl * u_intN_t *addr, size_t count);
384 1.1 wdk *
385 1.1 wdk * Read `count' 1, 2, 4, or 8 byte quantities from bus space
386 1.1 wdk * described by tag/handle/offset and copy into buffer provided.
387 1.1 wdk */
388 1.1 wdk
389 1.5 wdk #define __bus_space_read_multi(BYTES,BITS) \
390 1.15 perry static __inline void __BS_FUNCTION(bus_space_read_multi,BYTES) \
391 1.20 dsl (bus_space_tag_t, bus_space_handle_t, bus_size_t, \
392 1.20 dsl __BS_TYPENAME(BITS) *, size_t); \
393 1.5 wdk \
394 1.15 perry static __inline void \
395 1.5 wdk __BS_FUNCTION(bus_space_read_multi,BYTES)(t, h, o, a, c) \
396 1.5 wdk bus_space_tag_t t; \
397 1.5 wdk bus_space_handle_t h; \
398 1.5 wdk bus_size_t o; \
399 1.5 wdk __BS_TYPENAME(BITS) *a; \
400 1.5 wdk size_t c; \
401 1.5 wdk { \
402 1.5 wdk \
403 1.5 wdk while (c--) \
404 1.5 wdk *a++ = __BS_FUNCTION(bus_space_read,BYTES)(t, h, o); \
405 1.5 wdk }
406 1.5 wdk
407 1.5 wdk __bus_space_read_multi(1,8)
408 1.5 wdk __bus_space_read_multi(2,16)
409 1.5 wdk __bus_space_read_multi(4,32)
410 1.5 wdk __bus_space_read_multi(8,64)
411 1.5 wdk
412 1.1 wdk
413 1.1 wdk /*
414 1.20 dsl * void bus_space_read_region_N(bus_space_tag_t tag,
415 1.1 wdk * bus_space_handle_t bsh, bus_size_t offset,
416 1.20 dsl * u_intN_t *addr, size_t count);
417 1.1 wdk *
418 1.1 wdk * Read `count' 1, 2, 4, or 8 byte quantities from bus space
419 1.1 wdk * described by tag/handle and starting at `offset' and copy into
420 1.1 wdk * buffer provided.
421 1.1 wdk */
422 1.1 wdk
423 1.5 wdk #define __bus_space_read_region(BYTES,BITS) \
424 1.15 perry static __inline void __BS_FUNCTION(bus_space_read_region,BYTES) \
425 1.20 dsl (bus_space_tag_t, bus_space_handle_t, bus_size_t, \
426 1.20 dsl __BS_TYPENAME(BITS) *, size_t); \
427 1.5 wdk \
428 1.15 perry static __inline void \
429 1.5 wdk __BS_FUNCTION(bus_space_read_region,BYTES)(t, h, o, a, c) \
430 1.5 wdk bus_space_tag_t t; \
431 1.5 wdk bus_space_handle_t h; \
432 1.5 wdk bus_size_t o; \
433 1.5 wdk __BS_TYPENAME(BITS) *a; \
434 1.5 wdk size_t c; \
435 1.5 wdk { \
436 1.5 wdk \
437 1.5 wdk while (c--) { \
438 1.5 wdk *a++ = __BS_FUNCTION(bus_space_read,BYTES)(t, h, o); \
439 1.5 wdk o += BYTES; \
440 1.1 wdk } \
441 1.1 wdk }
442 1.1 wdk
443 1.5 wdk __bus_space_read_region(1,8)
444 1.5 wdk __bus_space_read_region(2,16)
445 1.5 wdk __bus_space_read_region(4,32)
446 1.5 wdk __bus_space_read_region(8,64)
447 1.5 wdk
448 1.1 wdk
449 1.1 wdk /*
450 1.20 dsl * void bus_space_write_N(bus_space_tag_t tag,
451 1.1 wdk * bus_space_handle_t bsh, bus_size_t offset,
452 1.20 dsl * u_intN_t value);
453 1.1 wdk *
454 1.1 wdk * Write the 1, 2, 4, or 8 byte value `value' to bus space
455 1.1 wdk * described by tag/handle/offset.
456 1.1 wdk */
457 1.1 wdk
458 1.5 wdk #define __bus_space_write(BYTES,BITS) \
459 1.15 perry static __inline void \
460 1.1 wdk __CONCAT(bus_space_write_,BYTES)(bus_space_tag_t bst, \
461 1.1 wdk bus_space_handle_t bsh, \
462 1.1 wdk bus_size_t offset, __CONCAT3(u_int,BITS,_t) data) \
463 1.1 wdk { \
464 1.5 wdk *__BS_ADDR(bst, bsh, offset, BITS, BYTES) = data; \
465 1.1 wdk wbflush(); \
466 1.1 wdk }
467 1.1 wdk
468 1.5 wdk __bus_space_write(1,8)
469 1.5 wdk __bus_space_write(2,16)
470 1.5 wdk __bus_space_write(4,32)
471 1.5 wdk __bus_space_write(8,64)
472 1.1 wdk
473 1.1 wdk /*
474 1.20 dsl * void bus_space_write_multi_N(bus_space_tag_t tag,
475 1.1 wdk * bus_space_handle_t bsh, bus_size_t offset,
476 1.20 dsl * const u_intN_t *addr, size_t count);
477 1.1 wdk *
478 1.1 wdk * Write `count' 1, 2, 4, or 8 byte quantities from the buffer
479 1.1 wdk * provided to bus space described by tag/handle/offset.
480 1.1 wdk */
481 1.1 wdk
482 1.5 wdk #define __bus_space_write_multi(BYTES,BITS) \
483 1.15 perry static __inline void __BS_FUNCTION(bus_space_write_multi,BYTES) \
484 1.20 dsl (bus_space_tag_t, bus_space_handle_t, bus_size_t, \
485 1.20 dsl __BS_TYPENAME(BITS) *, size_t); \
486 1.5 wdk \
487 1.15 perry static __inline void \
488 1.5 wdk __BS_FUNCTION(bus_space_write_multi,BYTES)(t, h, o, a, c) \
489 1.5 wdk bus_space_tag_t t; \
490 1.5 wdk bus_space_handle_t h; \
491 1.5 wdk bus_size_t o; \
492 1.5 wdk __BS_TYPENAME(BITS) *a; \
493 1.5 wdk size_t c; \
494 1.5 wdk { \
495 1.5 wdk \
496 1.5 wdk while (c--) \
497 1.5 wdk __BS_FUNCTION(bus_space_write,BYTES)(t, h, o, *a++); \
498 1.1 wdk }
499 1.1 wdk
500 1.5 wdk __bus_space_write_multi(1,8)
501 1.5 wdk __bus_space_write_multi(2,16)
502 1.5 wdk __bus_space_write_multi(4,32)
503 1.5 wdk __bus_space_write_multi(8,64)
504 1.5 wdk
505 1.1 wdk
506 1.1 wdk /*
507 1.20 dsl * void bus_space_write_region_N(bus_space_tag_t tag,
508 1.1 wdk * bus_space_handle_t bsh, bus_size_t offset,
509 1.20 dsl * const u_intN_t *addr, size_t count);
510 1.1 wdk *
511 1.1 wdk * Write `count' 1, 2, 4, or 8 byte quantities from the buffer provided
512 1.1 wdk * to bus space described by tag/handle starting at `offset'.
513 1.1 wdk */
514 1.1 wdk
515 1.5 wdk #define __bus_space_write_region(BYTES,BITS) \
516 1.15 perry static __inline void __BS_FUNCTION(bus_space_write_region,BYTES) \
517 1.20 dsl (bus_space_tag_t, bus_space_handle_t, bus_size_t, \
518 1.20 dsl const __BS_TYPENAME(BITS) *, size_t); \
519 1.5 wdk \
520 1.15 perry static __inline void \
521 1.5 wdk __BS_FUNCTION(bus_space_write_region,BYTES)(t, h, o, a, c) \
522 1.5 wdk bus_space_tag_t t; \
523 1.5 wdk bus_space_handle_t h; \
524 1.5 wdk bus_size_t o; \
525 1.5 wdk const __BS_TYPENAME(BITS) *a; \
526 1.5 wdk size_t c; \
527 1.5 wdk { \
528 1.5 wdk \
529 1.5 wdk while (c--) { \
530 1.5 wdk __BS_FUNCTION(bus_space_write,BYTES)(t, h, o, *a++); \
531 1.5 wdk o += BYTES; \
532 1.1 wdk } \
533 1.1 wdk }
534 1.1 wdk
535 1.5 wdk __bus_space_write_region(1,8)
536 1.5 wdk __bus_space_write_region(2,16)
537 1.5 wdk __bus_space_write_region(4,32)
538 1.5 wdk __bus_space_write_region(8,64)
539 1.5 wdk
540 1.1 wdk
541 1.1 wdk /*
542 1.20 dsl * void bus_space_set_multi_N(bus_space_tag_t tag,
543 1.1 wdk * bus_space_handle_t bsh, bus_size_t offset, u_intN_t val,
544 1.20 dsl * size_t count);
545 1.1 wdk *
546 1.1 wdk * Write the 1, 2, 4, or 8 byte value `val' to bus space described
547 1.1 wdk * by tag/handle/offset `count' times.
548 1.1 wdk */
549 1.1 wdk
550 1.5 wdk #define __bus_space_set_multi(BYTES,BITS) \
551 1.15 perry static __inline void __BS_FUNCTION(bus_space_set_multi,BYTES) \
552 1.20 dsl (bus_space_tag_t, bus_space_handle_t, bus_size_t, \
553 1.20 dsl __BS_TYPENAME(BITS), size_t); \
554 1.5 wdk \
555 1.15 perry static __inline void \
556 1.5 wdk __BS_FUNCTION(bus_space_set_multi,BYTES)(t, h, o, v, c) \
557 1.5 wdk bus_space_tag_t t; \
558 1.5 wdk bus_space_handle_t h; \
559 1.5 wdk bus_size_t o; \
560 1.5 wdk __BS_TYPENAME(BITS) v; \
561 1.5 wdk size_t c; \
562 1.5 wdk { \
563 1.5 wdk \
564 1.5 wdk while (c--) \
565 1.5 wdk __BS_FUNCTION(bus_space_write,BYTES)(t, h, o, v); \
566 1.5 wdk }
567 1.5 wdk
568 1.5 wdk __bus_space_set_multi(1,8)
569 1.5 wdk __bus_space_set_multi(2,16)
570 1.5 wdk __bus_space_set_multi(4,32)
571 1.5 wdk __bus_space_set_multi(8,64)
572 1.5 wdk
573 1.1 wdk
574 1.1 wdk /*
575 1.20 dsl * void bus_space_set_region_N(bus_space_tag_t tag,
576 1.1 wdk * bus_space_handle_t bsh, bus_size_t offset, u_intN_t val,
577 1.20 dsl * size_t count);
578 1.1 wdk *
579 1.1 wdk * Write `count' 1, 2, 4, or 8 byte value `val' to bus space described
580 1.1 wdk * by tag/handle starting at `offset'.
581 1.1 wdk */
582 1.1 wdk
583 1.5 wdk #define __bus_space_set_region(BYTES,BITS) \
584 1.15 perry static __inline void __BS_FUNCTION(bus_space_set_region,BYTES) \
585 1.20 dsl (bus_space_tag_t, bus_space_handle_t, bus_size_t, \
586 1.20 dsl __BS_TYPENAME(BITS), size_t); \
587 1.5 wdk \
588 1.15 perry static __inline void \
589 1.5 wdk __BS_FUNCTION(bus_space_set_region,BYTES)(t, h, o, v, c) \
590 1.5 wdk bus_space_tag_t t; \
591 1.5 wdk bus_space_handle_t h; \
592 1.5 wdk bus_size_t o; \
593 1.5 wdk __BS_TYPENAME(BITS) v; \
594 1.5 wdk size_t c; \
595 1.5 wdk { \
596 1.5 wdk \
597 1.5 wdk while (c--) { \
598 1.5 wdk __BS_FUNCTION(bus_space_write,BYTES)(t, h, o, v); \
599 1.5 wdk o += BYTES; \
600 1.1 wdk } \
601 1.1 wdk }
602 1.1 wdk
603 1.5 wdk __bus_space_set_region(1,8)
604 1.5 wdk __bus_space_set_region(2,16)
605 1.5 wdk __bus_space_set_region(4,32)
606 1.5 wdk __bus_space_set_region(8,64)
607 1.5 wdk
608 1.1 wdk
609 1.1 wdk /*
610 1.20 dsl * void bus_space_copy_region_N(bus_space_tag_t tag,
611 1.1 wdk * bus_space_handle_t bsh1, bus_size_t off1,
612 1.1 wdk * bus_space_handle_t bsh2, bus_size_t off2,
613 1.20 dsl * bus_size_t count);
614 1.1 wdk *
615 1.1 wdk * Copy `count' 1, 2, 4, or 8 byte values from bus space starting
616 1.1 wdk * at tag/bsh1/off1 to bus space starting at tag/bsh2/off2.
617 1.1 wdk */
618 1.1 wdk
619 1.5 wdk #define __bus_space_copy_region(BYTES) \
620 1.15 perry static __inline void __BS_FUNCTION(bus_space_copy_region,BYTES) \
621 1.20 dsl (bus_space_tag_t, \
622 1.5 wdk bus_space_handle_t bsh1, bus_size_t off1, \
623 1.5 wdk bus_space_handle_t bsh2, bus_size_t off2, \
624 1.20 dsl bus_size_t count); \
625 1.5 wdk \
626 1.15 perry static __inline void \
627 1.5 wdk __BS_FUNCTION(bus_space_copy_region,BYTES)(t, h1, o1, h2, o2, c) \
628 1.5 wdk bus_space_tag_t t; \
629 1.5 wdk bus_space_handle_t h1, h2; \
630 1.5 wdk bus_size_t o1, o2, c; \
631 1.5 wdk { \
632 1.5 wdk bus_size_t o; \
633 1.1 wdk \
634 1.5 wdk if ((h1 + o1) >= (h2 + o2)) { \
635 1.1 wdk /* src after dest: copy forward */ \
636 1.5 wdk for (o = 0; c != 0; c--, o += BYTES) \
637 1.5 wdk __BS_FUNCTION(bus_space_write,BYTES)(t, h2, o2 + o, \
638 1.5 wdk __BS_FUNCTION(bus_space_read,BYTES)(t, h1, o1 + o)); \
639 1.1 wdk } else { \
640 1.5 wdk /* dest after src: copy backwards */ \
641 1.5 wdk for (o = (c - 1) * BYTES; c != 0; c--, o -= BYTES) \
642 1.5 wdk __BS_FUNCTION(bus_space_write,BYTES)(t, h2, o2 + o, \
643 1.5 wdk __BS_FUNCTION(bus_space_read,BYTES)(t, h1, o1 + o)); \
644 1.1 wdk } \
645 1.1 wdk }
646 1.1 wdk
647 1.5 wdk __bus_space_copy_region(1)
648 1.5 wdk __bus_space_copy_region(2)
649 1.5 wdk __bus_space_copy_region(4)
650 1.5 wdk __bus_space_copy_region(8)
651 1.5 wdk
652 1.1 wdk
653 1.1 wdk /*
654 1.1 wdk * Operations which handle byte stream data on word access.
655 1.1 wdk *
656 1.1 wdk * These functions are defined to resolve endian mismatch, by either
657 1.1 wdk * - When normal (i.e. stream-less) operations perform byte swap
658 1.1 wdk * to resolve endian mismatch, these functions bypass the byte swap.
659 1.1 wdk * or
660 1.1 wdk * - When bus bridge performs automatic byte swap, these functions
661 1.1 wdk * perform byte swap once more, to cancel the bridge's behavior.
662 1.1 wdk *
663 1.5 wdk * Mips Computer Systems platforms perform harware byte swapping -
664 1.5 wdk * therefore the streaming methods can byte swap as determined from
665 1.5 wdk * the bus space tag settings
666 1.1 wdk *
667 1.1 wdk */
668 1.1 wdk #define __BUS_SPACE_HAS_STREAM_METHODS
669 1.5 wdk
670 1.5 wdk /* Force creation of stream methods using the standard template macros */
671 1.5 wdk #undef __BS_FUNCTION
672 1.5 wdk #define __BS_FUNCTION(func,BYTES) __CONCAT3(func,_stream_,BYTES)
673 1.5 wdk
674 1.5 wdk #define __BS_BSWAP(bst, val, BITS) \
675 1.5 wdk ((bst->bs_bswap) ? __CONCAT(bswap,BITS)(val) : (val))
676 1.5 wdk
677 1.5 wdk
678 1.5 wdk #define __bus_space_read_stream(BYTES,BITS) \
679 1.15 perry static __inline __BS_TYPENAME(BITS) \
680 1.5 wdk __CONCAT(bus_space_read_stream_,BYTES)(bus_space_tag_t bst, \
681 1.5 wdk bus_space_handle_t bsh, bus_size_t offset) \
682 1.5 wdk { \
683 1.5 wdk register __BS_TYPENAME(BITS) val = \
684 1.5 wdk __CONCAT(bus_space_read_,BYTES)(bst, bsh, offset); \
685 1.5 wdk \
686 1.5 wdk return __BS_BSWAP(bst, val, BITS); \
687 1.5 wdk }
688 1.5 wdk
689 1.5 wdk __bus_space_read_stream(2, 16) /* bus_space_read_stream_2 */
690 1.5 wdk __bus_space_read_stream(4, 32) /* bus_space_read_stream_4 */
691 1.5 wdk __bus_space_read_stream(8, 64) /* bus_space_read_stream_8 */
692 1.5 wdk
693 1.5 wdk
694 1.5 wdk #define __bus_space_write_stream(BYTES,BITS) \
695 1.15 perry static __inline void \
696 1.5 wdk __CONCAT(bus_space_write_stream_,BYTES)(bus_space_tag_t bst, \
697 1.5 wdk bus_space_handle_t bsh, \
698 1.5 wdk bus_size_t offset, __CONCAT3(u_int,BITS,_t) data) \
699 1.5 wdk { \
700 1.5 wdk *__BS_ADDR(bst, bsh, offset, BITS, BYTES) = \
701 1.5 wdk __BS_BSWAP(bst, data, BITS); \
702 1.5 wdk wbflush(); \
703 1.5 wdk }
704 1.5 wdk
705 1.5 wdk __bus_space_write_stream(2,16) /* bus_space_write_stream_2 */
706 1.5 wdk __bus_space_write_stream(4,32) /* bus_space_write_stream_4 */
707 1.5 wdk __bus_space_write_stream(8,64) /* bus_space_write_stream_8 */
708 1.5 wdk
709 1.5 wdk __bus_space_read_multi(2,16) /* bus_space_read_multi_stream_2 */
710 1.5 wdk __bus_space_read_multi(4,32) /* bus_space_read_multi_stream_4 */
711 1.5 wdk __bus_space_read_multi(8,64) /* bus_space_read_multi_stream_8 */
712 1.5 wdk
713 1.5 wdk __bus_space_read_region(2,16) /* bus_space_read_region_stream_2 */
714 1.5 wdk __bus_space_read_region(4,32) /* bus_space_read_region_stream_4 */
715 1.5 wdk __bus_space_read_region(8,64) /* bus_space_read_region_stream_8 */
716 1.5 wdk
717 1.5 wdk __bus_space_write_multi(2,16) /* bus_space_write_multi_stream_2 */
718 1.5 wdk __bus_space_write_multi(4,32) /* bus_space_write_multi_stream_4 */
719 1.5 wdk __bus_space_write_multi(8,64) /* bus_space_write_multi_stream_8 */
720 1.5 wdk
721 1.5 wdk __bus_space_write_region(2,16) /* bus_space_write_region_stream_2 */
722 1.5 wdk __bus_space_write_region(4,32) /* bus_space_write_region_stream_4 */
723 1.5 wdk __bus_space_write_region(8,64) /* bus_space_write_region_stream_8 */
724 1.5 wdk
725 1.5 wdk __bus_space_set_multi(2,16) /* bus_space_set_multi_stream_2 */
726 1.5 wdk __bus_space_set_multi(4,32) /* bus_space_set_multi_stream_4 */
727 1.5 wdk __bus_space_set_multi(8,64) /* bus_space_set_multi_stream_8 */
728 1.5 wdk
729 1.5 wdk __bus_space_set_region(2,16) /* bus_space_set_region_stream_2 */
730 1.5 wdk __bus_space_set_region(4,32) /* bus_space_set_region_stream_4 */
731 1.5 wdk __bus_space_set_region(8, 64) /* bus_space_set_region_stream_8 */
732 1.5 wdk
733 1.5 wdk #undef __bus_space_read
734 1.5 wdk #undef __bus_space_write
735 1.5 wdk #undef __bus_space_read_stream
736 1.5 wdk #undef __bus_space_write_stream
737 1.5 wdk #undef __bus_space_read_multi
738 1.5 wdk #undef __bus_space_read_region
739 1.5 wdk #undef __bus_space_write_multi
740 1.5 wdk #undef __bus_space_write_region
741 1.5 wdk #undef __bus_space_set_multi
742 1.5 wdk #undef __bus_space_set_region
743 1.5 wdk #undef __bus_space_copy_region
744 1.5 wdk
745 1.5 wdk #undef __BS_TYPENAME
746 1.5 wdk #undef __BS_OFFSET
747 1.5 wdk #undef __BS_FUNCTION
748 1.5 wdk #undef __BS_ADDR
749 1.1 wdk
750 1.1 wdk /*
751 1.1 wdk * Bus read/write barrier methods.
752 1.1 wdk *
753 1.20 dsl * void bus_space_barrier(bus_space_tag_t tag,
754 1.1 wdk * bus_space_handle_t bsh, bus_size_t offset,
755 1.20 dsl * bus_size_t len, int flags);
756 1.1 wdk *
757 1.1 wdk * On the MIPS, we just flush the write buffer.
758 1.1 wdk */
759 1.1 wdk #define bus_space_barrier(t, h, o, l, f) \
760 1.16 tsutsui ((void)((void)(t), (void)(h), (void)(o), (void)(l), (void)(f), \
761 1.16 tsutsui wbflush()))
762 1.1 wdk
763 1.1 wdk #define BUS_SPACE_BARRIER_READ 0x01
764 1.1 wdk #define BUS_SPACE_BARRIER_WRITE 0x02
765 1.1 wdk
766 1.1 wdk /*
767 1.1 wdk * Flags used in various bus DMA methods.
768 1.1 wdk */
769 1.10 kent #define BUS_DMA_WAITOK 0x000 /* safe to sleep (pseudo-flag) */
770 1.10 kent #define BUS_DMA_NOWAIT 0x001 /* not safe to sleep */
771 1.10 kent #define BUS_DMA_ALLOCNOW 0x002 /* perform resource allocation now */
772 1.10 kent #define BUS_DMA_COHERENT 0x004 /* hint: map memory DMA coherent */
773 1.6 thorpej #define BUS_DMA_STREAMING 0x008 /* hint: sequential, unidirectional */
774 1.10 kent #define BUS_DMA_BUS1 0x010 /* placeholders for bus functions... */
775 1.10 kent #define BUS_DMA_BUS2 0x020
776 1.10 kent #define BUS_DMA_BUS3 0x040
777 1.10 kent #define BUS_DMA_BUS4 0x080
778 1.6 thorpej #define BUS_DMA_READ 0x100 /* mapping is device -> memory only */
779 1.6 thorpej #define BUS_DMA_WRITE 0x200 /* mapping is memory -> device only */
780 1.10 kent #define BUS_DMA_NOCACHE 0x400 /* hint: map non-cached memory */
781 1.1 wdk
782 1.9 simonb #define MIPSCO_DMAMAP_COHERENT 0x10000 /* no cache flush necessary on sync */
783 1.1 wdk
784 1.1 wdk /* Forwards needed by prototypes below. */
785 1.1 wdk struct mbuf;
786 1.1 wdk struct uio;
787 1.1 wdk
788 1.1 wdk /*
789 1.1 wdk * Operations performed by bus_dmamap_sync().
790 1.1 wdk */
791 1.1 wdk #define BUS_DMASYNC_PREREAD 0x01 /* pre-read synchronization */
792 1.1 wdk #define BUS_DMASYNC_POSTREAD 0x02 /* post-read synchronization */
793 1.1 wdk #define BUS_DMASYNC_PREWRITE 0x04 /* pre-write synchronization */
794 1.1 wdk #define BUS_DMASYNC_POSTWRITE 0x08 /* post-write synchronization */
795 1.1 wdk
796 1.1 wdk typedef struct mipsco_bus_dma_tag *bus_dma_tag_t;
797 1.1 wdk typedef struct mipsco_bus_dmamap *bus_dmamap_t;
798 1.11 fvdl
799 1.11 fvdl #define BUS_DMA_TAG_VALID(t) ((t) != (bus_dma_tag_t)0)
800 1.1 wdk
801 1.1 wdk /*
802 1.1 wdk * bus_dma_segment_t
803 1.1 wdk *
804 1.1 wdk * Describes a single contiguous DMA transaction. Values
805 1.1 wdk * are suitable for programming into DMA registers.
806 1.1 wdk */
807 1.1 wdk struct mipsco_bus_dma_segment {
808 1.1 wdk /*
809 1.1 wdk * PUBLIC MEMBERS: these are used by device drivers.
810 1.1 wdk */
811 1.1 wdk bus_addr_t ds_addr; /* DMA address */
812 1.1 wdk bus_size_t ds_len; /* length of transfer */
813 1.1 wdk /*
814 1.1 wdk * PRIVATE MEMBERS for the DMA back-end.: not for use by drivers.
815 1.1 wdk */
816 1.1 wdk vaddr_t _ds_paddr; /* CPU physical address */
817 1.1 wdk vaddr_t _ds_vaddr; /* virtual address, 0 if invalid */
818 1.1 wdk };
819 1.1 wdk typedef struct mipsco_bus_dma_segment bus_dma_segment_t;
820 1.1 wdk
821 1.1 wdk /*
822 1.1 wdk * bus_dma_tag_t
823 1.1 wdk *
824 1.1 wdk * A machine-dependent opaque type describing the implementation of
825 1.1 wdk * DMA for a given bus.
826 1.1 wdk */
827 1.1 wdk
828 1.1 wdk struct mipsco_bus_dma_tag {
829 1.1 wdk bus_addr_t dma_offset;
830 1.1 wdk
831 1.1 wdk /*
832 1.1 wdk * DMA mapping methods.
833 1.1 wdk */
834 1.20 dsl int (*_dmamap_create)(bus_dma_tag_t, bus_size_t, int,
835 1.20 dsl bus_size_t, bus_size_t, int, bus_dmamap_t *);
836 1.20 dsl void (*_dmamap_destroy)(bus_dma_tag_t, bus_dmamap_t);
837 1.20 dsl int (*_dmamap_load)(bus_dma_tag_t, bus_dmamap_t, void *,
838 1.20 dsl bus_size_t, struct proc *, int);
839 1.20 dsl int (*_dmamap_load_mbuf)(bus_dma_tag_t, bus_dmamap_t,
840 1.20 dsl struct mbuf *, int);
841 1.20 dsl int (*_dmamap_load_uio)(bus_dma_tag_t, bus_dmamap_t,
842 1.20 dsl struct uio *, int);
843 1.20 dsl int (*_dmamap_load_raw)(bus_dma_tag_t, bus_dmamap_t,
844 1.20 dsl bus_dma_segment_t *, int, bus_size_t, int);
845 1.20 dsl void (*_dmamap_unload)(bus_dma_tag_t, bus_dmamap_t);
846 1.20 dsl void (*_dmamap_sync)(bus_dma_tag_t, bus_dmamap_t,
847 1.20 dsl bus_addr_t, bus_size_t, int);
848 1.1 wdk
849 1.1 wdk /*
850 1.1 wdk * DMA memory utility functions.
851 1.1 wdk */
852 1.20 dsl int (*_dmamem_alloc)(bus_dma_tag_t, bus_size_t, bus_size_t,
853 1.20 dsl bus_size_t, bus_dma_segment_t *, int, int *, int);
854 1.20 dsl void (*_dmamem_free)(bus_dma_tag_t,
855 1.20 dsl bus_dma_segment_t *, int);
856 1.20 dsl int (*_dmamem_map)(bus_dma_tag_t, bus_dma_segment_t *,
857 1.20 dsl int, size_t, void **, int);
858 1.20 dsl void (*_dmamem_unmap)(bus_dma_tag_t, void *, size_t);
859 1.20 dsl paddr_t (*_dmamem_mmap)(bus_dma_tag_t, bus_dma_segment_t *,
860 1.20 dsl int, off_t, int, int);
861 1.1 wdk };
862 1.1 wdk
863 1.1 wdk #define bus_dmamap_create(t, s, n, m, b, f, p) \
864 1.1 wdk (*(t)->_dmamap_create)((t), (s), (n), (m), (b), (f), (p))
865 1.1 wdk #define bus_dmamap_destroy(t, p) \
866 1.1 wdk (*(t)->_dmamap_destroy)((t), (p))
867 1.1 wdk #define bus_dmamap_load(t, m, b, s, p, f) \
868 1.1 wdk (*(t)->_dmamap_load)((t), (m), (b), (s), (p), (f))
869 1.1 wdk #define bus_dmamap_load_mbuf(t, m, b, f) \
870 1.1 wdk (*(t)->_dmamap_load_mbuf)((t), (m), (b), (f))
871 1.1 wdk #define bus_dmamap_load_uio(t, m, u, f) \
872 1.1 wdk (*(t)->_dmamap_load_uio)((t), (m), (u), (f))
873 1.1 wdk #define bus_dmamap_load_raw(t, m, sg, n, s, f) \
874 1.1 wdk (*(t)->_dmamap_load_raw)((t), (m), (sg), (n), (s), (f))
875 1.1 wdk #define bus_dmamap_unload(t, p) \
876 1.1 wdk (*(t)->_dmamap_unload)((t), (p))
877 1.1 wdk #define bus_dmamap_sync(t, p, o, l, ops) \
878 1.1 wdk (*(t)->_dmamap_sync)((t), (p), (o), (l), (ops))
879 1.1 wdk #define bus_dmamem_alloc(t, s, a, b, sg, n, r, f) \
880 1.1 wdk (*(t)->_dmamem_alloc)((t), (s), (a), (b), (sg), (n), (r), (f))
881 1.1 wdk #define bus_dmamem_free(t, sg, n) \
882 1.1 wdk (*(t)->_dmamem_free)((t), (sg), (n))
883 1.1 wdk #define bus_dmamem_map(t, sg, n, s, k, f) \
884 1.1 wdk (*(t)->_dmamem_map)((t), (sg), (n), (s), (k), (f))
885 1.1 wdk #define bus_dmamem_unmap(t, k, s) \
886 1.1 wdk (*(t)->_dmamem_unmap)((t), (k), (s))
887 1.1 wdk #define bus_dmamem_mmap(t, sg, n, o, p, f) \
888 1.1 wdk (*(t)->_dmamem_mmap)((t), (sg), (n), (o), (p), (f))
889 1.1 wdk
890 1.17 mrg #define bus_dmatag_subregion(t, mna, mxa, nt, f) EOPNOTSUPP
891 1.17 mrg #define bus_dmatag_destroy(t)
892 1.17 mrg
893 1.1 wdk /*
894 1.1 wdk * bus_dmamap_t
895 1.1 wdk *
896 1.1 wdk * Describes a DMA mapping.
897 1.1 wdk */
898 1.1 wdk struct mipsco_bus_dmamap {
899 1.1 wdk /*
900 1.1 wdk * PRIVATE MEMBERS: not for use by machine-independent code.
901 1.1 wdk */
902 1.1 wdk bus_size_t _dm_size; /* largest DMA transfer mappable */
903 1.1 wdk int _dm_segcnt; /* number of segs this map can map */
904 1.12 matt bus_size_t _dm_maxmaxsegsz; /* fixed largest possible segment */
905 1.1 wdk bus_size_t _dm_boundary; /* don't cross this */
906 1.1 wdk int _dm_flags; /* misc. flags */
907 1.1 wdk
908 1.1 wdk /*
909 1.1 wdk * Private cookie to be used by the DMA back-end.
910 1.1 wdk */
911 1.1 wdk void *_dm_cookie;
912 1.1 wdk
913 1.1 wdk /*
914 1.1 wdk * PUBLIC MEMBERS: these are used by machine-independent code.
915 1.1 wdk */
916 1.12 matt bus_size_t dm_maxsegsz; /* largest possible segment */
917 1.1 wdk bus_size_t dm_mapsize; /* size of the mapping */
918 1.1 wdk int dm_nsegs; /* # valid segments in mapping */
919 1.1 wdk bus_dma_segment_t dm_segs[1]; /* segments; variable length */
920 1.1 wdk };
921 1.1 wdk
922 1.1 wdk #ifdef _MIPSCO_BUS_DMA_PRIVATE
923 1.20 dsl int _bus_dmamap_create(bus_dma_tag_t, bus_size_t, int, bus_size_t,
924 1.20 dsl bus_size_t, int, bus_dmamap_t *);
925 1.20 dsl void _bus_dmamap_destroy(bus_dma_tag_t, bus_dmamap_t);
926 1.20 dsl int _bus_dmamap_load(bus_dma_tag_t, bus_dmamap_t, void *,
927 1.20 dsl bus_size_t, struct proc *, int);
928 1.20 dsl int _bus_dmamap_load_mbuf(bus_dma_tag_t, bus_dmamap_t,
929 1.20 dsl struct mbuf *, int);
930 1.20 dsl int _bus_dmamap_load_uio(bus_dma_tag_t, bus_dmamap_t,
931 1.20 dsl struct uio *, int);
932 1.20 dsl int _bus_dmamap_load_raw(bus_dma_tag_t, bus_dmamap_t,
933 1.20 dsl bus_dma_segment_t *, int, bus_size_t, int);
934 1.20 dsl void _bus_dmamap_unload(bus_dma_tag_t, bus_dmamap_t);
935 1.20 dsl void _bus_dmamap_sync(bus_dma_tag_t, bus_dmamap_t, bus_addr_t,
936 1.20 dsl bus_size_t, int);
937 1.1 wdk
938 1.20 dsl int _bus_dmamem_alloc(bus_dma_tag_t tag, bus_size_t size,
939 1.1 wdk bus_size_t alignment, bus_size_t boundary,
940 1.20 dsl bus_dma_segment_t *segs, int nsegs, int *rsegs, int flags);
941 1.20 dsl int _bus_dmamem_alloc_range(bus_dma_tag_t tag, bus_size_t size,
942 1.1 wdk bus_size_t alignment, bus_size_t boundary,
943 1.1 wdk bus_dma_segment_t *segs, int nsegs, int *rsegs, int flags,
944 1.20 dsl paddr_t low, paddr_t high);
945 1.20 dsl void _bus_dmamem_free(bus_dma_tag_t tag, bus_dma_segment_t *segs,
946 1.20 dsl int nsegs);
947 1.20 dsl int _bus_dmamem_map(bus_dma_tag_t tag, bus_dma_segment_t *segs,
948 1.20 dsl int nsegs, size_t size, void **kvap, int flags);
949 1.20 dsl void _bus_dmamem_unmap(bus_dma_tag_t tag, void *kva,
950 1.20 dsl size_t size);
951 1.20 dsl paddr_t _bus_dmamem_mmap(bus_dma_tag_t tag, bus_dma_segment_t *segs,
952 1.20 dsl int nsegs, off_t off, int prot, int flags);
953 1.1 wdk
954 1.20 dsl int _bus_dmamem_alloc_range(bus_dma_tag_t tag, bus_size_t size,
955 1.1 wdk bus_size_t alignment, bus_size_t boundary,
956 1.1 wdk bus_dma_segment_t *segs, int nsegs, int *rsegs, int flags,
957 1.20 dsl paddr_t low, paddr_t high);
958 1.1 wdk #endif /* _MIPSCO_BUS_DMA_PRIVATE */
959 1.1 wdk
960 1.20 dsl void _bus_dma_tag_init(bus_dma_tag_t tag);
961 1.1 wdk
962 1.1 wdk #endif /* _KERNEL */
963 1.1 wdk #endif /* _MIPSCO_BUS_H_ */
964