bus.h revision 1.24 1 1.24 andvar /* $NetBSD: bus.h,v 1.24 2023/10/08 22:10:49 andvar Exp $ */
2 1.4 thorpej
3 1.1 wdk /*-
4 1.4 thorpej * Copyright (c) 1996, 1997, 1998, 2001 The NetBSD Foundation, Inc.
5 1.1 wdk * All rights reserved.
6 1.1 wdk *
7 1.1 wdk * This code is derived from software contributed to The NetBSD Foundation
8 1.1 wdk * by Jason R. Thorpe of the Numerical Aerospace Simulation Facility,
9 1.1 wdk * NASA Ames Research Center.
10 1.1 wdk *
11 1.1 wdk * Redistribution and use in source and binary forms, with or without
12 1.1 wdk * modification, are permitted provided that the following conditions
13 1.1 wdk * are met:
14 1.1 wdk * 1. Redistributions of source code must retain the above copyright
15 1.1 wdk * notice, this list of conditions and the following disclaimer.
16 1.1 wdk * 2. Redistributions in binary form must reproduce the above copyright
17 1.1 wdk * notice, this list of conditions and the following disclaimer in the
18 1.1 wdk * documentation and/or other materials provided with the distribution.
19 1.1 wdk *
20 1.1 wdk * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
21 1.1 wdk * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
22 1.1 wdk * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
23 1.1 wdk * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
24 1.1 wdk * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
25 1.1 wdk * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
26 1.1 wdk * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
27 1.1 wdk * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
28 1.1 wdk * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
29 1.1 wdk * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
30 1.1 wdk * POSSIBILITY OF SUCH DAMAGE.
31 1.1 wdk */
32 1.1 wdk
33 1.1 wdk /*
34 1.1 wdk * Copyright (c) 1997 Per Fogelstrom. All rights reserved.
35 1.1 wdk * Copyright (c) 1996 Niklas Hallqvist. All rights reserved.
36 1.1 wdk *
37 1.1 wdk * Redistribution and use in source and binary forms, with or without
38 1.1 wdk * modification, are permitted provided that the following conditions
39 1.1 wdk * are met:
40 1.1 wdk * 1. Redistributions of source code must retain the above copyright
41 1.1 wdk * notice, this list of conditions and the following disclaimer.
42 1.1 wdk * 2. Redistributions in binary form must reproduce the above copyright
43 1.1 wdk * notice, this list of conditions and the following disclaimer in the
44 1.1 wdk * documentation and/or other materials provided with the distribution.
45 1.1 wdk * 3. All advertising materials mentioning features or use of this software
46 1.1 wdk * must display the following acknowledgement:
47 1.1 wdk * This product includes software developed by Christopher G. Demetriou
48 1.1 wdk * for the NetBSD Project.
49 1.1 wdk * 4. The name of the author may not be used to endorse or promote products
50 1.1 wdk * derived from this software without specific prior written permission
51 1.1 wdk *
52 1.1 wdk * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
53 1.1 wdk * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
54 1.1 wdk * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
55 1.1 wdk * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
56 1.1 wdk * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
57 1.1 wdk * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
58 1.1 wdk * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
59 1.1 wdk * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
60 1.1 wdk * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
61 1.1 wdk * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
62 1.1 wdk */
63 1.1 wdk
64 1.1 wdk #ifndef _MIPSCO_BUS_H_
65 1.1 wdk #define _MIPSCO_BUS_H_
66 1.1 wdk #ifdef _KERNEL
67 1.1 wdk
68 1.1 wdk #include <mips/locore.h>
69 1.1 wdk
70 1.1 wdk #ifdef BUS_SPACE_DEBUG
71 1.1 wdk #include <sys/systm.h> /* for printf() prototype */
72 1.1 wdk /*
73 1.1 wdk * Macros for checking the aligned-ness of pointers passed to bus
74 1.1 wdk * space ops. Strict alignment is required by the MIPS architecture,
75 1.1 wdk * and a trap will occur if unaligned access is performed. These
76 1.1 wdk * may aid in the debugging of a broken device driver by displaying
77 1.1 wdk * useful information about the problem.
78 1.1 wdk */
79 1.1 wdk #define __BUS_SPACE_ALIGNED_ADDRESS(p, t) \
80 1.1 wdk ((((u_long)(p)) & (sizeof(t)-1)) == 0)
81 1.1 wdk
82 1.1 wdk #define __BUS_SPACE_ADDRESS_SANITY(p, t, d) \
83 1.1 wdk ({ \
84 1.1 wdk if (__BUS_SPACE_ALIGNED_ADDRESS((p), t) == 0) { \
85 1.1 wdk printf("%s 0x%lx not aligned to %d bytes %s:%d\n", \
86 1.1 wdk d, (u_long)(p), sizeof(t), __FILE__, __LINE__); \
87 1.1 wdk } \
88 1.1 wdk (void) 0; \
89 1.1 wdk })
90 1.1 wdk
91 1.1 wdk #define BUS_SPACE_ALIGNED_POINTER(p, t) __BUS_SPACE_ALIGNED_ADDRESS(p, t)
92 1.1 wdk #else
93 1.1 wdk #define __BUS_SPACE_ADDRESS_SANITY(p,t,d) (void) 0
94 1.1 wdk #define BUS_SPACE_ALIGNED_POINTER(p, t) ALIGNED_POINTER(p, t)
95 1.1 wdk #endif /* BUS_SPACE_DEBUG */
96 1.1 wdk
97 1.1 wdk /*
98 1.1 wdk * Bus address and size types
99 1.1 wdk */
100 1.1 wdk typedef u_long bus_addr_t;
101 1.1 wdk typedef u_long bus_size_t;
102 1.1 wdk
103 1.22 skrll #define PRIxBUSADDR "lx"
104 1.22 skrll #define PRIxBUSSIZE "lx"
105 1.22 skrll #define PRIuBUSSIZE "lu"
106 1.22 skrll
107 1.1 wdk /*
108 1.1 wdk * Access methods for bus resources and address space.
109 1.1 wdk */
110 1.1 wdk typedef u_int32_t bus_space_handle_t;
111 1.22 skrll
112 1.22 skrll #define PRIxBSH "lx"
113 1.22 skrll
114 1.1 wdk typedef struct mipsco_bus_space *bus_space_tag_t;
115 1.1 wdk
116 1.1 wdk struct mipsco_bus_space {
117 1.1 wdk const char *bs_name;
118 1.1 wdk struct extent *bs_extent;
119 1.1 wdk bus_addr_t bs_start;
120 1.1 wdk bus_size_t bs_size;
121 1.1 wdk
122 1.1 wdk paddr_t bs_pbase;
123 1.1 wdk vaddr_t bs_vbase;
124 1.1 wdk
125 1.5 wdk u_int8_t bs_stride; /* log2(stride) */
126 1.5 wdk u_int8_t bs_bswap; /* byte swap in stream methods */
127 1.5 wdk
128 1.5 wdk u_int8_t bs_offset_1;
129 1.5 wdk u_int8_t bs_offset_2;
130 1.5 wdk u_int8_t bs_offset_4;
131 1.5 wdk u_int8_t bs_offset_8;
132 1.1 wdk
133 1.1 wdk /* compose a bus_space handle from tag/handle/addr/size/flags (MD) */
134 1.20 dsl int (*bs_compose_handle)(bus_space_tag_t, bus_addr_t,
135 1.20 dsl bus_size_t, int, bus_space_handle_t *);
136 1.1 wdk
137 1.1 wdk /* dispose a bus_space handle (MD) */
138 1.20 dsl int (*bs_dispose_handle)(bus_space_tag_t, bus_space_handle_t,
139 1.20 dsl bus_size_t);
140 1.1 wdk
141 1.1 wdk /* convert bus_space tag/handle to physical address (MD) */
142 1.20 dsl int (*bs_paddr)(bus_space_tag_t, bus_space_handle_t,
143 1.20 dsl paddr_t *);
144 1.1 wdk
145 1.1 wdk /* mapping/unmapping */
146 1.20 dsl int (*bs_map)(bus_space_tag_t, bus_addr_t, bus_size_t, int,
147 1.20 dsl bus_space_handle_t *);
148 1.20 dsl void (*bs_unmap)(bus_space_tag_t, bus_space_handle_t,
149 1.20 dsl bus_size_t);
150 1.20 dsl int (*bs_subregion)(bus_space_tag_t, bus_space_handle_t,
151 1.20 dsl bus_size_t, bus_size_t, bus_space_handle_t *);
152 1.20 dsl paddr_t (*bs_mmap)(bus_space_tag_t, bus_addr_t, off_t, int, int);
153 1.7 wdk
154 1.1 wdk
155 1.1 wdk /* allocation/deallocation */
156 1.20 dsl int (*bs_alloc)(bus_space_tag_t, bus_addr_t, bus_addr_t,
157 1.1 wdk bus_size_t, bus_size_t, bus_size_t, int,
158 1.20 dsl bus_addr_t *, bus_space_handle_t *);
159 1.20 dsl void (*bs_free)(bus_space_tag_t, bus_space_handle_t,
160 1.20 dsl bus_size_t);
161 1.1 wdk
162 1.2 wdk /* interrupt attach */
163 1.20 dsl void (*bs_intr_establish)(
164 1.2 wdk bus_space_tag_t,
165 1.2 wdk int, /*bus-specific intr*/
166 1.2 wdk int, /*priority/class*/
167 1.2 wdk int, /*flags*/
168 1.20 dsl int (*)(void *), /*handler*/
169 1.20 dsl void *); /*handler arg*/
170 1.2 wdk
171 1.1 wdk void *bs_aux;
172 1.1 wdk };
173 1.1 wdk
174 1.1 wdk /* vaddr_t argument of mipsco_bus_space_init() */
175 1.1 wdk #define MIPSCO_BUS_SPACE_UNMAPPED ((vaddr_t)0)
176 1.1 wdk
177 1.1 wdk /* machine dependent utility function for bus_space users */
178 1.20 dsl void mipsco_bus_space_malloc_set_safe(void);
179 1.20 dsl void mipsco_bus_space_init(bus_space_tag_t, const char *,
180 1.20 dsl paddr_t, vaddr_t, bus_addr_t, bus_size_t);
181 1.20 dsl void mipsco_bus_space_init_extent(bus_space_tag_t, void *, size_t);
182 1.20 dsl void mipsco_bus_space_set_aligned_stride(bus_space_tag_t, unsigned int);
183 1.20 dsl void mipsco_sparse_bus_space_init(bus_space_tag_t, const char *,
184 1.20 dsl paddr_t, bus_addr_t, bus_size_t);
185 1.20 dsl void mipsco_large_bus_space_init(bus_space_tag_t, const char *,
186 1.20 dsl paddr_t, bus_addr_t, bus_size_t);
187 1.1 wdk
188 1.1 wdk /* machine dependent utility function for bus_space implementations */
189 1.20 dsl int mipsco_bus_space_extent_malloc_flag(void);
190 1.1 wdk
191 1.1 wdk /* these are provided for subclasses which override base bus_space. */
192 1.1 wdk
193 1.20 dsl int mipsco_bus_space_compose_handle(bus_space_tag_t,
194 1.20 dsl bus_addr_t, bus_size_t, int, bus_space_handle_t *);
195 1.20 dsl int mipsco_bus_space_dispose_handle(bus_space_tag_t,
196 1.20 dsl bus_space_handle_t, bus_size_t);
197 1.20 dsl int mipsco_bus_space_paddr(bus_space_tag_t,
198 1.20 dsl bus_space_handle_t, paddr_t *);
199 1.20 dsl
200 1.20 dsl int mipsco_sparse_bus_space_compose_handle(bus_space_tag_t,
201 1.20 dsl bus_addr_t, bus_size_t, int, bus_space_handle_t *);
202 1.20 dsl int mipsco_sparse_bus_space_dispose_handle(bus_space_tag_t,
203 1.20 dsl bus_space_handle_t, bus_size_t);
204 1.20 dsl int mipsco_sparse_bus_space_paddr(bus_space_tag_t,
205 1.20 dsl bus_space_handle_t, paddr_t *);
206 1.20 dsl
207 1.20 dsl int mipsco_bus_space_map(bus_space_tag_t, bus_addr_t, bus_size_t, int,
208 1.20 dsl bus_space_handle_t *);
209 1.20 dsl void mipsco_bus_space_unmap(bus_space_tag_t, bus_space_handle_t,
210 1.20 dsl bus_size_t);
211 1.20 dsl int mipsco_bus_space_subregion(bus_space_tag_t, bus_space_handle_t,
212 1.20 dsl bus_size_t, bus_size_t, bus_space_handle_t *);
213 1.20 dsl paddr_t mipsco_bus_space_mmap(bus_space_tag_t, bus_addr_t, off_t,
214 1.20 dsl int, int);
215 1.20 dsl int mipsco_bus_space_alloc(bus_space_tag_t, bus_addr_t, bus_addr_t,
216 1.1 wdk bus_size_t, bus_size_t, bus_size_t, int, bus_addr_t *,
217 1.20 dsl bus_space_handle_t *);
218 1.1 wdk #define mipsco_bus_space_free mipsco_bus_space_unmap
219 1.1 wdk
220 1.1 wdk /*
221 1.20 dsl * int bus_space_compose_handle(bus_space_tag_t t, bus_addr_t addr,
222 1.20 dsl * bus_size_t size, int flags, bus_space_handle_t *bshp);
223 1.1 wdk *
224 1.1 wdk * MACHINE DEPENDENT, NOT PORTABLE INTERFACE:
225 1.1 wdk * Compose a bus_space handle from tag/handle/addr/size/flags.
226 1.1 wdk * A helper function for bus_space_map()/bus_space_alloc() implementation.
227 1.1 wdk */
228 1.1 wdk #define bus_space_compose_handle(bst, addr, size, flags, bshp) \
229 1.1 wdk (*(bst)->bs_compose_handle)(bst, addr, size, flags, bshp)
230 1.1 wdk
231 1.1 wdk /*
232 1.20 dsl * int bus_space_dispose_handle(bus_space_tag_t t, bus_addr_t addr,
233 1.20 dsl * bus_space_handle_t bsh, bus_size_t size);
234 1.1 wdk *
235 1.1 wdk * MACHINE DEPENDENT, NOT PORTABLE INTERFACE:
236 1.1 wdk * Dispose a bus_space handle.
237 1.1 wdk * A helper function for bus_space_unmap()/bus_space_free() implementation.
238 1.1 wdk */
239 1.1 wdk #define bus_space_dispose_handle(bst, bsh, size) \
240 1.1 wdk (*(bst)->bs_dispose_handle)(bst, bsh, size)
241 1.1 wdk
242 1.1 wdk /*
243 1.20 dsl * int bus_space_paddr(bus_space_tag_t tag,
244 1.20 dsl * bus_space_handle_t bsh, paddr_t *pap);
245 1.1 wdk *
246 1.1 wdk * MACHINE DEPENDENT, NOT PORTABLE INTERFACE:
247 1.1 wdk * (cannot be implemented on e.g. I/O space on i386, non-linear space on alpha)
248 1.1 wdk * Return physical address of a region.
249 1.1 wdk * A helper function for device mmap entry.
250 1.1 wdk */
251 1.1 wdk #define bus_space_paddr(bst, bsh, pap) \
252 1.1 wdk (*(bst)->bs_paddr)(bst, bsh, pap)
253 1.1 wdk
254 1.1 wdk /*
255 1.20 dsl * void *bus_space_vaddr(bus_space_tag_t, bus_space_handle_t);
256 1.1 wdk *
257 1.1 wdk * Get the kernel virtual address for the mapped bus space.
258 1.1 wdk * Only allowed for regions mapped with BUS_SPACE_MAP_LINEAR.
259 1.1 wdk * (XXX not enforced)
260 1.1 wdk */
261 1.1 wdk #define bus_space_vaddr(bst, bsh) \
262 1.1 wdk ((void *)(bsh))
263 1.7 wdk
264 1.7 wdk /*
265 1.20 dsl * paddr_t bus_space_mmap(bus_space_tag_t, bus_addr_t, off_t,
266 1.20 dsl * int, int);
267 1.7 wdk *
268 1.7 wdk * Mmap bus space on behalf of the user.
269 1.7 wdk */
270 1.7 wdk #define bus_space_mmap(bst, addr, off, prot, flags) \
271 1.7 wdk (*(bst)->bs_mmap)((bst), (addr), (off), (prot), (flags))
272 1.1 wdk
273 1.1 wdk /*
274 1.20 dsl * int bus_space_map(bus_space_tag_t t, bus_addr_t addr,
275 1.20 dsl * bus_size_t size, int flags, bus_space_handle_t *bshp);
276 1.1 wdk *
277 1.1 wdk * Map a region of bus space.
278 1.1 wdk */
279 1.1 wdk
280 1.1 wdk #define BUS_SPACE_MAP_CACHEABLE 0x01
281 1.1 wdk #define BUS_SPACE_MAP_LINEAR 0x02
282 1.1 wdk #define BUS_SPACE_MAP_PREFETCHABLE 0x04
283 1.1 wdk
284 1.1 wdk #define bus_space_map(t, a, s, f, hp) \
285 1.1 wdk (*(t)->bs_map)((t), (a), (s), (f), (hp))
286 1.1 wdk
287 1.1 wdk /*
288 1.20 dsl * void bus_space_unmap(bus_space_tag_t t,
289 1.20 dsl * bus_space_handle_t bsh, bus_size_t size);
290 1.1 wdk *
291 1.1 wdk * Unmap a region of bus space.
292 1.1 wdk */
293 1.1 wdk
294 1.1 wdk #define bus_space_unmap(t, h, s) \
295 1.1 wdk (*(t)->bs_unmap)((t), (h), (s))
296 1.1 wdk
297 1.1 wdk /*
298 1.20 dsl * int bus_space_subregion(bus_space_tag_t t,
299 1.1 wdk * bus_space_handle_t bsh, bus_size_t offset, bus_size_t size,
300 1.20 dsl * bus_space_handle_t *nbshp);
301 1.1 wdk *
302 1.1 wdk * Get a new handle for a subregion of an already-mapped area of bus space.
303 1.1 wdk */
304 1.1 wdk
305 1.1 wdk #define bus_space_subregion(t, h, o, s, hp) \
306 1.1 wdk (*(t)->bs_subregion)((t), (h), (o), (s), (hp))
307 1.1 wdk
308 1.1 wdk /*
309 1.20 dsl * int bus_space_alloc(bus_space_tag_t t, bus_addr_t, rstart,
310 1.1 wdk * bus_addr_t rend, bus_size_t size, bus_size_t align,
311 1.1 wdk * bus_size_t boundary, int flags, bus_addr_t *addrp,
312 1.20 dsl * bus_space_handle_t *bshp);
313 1.1 wdk *
314 1.1 wdk * Allocate a region of bus space.
315 1.1 wdk */
316 1.1 wdk
317 1.1 wdk #define bus_space_alloc(t, rs, re, s, a, b, f, ap, hp) \
318 1.1 wdk (*(t)->bs_alloc)((t), (rs), (re), (s), (a), (b), (f), (ap), (hp))
319 1.1 wdk
320 1.1 wdk /*
321 1.20 dsl * int bus_space_free(bus_space_tag_t t,
322 1.20 dsl * bus_space_handle_t bsh, bus_size_t size);
323 1.1 wdk *
324 1.1 wdk * Free a region of bus space.
325 1.1 wdk */
326 1.1 wdk
327 1.1 wdk #define bus_space_free(t, h, s) \
328 1.1 wdk (*(t)->bs_free)((t), (h), (s))
329 1.2 wdk
330 1.2 wdk /*
331 1.20 dsl * void bus_intr_establish(bus_space_tag_t bst,
332 1.20 dsl * int level, int pri, int flags, int (*func)(void *)
333 1.20 dsl * void *arg);
334 1.2 wdk *
335 1.2 wdk * Attach interrupt handler and softc argument
336 1.2 wdk */
337 1.2 wdk
338 1.2 wdk #define bus_intr_establish(t, i, c, f, ihf, iha) \
339 1.2 wdk (*(t)->bs_intr_establish)((t), (i), (c), (f), (ihf), (iha))
340 1.1 wdk
341 1.5 wdk
342 1.5 wdk /*
343 1.5 wdk * Utility macros; do not use outside this file.
344 1.5 wdk */
345 1.24 andvar #define __BS_TYPENAME(BITS) __CONCAT3(uint,BITS,_t)
346 1.5 wdk #define __BS_OFFSET(t, o, BYTES) ((o) << (t)->bs_stride)
347 1.5 wdk #define __BS_FUNCTION(func,BYTES) __CONCAT3(func,_,BYTES)
348 1.5 wdk
349 1.5 wdk /*
350 1.5 wdk * Calculate the target address using the bus_space parameters
351 1.5 wdk */
352 1.5 wdk #define __BS_ADDR(t, h, offset, BITS, BYTES) \
353 1.5 wdk ((volatile __CONCAT3(u_int,BITS,_t) *) \
354 1.5 wdk ((h) + __BS_OFFSET(t, offset, BYTES) + \
355 1.5 wdk (t)->__CONCAT(bs_offset_,BYTES)))
356 1.5 wdk
357 1.1 wdk /*
358 1.20 dsl * u_intN_t bus_space_read_N(bus_space_tag_t tag,
359 1.20 dsl * bus_space_handle_t bsh, bus_size_t offset);
360 1.1 wdk *
361 1.1 wdk * Read a 1, 2, 4, or 8 byte quantity from bus space
362 1.1 wdk * described by tag/handle/offset.
363 1.1 wdk */
364 1.1 wdk
365 1.5 wdk #define __bus_space_read(BYTES,BITS) \
366 1.15 perry static __inline __CONCAT3(u_int,BITS,_t) \
367 1.1 wdk __CONCAT(bus_space_read_,BYTES)(bus_space_tag_t bst, \
368 1.1 wdk bus_space_handle_t bsh, bus_size_t offset) \
369 1.1 wdk { \
370 1.5 wdk return (*__BS_ADDR(bst, bsh, offset, BITS, BYTES)); \
371 1.1 wdk }
372 1.1 wdk
373 1.5 wdk __bus_space_read(1,8)
374 1.5 wdk __bus_space_read(2,16)
375 1.5 wdk __bus_space_read(4,32)
376 1.5 wdk __bus_space_read(8,64)
377 1.1 wdk
378 1.1 wdk /*
379 1.20 dsl * void bus_space_read_multi_N(bus_space_tag_t tag,
380 1.1 wdk * bus_space_handle_t bsh, bus_size_t offset,
381 1.20 dsl * u_intN_t *addr, size_t count);
382 1.1 wdk *
383 1.1 wdk * Read `count' 1, 2, 4, or 8 byte quantities from bus space
384 1.1 wdk * described by tag/handle/offset and copy into buffer provided.
385 1.1 wdk */
386 1.1 wdk
387 1.5 wdk #define __bus_space_read_multi(BYTES,BITS) \
388 1.15 perry static __inline void __BS_FUNCTION(bus_space_read_multi,BYTES) \
389 1.21 matt (bus_space_tag_t, bus_space_handle_t, bus_size_t, \
390 1.21 matt __BS_TYPENAME(BITS) *, size_t); \
391 1.5 wdk \
392 1.15 perry static __inline void \
393 1.21 matt __BS_FUNCTION(bus_space_read_multi,BYTES)( \
394 1.21 matt bus_space_tag_t t, \
395 1.21 matt bus_space_handle_t h, \
396 1.21 matt bus_size_t o, \
397 1.21 matt __BS_TYPENAME(BITS) *a, \
398 1.21 matt size_t c) \
399 1.5 wdk { \
400 1.5 wdk \
401 1.5 wdk while (c--) \
402 1.5 wdk *a++ = __BS_FUNCTION(bus_space_read,BYTES)(t, h, o); \
403 1.5 wdk }
404 1.5 wdk
405 1.5 wdk __bus_space_read_multi(1,8)
406 1.5 wdk __bus_space_read_multi(2,16)
407 1.5 wdk __bus_space_read_multi(4,32)
408 1.5 wdk __bus_space_read_multi(8,64)
409 1.5 wdk
410 1.1 wdk
411 1.1 wdk /*
412 1.20 dsl * void bus_space_read_region_N(bus_space_tag_t tag,
413 1.1 wdk * bus_space_handle_t bsh, bus_size_t offset,
414 1.20 dsl * u_intN_t *addr, size_t count);
415 1.1 wdk *
416 1.1 wdk * Read `count' 1, 2, 4, or 8 byte quantities from bus space
417 1.1 wdk * described by tag/handle and starting at `offset' and copy into
418 1.1 wdk * buffer provided.
419 1.1 wdk */
420 1.1 wdk
421 1.5 wdk #define __bus_space_read_region(BYTES,BITS) \
422 1.15 perry static __inline void __BS_FUNCTION(bus_space_read_region,BYTES) \
423 1.21 matt (bus_space_tag_t, bus_space_handle_t, bus_size_t, \
424 1.21 matt __BS_TYPENAME(BITS) *, size_t); \
425 1.5 wdk \
426 1.15 perry static __inline void \
427 1.21 matt __BS_FUNCTION(bus_space_read_region,BYTES)( \
428 1.21 matt bus_space_tag_t t, \
429 1.21 matt bus_space_handle_t h, \
430 1.21 matt bus_size_t o, \
431 1.21 matt __BS_TYPENAME(BITS) *a, \
432 1.21 matt size_t c) \
433 1.5 wdk { \
434 1.5 wdk \
435 1.5 wdk while (c--) { \
436 1.5 wdk *a++ = __BS_FUNCTION(bus_space_read,BYTES)(t, h, o); \
437 1.5 wdk o += BYTES; \
438 1.1 wdk } \
439 1.1 wdk }
440 1.1 wdk
441 1.5 wdk __bus_space_read_region(1,8)
442 1.5 wdk __bus_space_read_region(2,16)
443 1.5 wdk __bus_space_read_region(4,32)
444 1.5 wdk __bus_space_read_region(8,64)
445 1.5 wdk
446 1.1 wdk
447 1.1 wdk /*
448 1.20 dsl * void bus_space_write_N(bus_space_tag_t tag,
449 1.1 wdk * bus_space_handle_t bsh, bus_size_t offset,
450 1.20 dsl * u_intN_t value);
451 1.1 wdk *
452 1.1 wdk * Write the 1, 2, 4, or 8 byte value `value' to bus space
453 1.1 wdk * described by tag/handle/offset.
454 1.1 wdk */
455 1.1 wdk
456 1.5 wdk #define __bus_space_write(BYTES,BITS) \
457 1.15 perry static __inline void \
458 1.1 wdk __CONCAT(bus_space_write_,BYTES)(bus_space_tag_t bst, \
459 1.1 wdk bus_space_handle_t bsh, \
460 1.1 wdk bus_size_t offset, __CONCAT3(u_int,BITS,_t) data) \
461 1.1 wdk { \
462 1.5 wdk *__BS_ADDR(bst, bsh, offset, BITS, BYTES) = data; \
463 1.1 wdk wbflush(); \
464 1.1 wdk }
465 1.1 wdk
466 1.5 wdk __bus_space_write(1,8)
467 1.5 wdk __bus_space_write(2,16)
468 1.5 wdk __bus_space_write(4,32)
469 1.5 wdk __bus_space_write(8,64)
470 1.1 wdk
471 1.1 wdk /*
472 1.20 dsl * void bus_space_write_multi_N(bus_space_tag_t tag,
473 1.1 wdk * bus_space_handle_t bsh, bus_size_t offset,
474 1.20 dsl * const u_intN_t *addr, size_t count);
475 1.1 wdk *
476 1.1 wdk * Write `count' 1, 2, 4, or 8 byte quantities from the buffer
477 1.1 wdk * provided to bus space described by tag/handle/offset.
478 1.1 wdk */
479 1.1 wdk
480 1.5 wdk #define __bus_space_write_multi(BYTES,BITS) \
481 1.15 perry static __inline void __BS_FUNCTION(bus_space_write_multi,BYTES) \
482 1.21 matt (bus_space_tag_t, bus_space_handle_t, bus_size_t, \
483 1.24 andvar const __BS_TYPENAME(BITS) *, size_t); \
484 1.5 wdk \
485 1.15 perry static __inline void \
486 1.21 matt __BS_FUNCTION(bus_space_write_multi,BYTES)( \
487 1.21 matt bus_space_tag_t t, \
488 1.21 matt bus_space_handle_t h, \
489 1.21 matt bus_size_t o, \
490 1.24 andvar const __BS_TYPENAME(BITS) *a, \
491 1.21 matt size_t c) \
492 1.5 wdk { \
493 1.5 wdk \
494 1.5 wdk while (c--) \
495 1.5 wdk __BS_FUNCTION(bus_space_write,BYTES)(t, h, o, *a++); \
496 1.1 wdk }
497 1.1 wdk
498 1.5 wdk __bus_space_write_multi(1,8)
499 1.5 wdk __bus_space_write_multi(2,16)
500 1.5 wdk __bus_space_write_multi(4,32)
501 1.5 wdk __bus_space_write_multi(8,64)
502 1.5 wdk
503 1.1 wdk
504 1.1 wdk /*
505 1.20 dsl * void bus_space_write_region_N(bus_space_tag_t tag,
506 1.1 wdk * bus_space_handle_t bsh, bus_size_t offset,
507 1.20 dsl * const u_intN_t *addr, size_t count);
508 1.1 wdk *
509 1.1 wdk * Write `count' 1, 2, 4, or 8 byte quantities from the buffer provided
510 1.1 wdk * to bus space described by tag/handle starting at `offset'.
511 1.1 wdk */
512 1.1 wdk
513 1.5 wdk #define __bus_space_write_region(BYTES,BITS) \
514 1.15 perry static __inline void __BS_FUNCTION(bus_space_write_region,BYTES) \
515 1.21 matt (bus_space_tag_t, bus_space_handle_t, bus_size_t, \
516 1.20 dsl const __BS_TYPENAME(BITS) *, size_t); \
517 1.5 wdk \
518 1.15 perry static __inline void \
519 1.21 matt __BS_FUNCTION(bus_space_write_region,BYTES)( \
520 1.21 matt bus_space_tag_t t, \
521 1.21 matt bus_space_handle_t h, \
522 1.21 matt bus_size_t o, \
523 1.21 matt const __BS_TYPENAME(BITS) *a, \
524 1.21 matt size_t c) \
525 1.5 wdk { \
526 1.5 wdk \
527 1.5 wdk while (c--) { \
528 1.5 wdk __BS_FUNCTION(bus_space_write,BYTES)(t, h, o, *a++); \
529 1.5 wdk o += BYTES; \
530 1.1 wdk } \
531 1.1 wdk }
532 1.1 wdk
533 1.5 wdk __bus_space_write_region(1,8)
534 1.5 wdk __bus_space_write_region(2,16)
535 1.5 wdk __bus_space_write_region(4,32)
536 1.5 wdk __bus_space_write_region(8,64)
537 1.5 wdk
538 1.1 wdk
539 1.1 wdk /*
540 1.20 dsl * void bus_space_set_multi_N(bus_space_tag_t tag,
541 1.1 wdk * bus_space_handle_t bsh, bus_size_t offset, u_intN_t val,
542 1.20 dsl * size_t count);
543 1.1 wdk *
544 1.1 wdk * Write the 1, 2, 4, or 8 byte value `val' to bus space described
545 1.1 wdk * by tag/handle/offset `count' times.
546 1.1 wdk */
547 1.1 wdk
548 1.5 wdk #define __bus_space_set_multi(BYTES,BITS) \
549 1.15 perry static __inline void __BS_FUNCTION(bus_space_set_multi,BYTES) \
550 1.21 matt (bus_space_tag_t, bus_space_handle_t, bus_size_t, \
551 1.20 dsl __BS_TYPENAME(BITS), size_t); \
552 1.5 wdk \
553 1.15 perry static __inline void \
554 1.21 matt __BS_FUNCTION(bus_space_set_multi,BYTES)( \
555 1.21 matt bus_space_tag_t t, \
556 1.21 matt bus_space_handle_t h, \
557 1.21 matt bus_size_t o, \
558 1.21 matt __BS_TYPENAME(BITS) v, \
559 1.21 matt size_t c) \
560 1.5 wdk { \
561 1.5 wdk \
562 1.5 wdk while (c--) \
563 1.5 wdk __BS_FUNCTION(bus_space_write,BYTES)(t, h, o, v); \
564 1.5 wdk }
565 1.5 wdk
566 1.5 wdk __bus_space_set_multi(1,8)
567 1.5 wdk __bus_space_set_multi(2,16)
568 1.5 wdk __bus_space_set_multi(4,32)
569 1.5 wdk __bus_space_set_multi(8,64)
570 1.5 wdk
571 1.1 wdk
572 1.1 wdk /*
573 1.20 dsl * void bus_space_set_region_N(bus_space_tag_t tag,
574 1.1 wdk * bus_space_handle_t bsh, bus_size_t offset, u_intN_t val,
575 1.20 dsl * size_t count);
576 1.1 wdk *
577 1.1 wdk * Write `count' 1, 2, 4, or 8 byte value `val' to bus space described
578 1.1 wdk * by tag/handle starting at `offset'.
579 1.1 wdk */
580 1.1 wdk
581 1.5 wdk #define __bus_space_set_region(BYTES,BITS) \
582 1.15 perry static __inline void __BS_FUNCTION(bus_space_set_region,BYTES) \
583 1.21 matt (bus_space_tag_t, bus_space_handle_t, bus_size_t, \
584 1.20 dsl __BS_TYPENAME(BITS), size_t); \
585 1.5 wdk \
586 1.15 perry static __inline void \
587 1.21 matt __BS_FUNCTION(bus_space_set_region,BYTES)( \
588 1.21 matt bus_space_tag_t t, \
589 1.21 matt bus_space_handle_t h, \
590 1.21 matt bus_size_t o, \
591 1.21 matt __BS_TYPENAME(BITS) v, \
592 1.21 matt size_t c) \
593 1.5 wdk { \
594 1.5 wdk \
595 1.5 wdk while (c--) { \
596 1.5 wdk __BS_FUNCTION(bus_space_write,BYTES)(t, h, o, v); \
597 1.5 wdk o += BYTES; \
598 1.1 wdk } \
599 1.1 wdk }
600 1.1 wdk
601 1.5 wdk __bus_space_set_region(1,8)
602 1.5 wdk __bus_space_set_region(2,16)
603 1.5 wdk __bus_space_set_region(4,32)
604 1.5 wdk __bus_space_set_region(8,64)
605 1.5 wdk
606 1.1 wdk
607 1.1 wdk /*
608 1.20 dsl * void bus_space_copy_region_N(bus_space_tag_t tag,
609 1.1 wdk * bus_space_handle_t bsh1, bus_size_t off1,
610 1.1 wdk * bus_space_handle_t bsh2, bus_size_t off2,
611 1.20 dsl * bus_size_t count);
612 1.1 wdk *
613 1.1 wdk * Copy `count' 1, 2, 4, or 8 byte values from bus space starting
614 1.1 wdk * at tag/bsh1/off1 to bus space starting at tag/bsh2/off2.
615 1.1 wdk */
616 1.1 wdk
617 1.5 wdk #define __bus_space_copy_region(BYTES) \
618 1.15 perry static __inline void __BS_FUNCTION(bus_space_copy_region,BYTES) \
619 1.21 matt (bus_space_tag_t, \
620 1.5 wdk bus_space_handle_t bsh1, bus_size_t off1, \
621 1.5 wdk bus_space_handle_t bsh2, bus_size_t off2, \
622 1.20 dsl bus_size_t count); \
623 1.5 wdk \
624 1.15 perry static __inline void \
625 1.21 matt __BS_FUNCTION(bus_space_copy_region,BYTES)( \
626 1.21 matt bus_space_tag_t t, \
627 1.21 matt bus_space_handle_t h1, \
628 1.21 matt bus_size_t o1, \
629 1.21 matt bus_space_handle_t h2, \
630 1.21 matt bus_size_t o2, \
631 1.21 matt bus_size_t c) \
632 1.5 wdk { \
633 1.5 wdk bus_size_t o; \
634 1.1 wdk \
635 1.5 wdk if ((h1 + o1) >= (h2 + o2)) { \
636 1.1 wdk /* src after dest: copy forward */ \
637 1.5 wdk for (o = 0; c != 0; c--, o += BYTES) \
638 1.5 wdk __BS_FUNCTION(bus_space_write,BYTES)(t, h2, o2 + o, \
639 1.5 wdk __BS_FUNCTION(bus_space_read,BYTES)(t, h1, o1 + o)); \
640 1.1 wdk } else { \
641 1.5 wdk /* dest after src: copy backwards */ \
642 1.5 wdk for (o = (c - 1) * BYTES; c != 0; c--, o -= BYTES) \
643 1.5 wdk __BS_FUNCTION(bus_space_write,BYTES)(t, h2, o2 + o, \
644 1.5 wdk __BS_FUNCTION(bus_space_read,BYTES)(t, h1, o1 + o)); \
645 1.1 wdk } \
646 1.1 wdk }
647 1.1 wdk
648 1.5 wdk __bus_space_copy_region(1)
649 1.5 wdk __bus_space_copy_region(2)
650 1.5 wdk __bus_space_copy_region(4)
651 1.5 wdk __bus_space_copy_region(8)
652 1.5 wdk
653 1.1 wdk
654 1.1 wdk /*
655 1.1 wdk * Operations which handle byte stream data on word access.
656 1.1 wdk *
657 1.1 wdk * These functions are defined to resolve endian mismatch, by either
658 1.1 wdk * - When normal (i.e. stream-less) operations perform byte swap
659 1.1 wdk * to resolve endian mismatch, these functions bypass the byte swap.
660 1.1 wdk * or
661 1.1 wdk * - When bus bridge performs automatic byte swap, these functions
662 1.1 wdk * perform byte swap once more, to cancel the bridge's behavior.
663 1.1 wdk *
664 1.5 wdk * Mips Computer Systems platforms perform harware byte swapping -
665 1.5 wdk * therefore the streaming methods can byte swap as determined from
666 1.5 wdk * the bus space tag settings
667 1.1 wdk *
668 1.1 wdk */
669 1.1 wdk #define __BUS_SPACE_HAS_STREAM_METHODS
670 1.5 wdk
671 1.5 wdk /* Force creation of stream methods using the standard template macros */
672 1.5 wdk #undef __BS_FUNCTION
673 1.5 wdk #define __BS_FUNCTION(func,BYTES) __CONCAT3(func,_stream_,BYTES)
674 1.5 wdk
675 1.5 wdk #define __BS_BSWAP(bst, val, BITS) \
676 1.5 wdk ((bst->bs_bswap) ? __CONCAT(bswap,BITS)(val) : (val))
677 1.5 wdk
678 1.5 wdk
679 1.5 wdk #define __bus_space_read_stream(BYTES,BITS) \
680 1.15 perry static __inline __BS_TYPENAME(BITS) \
681 1.5 wdk __CONCAT(bus_space_read_stream_,BYTES)(bus_space_tag_t bst, \
682 1.5 wdk bus_space_handle_t bsh, bus_size_t offset) \
683 1.5 wdk { \
684 1.5 wdk register __BS_TYPENAME(BITS) val = \
685 1.5 wdk __CONCAT(bus_space_read_,BYTES)(bst, bsh, offset); \
686 1.5 wdk \
687 1.5 wdk return __BS_BSWAP(bst, val, BITS); \
688 1.5 wdk }
689 1.5 wdk
690 1.5 wdk __bus_space_read_stream(2, 16) /* bus_space_read_stream_2 */
691 1.5 wdk __bus_space_read_stream(4, 32) /* bus_space_read_stream_4 */
692 1.5 wdk __bus_space_read_stream(8, 64) /* bus_space_read_stream_8 */
693 1.5 wdk
694 1.5 wdk
695 1.5 wdk #define __bus_space_write_stream(BYTES,BITS) \
696 1.15 perry static __inline void \
697 1.5 wdk __CONCAT(bus_space_write_stream_,BYTES)(bus_space_tag_t bst, \
698 1.5 wdk bus_space_handle_t bsh, \
699 1.5 wdk bus_size_t offset, __CONCAT3(u_int,BITS,_t) data) \
700 1.5 wdk { \
701 1.5 wdk *__BS_ADDR(bst, bsh, offset, BITS, BYTES) = \
702 1.5 wdk __BS_BSWAP(bst, data, BITS); \
703 1.5 wdk wbflush(); \
704 1.5 wdk }
705 1.5 wdk
706 1.5 wdk __bus_space_write_stream(2,16) /* bus_space_write_stream_2 */
707 1.5 wdk __bus_space_write_stream(4,32) /* bus_space_write_stream_4 */
708 1.5 wdk __bus_space_write_stream(8,64) /* bus_space_write_stream_8 */
709 1.5 wdk
710 1.5 wdk __bus_space_read_multi(2,16) /* bus_space_read_multi_stream_2 */
711 1.5 wdk __bus_space_read_multi(4,32) /* bus_space_read_multi_stream_4 */
712 1.5 wdk __bus_space_read_multi(8,64) /* bus_space_read_multi_stream_8 */
713 1.5 wdk
714 1.5 wdk __bus_space_read_region(2,16) /* bus_space_read_region_stream_2 */
715 1.5 wdk __bus_space_read_region(4,32) /* bus_space_read_region_stream_4 */
716 1.5 wdk __bus_space_read_region(8,64) /* bus_space_read_region_stream_8 */
717 1.5 wdk
718 1.5 wdk __bus_space_write_multi(2,16) /* bus_space_write_multi_stream_2 */
719 1.5 wdk __bus_space_write_multi(4,32) /* bus_space_write_multi_stream_4 */
720 1.5 wdk __bus_space_write_multi(8,64) /* bus_space_write_multi_stream_8 */
721 1.5 wdk
722 1.5 wdk __bus_space_write_region(2,16) /* bus_space_write_region_stream_2 */
723 1.5 wdk __bus_space_write_region(4,32) /* bus_space_write_region_stream_4 */
724 1.5 wdk __bus_space_write_region(8,64) /* bus_space_write_region_stream_8 */
725 1.5 wdk
726 1.5 wdk __bus_space_set_multi(2,16) /* bus_space_set_multi_stream_2 */
727 1.5 wdk __bus_space_set_multi(4,32) /* bus_space_set_multi_stream_4 */
728 1.5 wdk __bus_space_set_multi(8,64) /* bus_space_set_multi_stream_8 */
729 1.5 wdk
730 1.5 wdk __bus_space_set_region(2,16) /* bus_space_set_region_stream_2 */
731 1.5 wdk __bus_space_set_region(4,32) /* bus_space_set_region_stream_4 */
732 1.5 wdk __bus_space_set_region(8, 64) /* bus_space_set_region_stream_8 */
733 1.5 wdk
734 1.5 wdk #undef __bus_space_read
735 1.5 wdk #undef __bus_space_write
736 1.5 wdk #undef __bus_space_read_stream
737 1.5 wdk #undef __bus_space_write_stream
738 1.5 wdk #undef __bus_space_read_multi
739 1.5 wdk #undef __bus_space_read_region
740 1.5 wdk #undef __bus_space_write_multi
741 1.5 wdk #undef __bus_space_write_region
742 1.5 wdk #undef __bus_space_set_multi
743 1.5 wdk #undef __bus_space_set_region
744 1.5 wdk #undef __bus_space_copy_region
745 1.5 wdk
746 1.5 wdk #undef __BS_TYPENAME
747 1.5 wdk #undef __BS_OFFSET
748 1.5 wdk #undef __BS_FUNCTION
749 1.5 wdk #undef __BS_ADDR
750 1.1 wdk
751 1.1 wdk /*
752 1.1 wdk * Bus read/write barrier methods.
753 1.1 wdk *
754 1.20 dsl * void bus_space_barrier(bus_space_tag_t tag,
755 1.1 wdk * bus_space_handle_t bsh, bus_size_t offset,
756 1.20 dsl * bus_size_t len, int flags);
757 1.1 wdk *
758 1.1 wdk * On the MIPS, we just flush the write buffer.
759 1.1 wdk */
760 1.1 wdk #define bus_space_barrier(t, h, o, l, f) \
761 1.16 tsutsui ((void)((void)(t), (void)(h), (void)(o), (void)(l), (void)(f), \
762 1.16 tsutsui wbflush()))
763 1.1 wdk
764 1.1 wdk #define BUS_SPACE_BARRIER_READ 0x01
765 1.1 wdk #define BUS_SPACE_BARRIER_WRITE 0x02
766 1.1 wdk
767 1.1 wdk /*
768 1.1 wdk * Flags used in various bus DMA methods.
769 1.1 wdk */
770 1.10 kent #define BUS_DMA_WAITOK 0x000 /* safe to sleep (pseudo-flag) */
771 1.10 kent #define BUS_DMA_NOWAIT 0x001 /* not safe to sleep */
772 1.10 kent #define BUS_DMA_ALLOCNOW 0x002 /* perform resource allocation now */
773 1.10 kent #define BUS_DMA_COHERENT 0x004 /* hint: map memory DMA coherent */
774 1.6 thorpej #define BUS_DMA_STREAMING 0x008 /* hint: sequential, unidirectional */
775 1.10 kent #define BUS_DMA_BUS1 0x010 /* placeholders for bus functions... */
776 1.10 kent #define BUS_DMA_BUS2 0x020
777 1.10 kent #define BUS_DMA_BUS3 0x040
778 1.10 kent #define BUS_DMA_BUS4 0x080
779 1.6 thorpej #define BUS_DMA_READ 0x100 /* mapping is device -> memory only */
780 1.6 thorpej #define BUS_DMA_WRITE 0x200 /* mapping is memory -> device only */
781 1.10 kent #define BUS_DMA_NOCACHE 0x400 /* hint: map non-cached memory */
782 1.1 wdk
783 1.9 simonb #define MIPSCO_DMAMAP_COHERENT 0x10000 /* no cache flush necessary on sync */
784 1.1 wdk
785 1.1 wdk /* Forwards needed by prototypes below. */
786 1.1 wdk struct mbuf;
787 1.1 wdk struct uio;
788 1.1 wdk
789 1.1 wdk /*
790 1.1 wdk * Operations performed by bus_dmamap_sync().
791 1.1 wdk */
792 1.1 wdk #define BUS_DMASYNC_PREREAD 0x01 /* pre-read synchronization */
793 1.1 wdk #define BUS_DMASYNC_POSTREAD 0x02 /* post-read synchronization */
794 1.1 wdk #define BUS_DMASYNC_PREWRITE 0x04 /* pre-write synchronization */
795 1.1 wdk #define BUS_DMASYNC_POSTWRITE 0x08 /* post-write synchronization */
796 1.1 wdk
797 1.1 wdk typedef struct mipsco_bus_dma_tag *bus_dma_tag_t;
798 1.1 wdk typedef struct mipsco_bus_dmamap *bus_dmamap_t;
799 1.11 fvdl
800 1.11 fvdl #define BUS_DMA_TAG_VALID(t) ((t) != (bus_dma_tag_t)0)
801 1.1 wdk
802 1.1 wdk /*
803 1.1 wdk * bus_dma_segment_t
804 1.1 wdk *
805 1.1 wdk * Describes a single contiguous DMA transaction. Values
806 1.1 wdk * are suitable for programming into DMA registers.
807 1.1 wdk */
808 1.1 wdk struct mipsco_bus_dma_segment {
809 1.1 wdk /*
810 1.1 wdk * PUBLIC MEMBERS: these are used by device drivers.
811 1.1 wdk */
812 1.1 wdk bus_addr_t ds_addr; /* DMA address */
813 1.1 wdk bus_size_t ds_len; /* length of transfer */
814 1.1 wdk /*
815 1.1 wdk * PRIVATE MEMBERS for the DMA back-end.: not for use by drivers.
816 1.1 wdk */
817 1.1 wdk vaddr_t _ds_paddr; /* CPU physical address */
818 1.1 wdk vaddr_t _ds_vaddr; /* virtual address, 0 if invalid */
819 1.1 wdk };
820 1.1 wdk typedef struct mipsco_bus_dma_segment bus_dma_segment_t;
821 1.1 wdk
822 1.1 wdk /*
823 1.1 wdk * bus_dma_tag_t
824 1.1 wdk *
825 1.1 wdk * A machine-dependent opaque type describing the implementation of
826 1.1 wdk * DMA for a given bus.
827 1.1 wdk */
828 1.1 wdk
829 1.1 wdk struct mipsco_bus_dma_tag {
830 1.1 wdk bus_addr_t dma_offset;
831 1.1 wdk
832 1.1 wdk /*
833 1.1 wdk * DMA mapping methods.
834 1.1 wdk */
835 1.20 dsl int (*_dmamap_create)(bus_dma_tag_t, bus_size_t, int,
836 1.20 dsl bus_size_t, bus_size_t, int, bus_dmamap_t *);
837 1.20 dsl void (*_dmamap_destroy)(bus_dma_tag_t, bus_dmamap_t);
838 1.20 dsl int (*_dmamap_load)(bus_dma_tag_t, bus_dmamap_t, void *,
839 1.20 dsl bus_size_t, struct proc *, int);
840 1.20 dsl int (*_dmamap_load_mbuf)(bus_dma_tag_t, bus_dmamap_t,
841 1.20 dsl struct mbuf *, int);
842 1.20 dsl int (*_dmamap_load_uio)(bus_dma_tag_t, bus_dmamap_t,
843 1.20 dsl struct uio *, int);
844 1.20 dsl int (*_dmamap_load_raw)(bus_dma_tag_t, bus_dmamap_t,
845 1.20 dsl bus_dma_segment_t *, int, bus_size_t, int);
846 1.20 dsl void (*_dmamap_unload)(bus_dma_tag_t, bus_dmamap_t);
847 1.20 dsl void (*_dmamap_sync)(bus_dma_tag_t, bus_dmamap_t,
848 1.20 dsl bus_addr_t, bus_size_t, int);
849 1.1 wdk
850 1.1 wdk /*
851 1.1 wdk * DMA memory utility functions.
852 1.1 wdk */
853 1.20 dsl int (*_dmamem_alloc)(bus_dma_tag_t, bus_size_t, bus_size_t,
854 1.20 dsl bus_size_t, bus_dma_segment_t *, int, int *, int);
855 1.20 dsl void (*_dmamem_free)(bus_dma_tag_t,
856 1.20 dsl bus_dma_segment_t *, int);
857 1.20 dsl int (*_dmamem_map)(bus_dma_tag_t, bus_dma_segment_t *,
858 1.20 dsl int, size_t, void **, int);
859 1.20 dsl void (*_dmamem_unmap)(bus_dma_tag_t, void *, size_t);
860 1.20 dsl paddr_t (*_dmamem_mmap)(bus_dma_tag_t, bus_dma_segment_t *,
861 1.20 dsl int, off_t, int, int);
862 1.1 wdk };
863 1.1 wdk
864 1.1 wdk #define bus_dmamap_create(t, s, n, m, b, f, p) \
865 1.1 wdk (*(t)->_dmamap_create)((t), (s), (n), (m), (b), (f), (p))
866 1.1 wdk #define bus_dmamap_destroy(t, p) \
867 1.1 wdk (*(t)->_dmamap_destroy)((t), (p))
868 1.1 wdk #define bus_dmamap_load(t, m, b, s, p, f) \
869 1.1 wdk (*(t)->_dmamap_load)((t), (m), (b), (s), (p), (f))
870 1.1 wdk #define bus_dmamap_load_mbuf(t, m, b, f) \
871 1.1 wdk (*(t)->_dmamap_load_mbuf)((t), (m), (b), (f))
872 1.1 wdk #define bus_dmamap_load_uio(t, m, u, f) \
873 1.1 wdk (*(t)->_dmamap_load_uio)((t), (m), (u), (f))
874 1.1 wdk #define bus_dmamap_load_raw(t, m, sg, n, s, f) \
875 1.1 wdk (*(t)->_dmamap_load_raw)((t), (m), (sg), (n), (s), (f))
876 1.1 wdk #define bus_dmamap_unload(t, p) \
877 1.1 wdk (*(t)->_dmamap_unload)((t), (p))
878 1.1 wdk #define bus_dmamap_sync(t, p, o, l, ops) \
879 1.1 wdk (*(t)->_dmamap_sync)((t), (p), (o), (l), (ops))
880 1.1 wdk #define bus_dmamem_alloc(t, s, a, b, sg, n, r, f) \
881 1.1 wdk (*(t)->_dmamem_alloc)((t), (s), (a), (b), (sg), (n), (r), (f))
882 1.1 wdk #define bus_dmamem_free(t, sg, n) \
883 1.1 wdk (*(t)->_dmamem_free)((t), (sg), (n))
884 1.1 wdk #define bus_dmamem_map(t, sg, n, s, k, f) \
885 1.1 wdk (*(t)->_dmamem_map)((t), (sg), (n), (s), (k), (f))
886 1.1 wdk #define bus_dmamem_unmap(t, k, s) \
887 1.1 wdk (*(t)->_dmamem_unmap)((t), (k), (s))
888 1.1 wdk #define bus_dmamem_mmap(t, sg, n, o, p, f) \
889 1.1 wdk (*(t)->_dmamem_mmap)((t), (sg), (n), (o), (p), (f))
890 1.1 wdk
891 1.17 mrg #define bus_dmatag_subregion(t, mna, mxa, nt, f) EOPNOTSUPP
892 1.17 mrg #define bus_dmatag_destroy(t)
893 1.17 mrg
894 1.1 wdk /*
895 1.1 wdk * bus_dmamap_t
896 1.1 wdk *
897 1.1 wdk * Describes a DMA mapping.
898 1.1 wdk */
899 1.1 wdk struct mipsco_bus_dmamap {
900 1.1 wdk /*
901 1.1 wdk * PRIVATE MEMBERS: not for use by machine-independent code.
902 1.1 wdk */
903 1.1 wdk bus_size_t _dm_size; /* largest DMA transfer mappable */
904 1.1 wdk int _dm_segcnt; /* number of segs this map can map */
905 1.12 matt bus_size_t _dm_maxmaxsegsz; /* fixed largest possible segment */
906 1.1 wdk bus_size_t _dm_boundary; /* don't cross this */
907 1.1 wdk int _dm_flags; /* misc. flags */
908 1.1 wdk
909 1.1 wdk /*
910 1.1 wdk * Private cookie to be used by the DMA back-end.
911 1.1 wdk */
912 1.1 wdk void *_dm_cookie;
913 1.1 wdk
914 1.1 wdk /*
915 1.1 wdk * PUBLIC MEMBERS: these are used by machine-independent code.
916 1.1 wdk */
917 1.12 matt bus_size_t dm_maxsegsz; /* largest possible segment */
918 1.1 wdk bus_size_t dm_mapsize; /* size of the mapping */
919 1.1 wdk int dm_nsegs; /* # valid segments in mapping */
920 1.1 wdk bus_dma_segment_t dm_segs[1]; /* segments; variable length */
921 1.1 wdk };
922 1.1 wdk
923 1.1 wdk #ifdef _MIPSCO_BUS_DMA_PRIVATE
924 1.20 dsl int _bus_dmamap_create(bus_dma_tag_t, bus_size_t, int, bus_size_t,
925 1.20 dsl bus_size_t, int, bus_dmamap_t *);
926 1.20 dsl void _bus_dmamap_destroy(bus_dma_tag_t, bus_dmamap_t);
927 1.20 dsl int _bus_dmamap_load(bus_dma_tag_t, bus_dmamap_t, void *,
928 1.20 dsl bus_size_t, struct proc *, int);
929 1.20 dsl int _bus_dmamap_load_mbuf(bus_dma_tag_t, bus_dmamap_t,
930 1.20 dsl struct mbuf *, int);
931 1.20 dsl int _bus_dmamap_load_uio(bus_dma_tag_t, bus_dmamap_t,
932 1.20 dsl struct uio *, int);
933 1.20 dsl int _bus_dmamap_load_raw(bus_dma_tag_t, bus_dmamap_t,
934 1.20 dsl bus_dma_segment_t *, int, bus_size_t, int);
935 1.20 dsl void _bus_dmamap_unload(bus_dma_tag_t, bus_dmamap_t);
936 1.20 dsl void _bus_dmamap_sync(bus_dma_tag_t, bus_dmamap_t, bus_addr_t,
937 1.20 dsl bus_size_t, int);
938 1.1 wdk
939 1.20 dsl int _bus_dmamem_alloc(bus_dma_tag_t tag, bus_size_t size,
940 1.1 wdk bus_size_t alignment, bus_size_t boundary,
941 1.20 dsl bus_dma_segment_t *segs, int nsegs, int *rsegs, int flags);
942 1.20 dsl int _bus_dmamem_alloc_range(bus_dma_tag_t tag, bus_size_t size,
943 1.1 wdk bus_size_t alignment, bus_size_t boundary,
944 1.1 wdk bus_dma_segment_t *segs, int nsegs, int *rsegs, int flags,
945 1.20 dsl paddr_t low, paddr_t high);
946 1.20 dsl void _bus_dmamem_free(bus_dma_tag_t tag, bus_dma_segment_t *segs,
947 1.20 dsl int nsegs);
948 1.20 dsl int _bus_dmamem_map(bus_dma_tag_t tag, bus_dma_segment_t *segs,
949 1.20 dsl int nsegs, size_t size, void **kvap, int flags);
950 1.20 dsl void _bus_dmamem_unmap(bus_dma_tag_t tag, void *kva,
951 1.20 dsl size_t size);
952 1.20 dsl paddr_t _bus_dmamem_mmap(bus_dma_tag_t tag, bus_dma_segment_t *segs,
953 1.20 dsl int nsegs, off_t off, int prot, int flags);
954 1.1 wdk
955 1.20 dsl int _bus_dmamem_alloc_range(bus_dma_tag_t tag, bus_size_t size,
956 1.1 wdk bus_size_t alignment, bus_size_t boundary,
957 1.1 wdk bus_dma_segment_t *segs, int nsegs, int *rsegs, int flags,
958 1.20 dsl paddr_t low, paddr_t high);
959 1.1 wdk #endif /* _MIPSCO_BUS_DMA_PRIVATE */
960 1.1 wdk
961 1.20 dsl void _bus_dma_tag_init(bus_dma_tag_t tag);
962 1.1 wdk
963 1.1 wdk #endif /* _KERNEL */
964 1.1 wdk #endif /* _MIPSCO_BUS_H_ */
965