bus.h revision 1.28 1 1.28 tsutsui /* $NetBSD: bus.h,v 1.28 2025/04/27 04:38:43 tsutsui Exp $ */
2 1.4 thorpej
3 1.1 wdk /*-
4 1.4 thorpej * Copyright (c) 1996, 1997, 1998, 2001 The NetBSD Foundation, Inc.
5 1.1 wdk * All rights reserved.
6 1.1 wdk *
7 1.1 wdk * This code is derived from software contributed to The NetBSD Foundation
8 1.1 wdk * by Jason R. Thorpe of the Numerical Aerospace Simulation Facility,
9 1.1 wdk * NASA Ames Research Center.
10 1.1 wdk *
11 1.1 wdk * Redistribution and use in source and binary forms, with or without
12 1.1 wdk * modification, are permitted provided that the following conditions
13 1.1 wdk * are met:
14 1.1 wdk * 1. Redistributions of source code must retain the above copyright
15 1.1 wdk * notice, this list of conditions and the following disclaimer.
16 1.1 wdk * 2. Redistributions in binary form must reproduce the above copyright
17 1.1 wdk * notice, this list of conditions and the following disclaimer in the
18 1.1 wdk * documentation and/or other materials provided with the distribution.
19 1.1 wdk *
20 1.1 wdk * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
21 1.1 wdk * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
22 1.1 wdk * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
23 1.1 wdk * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
24 1.1 wdk * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
25 1.1 wdk * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
26 1.1 wdk * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
27 1.1 wdk * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
28 1.1 wdk * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
29 1.1 wdk * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
30 1.1 wdk * POSSIBILITY OF SUCH DAMAGE.
31 1.1 wdk */
32 1.1 wdk
33 1.1 wdk /*
34 1.1 wdk * Copyright (c) 1997 Per Fogelstrom. All rights reserved.
35 1.1 wdk * Copyright (c) 1996 Niklas Hallqvist. All rights reserved.
36 1.1 wdk *
37 1.1 wdk * Redistribution and use in source and binary forms, with or without
38 1.1 wdk * modification, are permitted provided that the following conditions
39 1.1 wdk * are met:
40 1.1 wdk * 1. Redistributions of source code must retain the above copyright
41 1.1 wdk * notice, this list of conditions and the following disclaimer.
42 1.1 wdk * 2. Redistributions in binary form must reproduce the above copyright
43 1.1 wdk * notice, this list of conditions and the following disclaimer in the
44 1.1 wdk * documentation and/or other materials provided with the distribution.
45 1.1 wdk * 3. All advertising materials mentioning features or use of this software
46 1.1 wdk * must display the following acknowledgement:
47 1.1 wdk * This product includes software developed by Christopher G. Demetriou
48 1.1 wdk * for the NetBSD Project.
49 1.1 wdk * 4. The name of the author may not be used to endorse or promote products
50 1.1 wdk * derived from this software without specific prior written permission
51 1.1 wdk *
52 1.1 wdk * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
53 1.1 wdk * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
54 1.1 wdk * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
55 1.1 wdk * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
56 1.1 wdk * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
57 1.1 wdk * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
58 1.1 wdk * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
59 1.1 wdk * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
60 1.1 wdk * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
61 1.1 wdk * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
62 1.1 wdk */
63 1.1 wdk
64 1.1 wdk #ifndef _MIPSCO_BUS_H_
65 1.1 wdk #define _MIPSCO_BUS_H_
66 1.1 wdk #ifdef _KERNEL
67 1.1 wdk
68 1.1 wdk #include <mips/locore.h>
69 1.1 wdk
70 1.1 wdk #ifdef BUS_SPACE_DEBUG
71 1.1 wdk #include <sys/systm.h> /* for printf() prototype */
72 1.1 wdk /*
73 1.1 wdk * Macros for checking the aligned-ness of pointers passed to bus
74 1.1 wdk * space ops. Strict alignment is required by the MIPS architecture,
75 1.1 wdk * and a trap will occur if unaligned access is performed. These
76 1.1 wdk * may aid in the debugging of a broken device driver by displaying
77 1.1 wdk * useful information about the problem.
78 1.1 wdk */
79 1.1 wdk #define __BUS_SPACE_ALIGNED_ADDRESS(p, t) \
80 1.1 wdk ((((u_long)(p)) & (sizeof(t)-1)) == 0)
81 1.1 wdk
82 1.1 wdk #define __BUS_SPACE_ADDRESS_SANITY(p, t, d) \
83 1.1 wdk ({ \
84 1.1 wdk if (__BUS_SPACE_ALIGNED_ADDRESS((p), t) == 0) { \
85 1.1 wdk printf("%s 0x%lx not aligned to %d bytes %s:%d\n", \
86 1.1 wdk d, (u_long)(p), sizeof(t), __FILE__, __LINE__); \
87 1.1 wdk } \
88 1.1 wdk (void) 0; \
89 1.1 wdk })
90 1.1 wdk
91 1.1 wdk #define BUS_SPACE_ALIGNED_POINTER(p, t) __BUS_SPACE_ALIGNED_ADDRESS(p, t)
92 1.1 wdk #else
93 1.1 wdk #define __BUS_SPACE_ADDRESS_SANITY(p,t,d) (void) 0
94 1.1 wdk #define BUS_SPACE_ALIGNED_POINTER(p, t) ALIGNED_POINTER(p, t)
95 1.1 wdk #endif /* BUS_SPACE_DEBUG */
96 1.1 wdk
97 1.1 wdk /*
98 1.1 wdk * Bus address and size types
99 1.1 wdk */
100 1.1 wdk typedef u_long bus_addr_t;
101 1.1 wdk typedef u_long bus_size_t;
102 1.1 wdk
103 1.22 skrll #define PRIxBUSADDR "lx"
104 1.22 skrll #define PRIxBUSSIZE "lx"
105 1.22 skrll #define PRIuBUSSIZE "lu"
106 1.22 skrll
107 1.1 wdk /*
108 1.1 wdk * Access methods for bus resources and address space.
109 1.1 wdk */
110 1.28 tsutsui typedef uint32_t bus_space_handle_t;
111 1.22 skrll
112 1.22 skrll #define PRIxBSH "lx"
113 1.22 skrll
114 1.1 wdk typedef struct mipsco_bus_space *bus_space_tag_t;
115 1.1 wdk
116 1.1 wdk struct mipsco_bus_space {
117 1.1 wdk const char *bs_name;
118 1.25 thorpej void *bs_spare; /* (was previously unused extent map) */
119 1.1 wdk bus_addr_t bs_start;
120 1.1 wdk bus_size_t bs_size;
121 1.1 wdk
122 1.1 wdk paddr_t bs_pbase;
123 1.1 wdk vaddr_t bs_vbase;
124 1.1 wdk
125 1.28 tsutsui uint8_t bs_stride; /* log2(stride) */
126 1.28 tsutsui uint8_t bs_bswap; /* byte swap in stream methods */
127 1.5 wdk
128 1.28 tsutsui uint8_t bs_offset_1;
129 1.28 tsutsui uint8_t bs_offset_2;
130 1.28 tsutsui uint8_t bs_offset_4;
131 1.28 tsutsui uint8_t bs_offset_8;
132 1.1 wdk
133 1.1 wdk /* compose a bus_space handle from tag/handle/addr/size/flags (MD) */
134 1.20 dsl int (*bs_compose_handle)(bus_space_tag_t, bus_addr_t,
135 1.20 dsl bus_size_t, int, bus_space_handle_t *);
136 1.1 wdk
137 1.1 wdk /* dispose a bus_space handle (MD) */
138 1.20 dsl int (*bs_dispose_handle)(bus_space_tag_t, bus_space_handle_t,
139 1.20 dsl bus_size_t);
140 1.1 wdk
141 1.1 wdk /* convert bus_space tag/handle to physical address (MD) */
142 1.20 dsl int (*bs_paddr)(bus_space_tag_t, bus_space_handle_t,
143 1.20 dsl paddr_t *);
144 1.1 wdk
145 1.1 wdk /* mapping/unmapping */
146 1.20 dsl int (*bs_map)(bus_space_tag_t, bus_addr_t, bus_size_t, int,
147 1.20 dsl bus_space_handle_t *);
148 1.20 dsl void (*bs_unmap)(bus_space_tag_t, bus_space_handle_t,
149 1.20 dsl bus_size_t);
150 1.20 dsl int (*bs_subregion)(bus_space_tag_t, bus_space_handle_t,
151 1.20 dsl bus_size_t, bus_size_t, bus_space_handle_t *);
152 1.20 dsl paddr_t (*bs_mmap)(bus_space_tag_t, bus_addr_t, off_t, int, int);
153 1.7 wdk
154 1.1 wdk
155 1.1 wdk /* allocation/deallocation */
156 1.20 dsl int (*bs_alloc)(bus_space_tag_t, bus_addr_t, bus_addr_t,
157 1.1 wdk bus_size_t, bus_size_t, bus_size_t, int,
158 1.20 dsl bus_addr_t *, bus_space_handle_t *);
159 1.20 dsl void (*bs_free)(bus_space_tag_t, bus_space_handle_t,
160 1.20 dsl bus_size_t);
161 1.1 wdk
162 1.2 wdk /* interrupt attach */
163 1.20 dsl void (*bs_intr_establish)(
164 1.2 wdk bus_space_tag_t,
165 1.2 wdk int, /*bus-specific intr*/
166 1.2 wdk int, /*priority/class*/
167 1.2 wdk int, /*flags*/
168 1.20 dsl int (*)(void *), /*handler*/
169 1.20 dsl void *); /*handler arg*/
170 1.2 wdk
171 1.1 wdk void *bs_aux;
172 1.1 wdk };
173 1.1 wdk
174 1.1 wdk /* vaddr_t argument of mipsco_bus_space_init() */
175 1.1 wdk #define MIPSCO_BUS_SPACE_UNMAPPED ((vaddr_t)0)
176 1.1 wdk
177 1.1 wdk /* machine dependent utility function for bus_space users */
178 1.20 dsl void mipsco_bus_space_init(bus_space_tag_t, const char *,
179 1.20 dsl paddr_t, vaddr_t, bus_addr_t, bus_size_t);
180 1.20 dsl void mipsco_bus_space_set_aligned_stride(bus_space_tag_t, unsigned int);
181 1.20 dsl void mipsco_sparse_bus_space_init(bus_space_tag_t, const char *,
182 1.20 dsl paddr_t, bus_addr_t, bus_size_t);
183 1.20 dsl void mipsco_large_bus_space_init(bus_space_tag_t, const char *,
184 1.20 dsl paddr_t, bus_addr_t, bus_size_t);
185 1.1 wdk
186 1.1 wdk /* these are provided for subclasses which override base bus_space. */
187 1.1 wdk
188 1.20 dsl int mipsco_bus_space_compose_handle(bus_space_tag_t,
189 1.20 dsl bus_addr_t, bus_size_t, int, bus_space_handle_t *);
190 1.20 dsl int mipsco_bus_space_dispose_handle(bus_space_tag_t,
191 1.20 dsl bus_space_handle_t, bus_size_t);
192 1.20 dsl int mipsco_bus_space_paddr(bus_space_tag_t,
193 1.20 dsl bus_space_handle_t, paddr_t *);
194 1.20 dsl
195 1.20 dsl int mipsco_sparse_bus_space_compose_handle(bus_space_tag_t,
196 1.20 dsl bus_addr_t, bus_size_t, int, bus_space_handle_t *);
197 1.20 dsl int mipsco_sparse_bus_space_dispose_handle(bus_space_tag_t,
198 1.20 dsl bus_space_handle_t, bus_size_t);
199 1.20 dsl int mipsco_sparse_bus_space_paddr(bus_space_tag_t,
200 1.20 dsl bus_space_handle_t, paddr_t *);
201 1.20 dsl
202 1.20 dsl int mipsco_bus_space_map(bus_space_tag_t, bus_addr_t, bus_size_t, int,
203 1.20 dsl bus_space_handle_t *);
204 1.20 dsl void mipsco_bus_space_unmap(bus_space_tag_t, bus_space_handle_t,
205 1.20 dsl bus_size_t);
206 1.20 dsl int mipsco_bus_space_subregion(bus_space_tag_t, bus_space_handle_t,
207 1.20 dsl bus_size_t, bus_size_t, bus_space_handle_t *);
208 1.20 dsl paddr_t mipsco_bus_space_mmap(bus_space_tag_t, bus_addr_t, off_t,
209 1.20 dsl int, int);
210 1.20 dsl int mipsco_bus_space_alloc(bus_space_tag_t, bus_addr_t, bus_addr_t,
211 1.1 wdk bus_size_t, bus_size_t, bus_size_t, int, bus_addr_t *,
212 1.20 dsl bus_space_handle_t *);
213 1.1 wdk #define mipsco_bus_space_free mipsco_bus_space_unmap
214 1.1 wdk
215 1.1 wdk /*
216 1.20 dsl * int bus_space_compose_handle(bus_space_tag_t t, bus_addr_t addr,
217 1.20 dsl * bus_size_t size, int flags, bus_space_handle_t *bshp);
218 1.1 wdk *
219 1.1 wdk * MACHINE DEPENDENT, NOT PORTABLE INTERFACE:
220 1.1 wdk * Compose a bus_space handle from tag/handle/addr/size/flags.
221 1.1 wdk * A helper function for bus_space_map()/bus_space_alloc() implementation.
222 1.1 wdk */
223 1.1 wdk #define bus_space_compose_handle(bst, addr, size, flags, bshp) \
224 1.1 wdk (*(bst)->bs_compose_handle)(bst, addr, size, flags, bshp)
225 1.1 wdk
226 1.1 wdk /*
227 1.20 dsl * int bus_space_dispose_handle(bus_space_tag_t t, bus_addr_t addr,
228 1.20 dsl * bus_space_handle_t bsh, bus_size_t size);
229 1.1 wdk *
230 1.1 wdk * MACHINE DEPENDENT, NOT PORTABLE INTERFACE:
231 1.1 wdk * Dispose a bus_space handle.
232 1.1 wdk * A helper function for bus_space_unmap()/bus_space_free() implementation.
233 1.1 wdk */
234 1.1 wdk #define bus_space_dispose_handle(bst, bsh, size) \
235 1.1 wdk (*(bst)->bs_dispose_handle)(bst, bsh, size)
236 1.1 wdk
237 1.1 wdk /*
238 1.20 dsl * int bus_space_paddr(bus_space_tag_t tag,
239 1.20 dsl * bus_space_handle_t bsh, paddr_t *pap);
240 1.1 wdk *
241 1.1 wdk * MACHINE DEPENDENT, NOT PORTABLE INTERFACE:
242 1.1 wdk * (cannot be implemented on e.g. I/O space on i386, non-linear space on alpha)
243 1.1 wdk * Return physical address of a region.
244 1.1 wdk * A helper function for device mmap entry.
245 1.1 wdk */
246 1.1 wdk #define bus_space_paddr(bst, bsh, pap) \
247 1.1 wdk (*(bst)->bs_paddr)(bst, bsh, pap)
248 1.1 wdk
249 1.1 wdk /*
250 1.20 dsl * void *bus_space_vaddr(bus_space_tag_t, bus_space_handle_t);
251 1.1 wdk *
252 1.1 wdk * Get the kernel virtual address for the mapped bus space.
253 1.1 wdk * Only allowed for regions mapped with BUS_SPACE_MAP_LINEAR.
254 1.1 wdk * (XXX not enforced)
255 1.1 wdk */
256 1.1 wdk #define bus_space_vaddr(bst, bsh) \
257 1.1 wdk ((void *)(bsh))
258 1.7 wdk
259 1.7 wdk /*
260 1.20 dsl * paddr_t bus_space_mmap(bus_space_tag_t, bus_addr_t, off_t,
261 1.20 dsl * int, int);
262 1.7 wdk *
263 1.7 wdk * Mmap bus space on behalf of the user.
264 1.7 wdk */
265 1.7 wdk #define bus_space_mmap(bst, addr, off, prot, flags) \
266 1.7 wdk (*(bst)->bs_mmap)((bst), (addr), (off), (prot), (flags))
267 1.1 wdk
268 1.1 wdk /*
269 1.20 dsl * int bus_space_map(bus_space_tag_t t, bus_addr_t addr,
270 1.20 dsl * bus_size_t size, int flags, bus_space_handle_t *bshp);
271 1.1 wdk *
272 1.1 wdk * Map a region of bus space.
273 1.1 wdk */
274 1.1 wdk
275 1.1 wdk #define BUS_SPACE_MAP_CACHEABLE 0x01
276 1.1 wdk #define BUS_SPACE_MAP_LINEAR 0x02
277 1.1 wdk #define BUS_SPACE_MAP_PREFETCHABLE 0x04
278 1.1 wdk
279 1.1 wdk #define bus_space_map(t, a, s, f, hp) \
280 1.1 wdk (*(t)->bs_map)((t), (a), (s), (f), (hp))
281 1.1 wdk
282 1.1 wdk /*
283 1.20 dsl * void bus_space_unmap(bus_space_tag_t t,
284 1.20 dsl * bus_space_handle_t bsh, bus_size_t size);
285 1.1 wdk *
286 1.1 wdk * Unmap a region of bus space.
287 1.1 wdk */
288 1.1 wdk
289 1.1 wdk #define bus_space_unmap(t, h, s) \
290 1.1 wdk (*(t)->bs_unmap)((t), (h), (s))
291 1.1 wdk
292 1.1 wdk /*
293 1.20 dsl * int bus_space_subregion(bus_space_tag_t t,
294 1.1 wdk * bus_space_handle_t bsh, bus_size_t offset, bus_size_t size,
295 1.20 dsl * bus_space_handle_t *nbshp);
296 1.1 wdk *
297 1.1 wdk * Get a new handle for a subregion of an already-mapped area of bus space.
298 1.1 wdk */
299 1.1 wdk
300 1.1 wdk #define bus_space_subregion(t, h, o, s, hp) \
301 1.1 wdk (*(t)->bs_subregion)((t), (h), (o), (s), (hp))
302 1.1 wdk
303 1.1 wdk /*
304 1.20 dsl * int bus_space_alloc(bus_space_tag_t t, bus_addr_t, rstart,
305 1.1 wdk * bus_addr_t rend, bus_size_t size, bus_size_t align,
306 1.1 wdk * bus_size_t boundary, int flags, bus_addr_t *addrp,
307 1.20 dsl * bus_space_handle_t *bshp);
308 1.1 wdk *
309 1.1 wdk * Allocate a region of bus space.
310 1.1 wdk */
311 1.1 wdk
312 1.1 wdk #define bus_space_alloc(t, rs, re, s, a, b, f, ap, hp) \
313 1.1 wdk (*(t)->bs_alloc)((t), (rs), (re), (s), (a), (b), (f), (ap), (hp))
314 1.1 wdk
315 1.1 wdk /*
316 1.20 dsl * int bus_space_free(bus_space_tag_t t,
317 1.20 dsl * bus_space_handle_t bsh, bus_size_t size);
318 1.1 wdk *
319 1.1 wdk * Free a region of bus space.
320 1.1 wdk */
321 1.1 wdk
322 1.1 wdk #define bus_space_free(t, h, s) \
323 1.1 wdk (*(t)->bs_free)((t), (h), (s))
324 1.2 wdk
325 1.2 wdk /*
326 1.20 dsl * void bus_intr_establish(bus_space_tag_t bst,
327 1.20 dsl * int level, int pri, int flags, int (*func)(void *)
328 1.20 dsl * void *arg);
329 1.2 wdk *
330 1.2 wdk * Attach interrupt handler and softc argument
331 1.2 wdk */
332 1.2 wdk
333 1.2 wdk #define bus_intr_establish(t, i, c, f, ihf, iha) \
334 1.2 wdk (*(t)->bs_intr_establish)((t), (i), (c), (f), (ihf), (iha))
335 1.1 wdk
336 1.5 wdk
337 1.5 wdk /*
338 1.5 wdk * Utility macros; do not use outside this file.
339 1.5 wdk */
340 1.24 andvar #define __BS_TYPENAME(BITS) __CONCAT3(uint,BITS,_t)
341 1.5 wdk #define __BS_OFFSET(t, o, BYTES) ((o) << (t)->bs_stride)
342 1.5 wdk #define __BS_FUNCTION(func,BYTES) __CONCAT3(func,_,BYTES)
343 1.5 wdk
344 1.5 wdk /*
345 1.5 wdk * Calculate the target address using the bus_space parameters
346 1.5 wdk */
347 1.5 wdk #define __BS_ADDR(t, h, offset, BITS, BYTES) \
348 1.28 tsutsui ((volatile __CONCAT3(uint,BITS,_t) *) \
349 1.5 wdk ((h) + __BS_OFFSET(t, offset, BYTES) + \
350 1.5 wdk (t)->__CONCAT(bs_offset_,BYTES)))
351 1.5 wdk
352 1.1 wdk /*
353 1.28 tsutsui * uintN_t bus_space_read_N(bus_space_tag_t tag,
354 1.20 dsl * bus_space_handle_t bsh, bus_size_t offset);
355 1.1 wdk *
356 1.1 wdk * Read a 1, 2, 4, or 8 byte quantity from bus space
357 1.1 wdk * described by tag/handle/offset.
358 1.1 wdk */
359 1.1 wdk
360 1.5 wdk #define __bus_space_read(BYTES,BITS) \
361 1.28 tsutsui static __inline __CONCAT3(uint,BITS,_t) \
362 1.1 wdk __CONCAT(bus_space_read_,BYTES)(bus_space_tag_t bst, \
363 1.1 wdk bus_space_handle_t bsh, bus_size_t offset) \
364 1.1 wdk { \
365 1.5 wdk return (*__BS_ADDR(bst, bsh, offset, BITS, BYTES)); \
366 1.1 wdk }
367 1.1 wdk
368 1.5 wdk __bus_space_read(1,8)
369 1.5 wdk __bus_space_read(2,16)
370 1.5 wdk __bus_space_read(4,32)
371 1.5 wdk __bus_space_read(8,64)
372 1.1 wdk
373 1.1 wdk /*
374 1.20 dsl * void bus_space_read_multi_N(bus_space_tag_t tag,
375 1.1 wdk * bus_space_handle_t bsh, bus_size_t offset,
376 1.28 tsutsui * uintN_t *addr, size_t count);
377 1.1 wdk *
378 1.1 wdk * Read `count' 1, 2, 4, or 8 byte quantities from bus space
379 1.1 wdk * described by tag/handle/offset and copy into buffer provided.
380 1.1 wdk */
381 1.1 wdk
382 1.5 wdk #define __bus_space_read_multi(BYTES,BITS) \
383 1.15 perry static __inline void __BS_FUNCTION(bus_space_read_multi,BYTES) \
384 1.21 matt (bus_space_tag_t, bus_space_handle_t, bus_size_t, \
385 1.21 matt __BS_TYPENAME(BITS) *, size_t); \
386 1.5 wdk \
387 1.15 perry static __inline void \
388 1.21 matt __BS_FUNCTION(bus_space_read_multi,BYTES)( \
389 1.21 matt bus_space_tag_t t, \
390 1.21 matt bus_space_handle_t h, \
391 1.21 matt bus_size_t o, \
392 1.21 matt __BS_TYPENAME(BITS) *a, \
393 1.21 matt size_t c) \
394 1.5 wdk { \
395 1.5 wdk \
396 1.5 wdk while (c--) \
397 1.5 wdk *a++ = __BS_FUNCTION(bus_space_read,BYTES)(t, h, o); \
398 1.5 wdk }
399 1.5 wdk
400 1.5 wdk __bus_space_read_multi(1,8)
401 1.5 wdk __bus_space_read_multi(2,16)
402 1.5 wdk __bus_space_read_multi(4,32)
403 1.5 wdk __bus_space_read_multi(8,64)
404 1.5 wdk
405 1.1 wdk
406 1.1 wdk /*
407 1.20 dsl * void bus_space_read_region_N(bus_space_tag_t tag,
408 1.1 wdk * bus_space_handle_t bsh, bus_size_t offset,
409 1.28 tsutsui * uintN_t *addr, size_t count);
410 1.1 wdk *
411 1.1 wdk * Read `count' 1, 2, 4, or 8 byte quantities from bus space
412 1.1 wdk * described by tag/handle and starting at `offset' and copy into
413 1.1 wdk * buffer provided.
414 1.1 wdk */
415 1.1 wdk
416 1.5 wdk #define __bus_space_read_region(BYTES,BITS) \
417 1.15 perry static __inline void __BS_FUNCTION(bus_space_read_region,BYTES) \
418 1.21 matt (bus_space_tag_t, bus_space_handle_t, bus_size_t, \
419 1.21 matt __BS_TYPENAME(BITS) *, size_t); \
420 1.5 wdk \
421 1.15 perry static __inline void \
422 1.21 matt __BS_FUNCTION(bus_space_read_region,BYTES)( \
423 1.21 matt bus_space_tag_t t, \
424 1.21 matt bus_space_handle_t h, \
425 1.21 matt bus_size_t o, \
426 1.21 matt __BS_TYPENAME(BITS) *a, \
427 1.21 matt size_t c) \
428 1.5 wdk { \
429 1.5 wdk \
430 1.5 wdk while (c--) { \
431 1.5 wdk *a++ = __BS_FUNCTION(bus_space_read,BYTES)(t, h, o); \
432 1.5 wdk o += BYTES; \
433 1.1 wdk } \
434 1.1 wdk }
435 1.1 wdk
436 1.5 wdk __bus_space_read_region(1,8)
437 1.5 wdk __bus_space_read_region(2,16)
438 1.5 wdk __bus_space_read_region(4,32)
439 1.5 wdk __bus_space_read_region(8,64)
440 1.5 wdk
441 1.1 wdk
442 1.1 wdk /*
443 1.20 dsl * void bus_space_write_N(bus_space_tag_t tag,
444 1.1 wdk * bus_space_handle_t bsh, bus_size_t offset,
445 1.28 tsutsui * uintN_t value);
446 1.1 wdk *
447 1.1 wdk * Write the 1, 2, 4, or 8 byte value `value' to bus space
448 1.1 wdk * described by tag/handle/offset.
449 1.1 wdk */
450 1.1 wdk
451 1.5 wdk #define __bus_space_write(BYTES,BITS) \
452 1.15 perry static __inline void \
453 1.1 wdk __CONCAT(bus_space_write_,BYTES)(bus_space_tag_t bst, \
454 1.1 wdk bus_space_handle_t bsh, \
455 1.28 tsutsui bus_size_t offset, __CONCAT3(uint,BITS,_t) data) \
456 1.1 wdk { \
457 1.5 wdk *__BS_ADDR(bst, bsh, offset, BITS, BYTES) = data; \
458 1.1 wdk wbflush(); \
459 1.1 wdk }
460 1.1 wdk
461 1.5 wdk __bus_space_write(1,8)
462 1.5 wdk __bus_space_write(2,16)
463 1.5 wdk __bus_space_write(4,32)
464 1.5 wdk __bus_space_write(8,64)
465 1.1 wdk
466 1.1 wdk /*
467 1.20 dsl * void bus_space_write_multi_N(bus_space_tag_t tag,
468 1.1 wdk * bus_space_handle_t bsh, bus_size_t offset,
469 1.28 tsutsui * const uintN_t *addr, size_t count);
470 1.1 wdk *
471 1.1 wdk * Write `count' 1, 2, 4, or 8 byte quantities from the buffer
472 1.1 wdk * provided to bus space described by tag/handle/offset.
473 1.1 wdk */
474 1.1 wdk
475 1.5 wdk #define __bus_space_write_multi(BYTES,BITS) \
476 1.15 perry static __inline void __BS_FUNCTION(bus_space_write_multi,BYTES) \
477 1.21 matt (bus_space_tag_t, bus_space_handle_t, bus_size_t, \
478 1.24 andvar const __BS_TYPENAME(BITS) *, size_t); \
479 1.5 wdk \
480 1.15 perry static __inline void \
481 1.21 matt __BS_FUNCTION(bus_space_write_multi,BYTES)( \
482 1.21 matt bus_space_tag_t t, \
483 1.21 matt bus_space_handle_t h, \
484 1.21 matt bus_size_t o, \
485 1.24 andvar const __BS_TYPENAME(BITS) *a, \
486 1.21 matt size_t c) \
487 1.5 wdk { \
488 1.5 wdk \
489 1.5 wdk while (c--) \
490 1.5 wdk __BS_FUNCTION(bus_space_write,BYTES)(t, h, o, *a++); \
491 1.1 wdk }
492 1.1 wdk
493 1.5 wdk __bus_space_write_multi(1,8)
494 1.5 wdk __bus_space_write_multi(2,16)
495 1.5 wdk __bus_space_write_multi(4,32)
496 1.5 wdk __bus_space_write_multi(8,64)
497 1.5 wdk
498 1.1 wdk
499 1.1 wdk /*
500 1.20 dsl * void bus_space_write_region_N(bus_space_tag_t tag,
501 1.1 wdk * bus_space_handle_t bsh, bus_size_t offset,
502 1.28 tsutsui * const uintN_t *addr, size_t count);
503 1.1 wdk *
504 1.1 wdk * Write `count' 1, 2, 4, or 8 byte quantities from the buffer provided
505 1.1 wdk * to bus space described by tag/handle starting at `offset'.
506 1.1 wdk */
507 1.1 wdk
508 1.5 wdk #define __bus_space_write_region(BYTES,BITS) \
509 1.15 perry static __inline void __BS_FUNCTION(bus_space_write_region,BYTES) \
510 1.21 matt (bus_space_tag_t, bus_space_handle_t, bus_size_t, \
511 1.20 dsl const __BS_TYPENAME(BITS) *, size_t); \
512 1.5 wdk \
513 1.15 perry static __inline void \
514 1.21 matt __BS_FUNCTION(bus_space_write_region,BYTES)( \
515 1.21 matt bus_space_tag_t t, \
516 1.21 matt bus_space_handle_t h, \
517 1.21 matt bus_size_t o, \
518 1.21 matt const __BS_TYPENAME(BITS) *a, \
519 1.21 matt size_t c) \
520 1.5 wdk { \
521 1.5 wdk \
522 1.5 wdk while (c--) { \
523 1.5 wdk __BS_FUNCTION(bus_space_write,BYTES)(t, h, o, *a++); \
524 1.5 wdk o += BYTES; \
525 1.1 wdk } \
526 1.1 wdk }
527 1.1 wdk
528 1.5 wdk __bus_space_write_region(1,8)
529 1.5 wdk __bus_space_write_region(2,16)
530 1.5 wdk __bus_space_write_region(4,32)
531 1.5 wdk __bus_space_write_region(8,64)
532 1.5 wdk
533 1.1 wdk
534 1.1 wdk /*
535 1.20 dsl * void bus_space_set_multi_N(bus_space_tag_t tag,
536 1.28 tsutsui * bus_space_handle_t bsh, bus_size_t offset, uintN_t val,
537 1.20 dsl * size_t count);
538 1.1 wdk *
539 1.1 wdk * Write the 1, 2, 4, or 8 byte value `val' to bus space described
540 1.1 wdk * by tag/handle/offset `count' times.
541 1.1 wdk */
542 1.1 wdk
543 1.5 wdk #define __bus_space_set_multi(BYTES,BITS) \
544 1.15 perry static __inline void __BS_FUNCTION(bus_space_set_multi,BYTES) \
545 1.21 matt (bus_space_tag_t, bus_space_handle_t, bus_size_t, \
546 1.20 dsl __BS_TYPENAME(BITS), size_t); \
547 1.5 wdk \
548 1.15 perry static __inline void \
549 1.21 matt __BS_FUNCTION(bus_space_set_multi,BYTES)( \
550 1.21 matt bus_space_tag_t t, \
551 1.21 matt bus_space_handle_t h, \
552 1.21 matt bus_size_t o, \
553 1.21 matt __BS_TYPENAME(BITS) v, \
554 1.21 matt size_t c) \
555 1.5 wdk { \
556 1.5 wdk \
557 1.5 wdk while (c--) \
558 1.5 wdk __BS_FUNCTION(bus_space_write,BYTES)(t, h, o, v); \
559 1.5 wdk }
560 1.5 wdk
561 1.5 wdk __bus_space_set_multi(1,8)
562 1.5 wdk __bus_space_set_multi(2,16)
563 1.5 wdk __bus_space_set_multi(4,32)
564 1.5 wdk __bus_space_set_multi(8,64)
565 1.5 wdk
566 1.1 wdk
567 1.1 wdk /*
568 1.20 dsl * void bus_space_set_region_N(bus_space_tag_t tag,
569 1.28 tsutsui * bus_space_handle_t bsh, bus_size_t offset, uintN_t val,
570 1.20 dsl * size_t count);
571 1.1 wdk *
572 1.1 wdk * Write `count' 1, 2, 4, or 8 byte value `val' to bus space described
573 1.1 wdk * by tag/handle starting at `offset'.
574 1.1 wdk */
575 1.1 wdk
576 1.5 wdk #define __bus_space_set_region(BYTES,BITS) \
577 1.15 perry static __inline void __BS_FUNCTION(bus_space_set_region,BYTES) \
578 1.21 matt (bus_space_tag_t, bus_space_handle_t, bus_size_t, \
579 1.20 dsl __BS_TYPENAME(BITS), size_t); \
580 1.5 wdk \
581 1.15 perry static __inline void \
582 1.21 matt __BS_FUNCTION(bus_space_set_region,BYTES)( \
583 1.21 matt bus_space_tag_t t, \
584 1.21 matt bus_space_handle_t h, \
585 1.21 matt bus_size_t o, \
586 1.21 matt __BS_TYPENAME(BITS) v, \
587 1.21 matt size_t c) \
588 1.5 wdk { \
589 1.5 wdk \
590 1.5 wdk while (c--) { \
591 1.5 wdk __BS_FUNCTION(bus_space_write,BYTES)(t, h, o, v); \
592 1.5 wdk o += BYTES; \
593 1.1 wdk } \
594 1.1 wdk }
595 1.1 wdk
596 1.5 wdk __bus_space_set_region(1,8)
597 1.5 wdk __bus_space_set_region(2,16)
598 1.5 wdk __bus_space_set_region(4,32)
599 1.5 wdk __bus_space_set_region(8,64)
600 1.5 wdk
601 1.1 wdk
602 1.1 wdk /*
603 1.20 dsl * void bus_space_copy_region_N(bus_space_tag_t tag,
604 1.1 wdk * bus_space_handle_t bsh1, bus_size_t off1,
605 1.1 wdk * bus_space_handle_t bsh2, bus_size_t off2,
606 1.20 dsl * bus_size_t count);
607 1.1 wdk *
608 1.1 wdk * Copy `count' 1, 2, 4, or 8 byte values from bus space starting
609 1.1 wdk * at tag/bsh1/off1 to bus space starting at tag/bsh2/off2.
610 1.1 wdk */
611 1.1 wdk
612 1.5 wdk #define __bus_space_copy_region(BYTES) \
613 1.15 perry static __inline void __BS_FUNCTION(bus_space_copy_region,BYTES) \
614 1.21 matt (bus_space_tag_t, \
615 1.5 wdk bus_space_handle_t bsh1, bus_size_t off1, \
616 1.5 wdk bus_space_handle_t bsh2, bus_size_t off2, \
617 1.20 dsl bus_size_t count); \
618 1.5 wdk \
619 1.15 perry static __inline void \
620 1.21 matt __BS_FUNCTION(bus_space_copy_region,BYTES)( \
621 1.21 matt bus_space_tag_t t, \
622 1.21 matt bus_space_handle_t h1, \
623 1.21 matt bus_size_t o1, \
624 1.21 matt bus_space_handle_t h2, \
625 1.21 matt bus_size_t o2, \
626 1.21 matt bus_size_t c) \
627 1.5 wdk { \
628 1.5 wdk bus_size_t o; \
629 1.1 wdk \
630 1.5 wdk if ((h1 + o1) >= (h2 + o2)) { \
631 1.1 wdk /* src after dest: copy forward */ \
632 1.5 wdk for (o = 0; c != 0; c--, o += BYTES) \
633 1.5 wdk __BS_FUNCTION(bus_space_write,BYTES)(t, h2, o2 + o, \
634 1.5 wdk __BS_FUNCTION(bus_space_read,BYTES)(t, h1, o1 + o)); \
635 1.1 wdk } else { \
636 1.5 wdk /* dest after src: copy backwards */ \
637 1.5 wdk for (o = (c - 1) * BYTES; c != 0; c--, o -= BYTES) \
638 1.5 wdk __BS_FUNCTION(bus_space_write,BYTES)(t, h2, o2 + o, \
639 1.5 wdk __BS_FUNCTION(bus_space_read,BYTES)(t, h1, o1 + o)); \
640 1.1 wdk } \
641 1.1 wdk }
642 1.1 wdk
643 1.5 wdk __bus_space_copy_region(1)
644 1.5 wdk __bus_space_copy_region(2)
645 1.5 wdk __bus_space_copy_region(4)
646 1.5 wdk __bus_space_copy_region(8)
647 1.5 wdk
648 1.1 wdk
649 1.1 wdk /*
650 1.1 wdk * Operations which handle byte stream data on word access.
651 1.1 wdk *
652 1.1 wdk * These functions are defined to resolve endian mismatch, by either
653 1.1 wdk * - When normal (i.e. stream-less) operations perform byte swap
654 1.1 wdk * to resolve endian mismatch, these functions bypass the byte swap.
655 1.1 wdk * or
656 1.1 wdk * - When bus bridge performs automatic byte swap, these functions
657 1.1 wdk * perform byte swap once more, to cancel the bridge's behavior.
658 1.1 wdk *
659 1.26 andvar * Mips Computer Systems platforms perform hardware byte swapping -
660 1.5 wdk * therefore the streaming methods can byte swap as determined from
661 1.5 wdk * the bus space tag settings
662 1.1 wdk *
663 1.1 wdk */
664 1.1 wdk #define __BUS_SPACE_HAS_STREAM_METHODS
665 1.5 wdk
666 1.5 wdk /* Force creation of stream methods using the standard template macros */
667 1.5 wdk #undef __BS_FUNCTION
668 1.5 wdk #define __BS_FUNCTION(func,BYTES) __CONCAT3(func,_stream_,BYTES)
669 1.5 wdk
670 1.5 wdk #define __BS_BSWAP(bst, val, BITS) \
671 1.5 wdk ((bst->bs_bswap) ? __CONCAT(bswap,BITS)(val) : (val))
672 1.5 wdk
673 1.5 wdk
674 1.5 wdk #define __bus_space_read_stream(BYTES,BITS) \
675 1.15 perry static __inline __BS_TYPENAME(BITS) \
676 1.5 wdk __CONCAT(bus_space_read_stream_,BYTES)(bus_space_tag_t bst, \
677 1.5 wdk bus_space_handle_t bsh, bus_size_t offset) \
678 1.5 wdk { \
679 1.5 wdk register __BS_TYPENAME(BITS) val = \
680 1.5 wdk __CONCAT(bus_space_read_,BYTES)(bst, bsh, offset); \
681 1.5 wdk \
682 1.5 wdk return __BS_BSWAP(bst, val, BITS); \
683 1.5 wdk }
684 1.5 wdk
685 1.5 wdk __bus_space_read_stream(2, 16) /* bus_space_read_stream_2 */
686 1.5 wdk __bus_space_read_stream(4, 32) /* bus_space_read_stream_4 */
687 1.5 wdk __bus_space_read_stream(8, 64) /* bus_space_read_stream_8 */
688 1.5 wdk
689 1.5 wdk
690 1.5 wdk #define __bus_space_write_stream(BYTES,BITS) \
691 1.15 perry static __inline void \
692 1.5 wdk __CONCAT(bus_space_write_stream_,BYTES)(bus_space_tag_t bst, \
693 1.5 wdk bus_space_handle_t bsh, \
694 1.28 tsutsui bus_size_t offset, __CONCAT3(uint,BITS,_t) data) \
695 1.5 wdk { \
696 1.5 wdk *__BS_ADDR(bst, bsh, offset, BITS, BYTES) = \
697 1.5 wdk __BS_BSWAP(bst, data, BITS); \
698 1.5 wdk wbflush(); \
699 1.5 wdk }
700 1.5 wdk
701 1.5 wdk __bus_space_write_stream(2,16) /* bus_space_write_stream_2 */
702 1.5 wdk __bus_space_write_stream(4,32) /* bus_space_write_stream_4 */
703 1.5 wdk __bus_space_write_stream(8,64) /* bus_space_write_stream_8 */
704 1.5 wdk
705 1.5 wdk __bus_space_read_multi(2,16) /* bus_space_read_multi_stream_2 */
706 1.5 wdk __bus_space_read_multi(4,32) /* bus_space_read_multi_stream_4 */
707 1.5 wdk __bus_space_read_multi(8,64) /* bus_space_read_multi_stream_8 */
708 1.5 wdk
709 1.5 wdk __bus_space_read_region(2,16) /* bus_space_read_region_stream_2 */
710 1.5 wdk __bus_space_read_region(4,32) /* bus_space_read_region_stream_4 */
711 1.5 wdk __bus_space_read_region(8,64) /* bus_space_read_region_stream_8 */
712 1.5 wdk
713 1.5 wdk __bus_space_write_multi(2,16) /* bus_space_write_multi_stream_2 */
714 1.5 wdk __bus_space_write_multi(4,32) /* bus_space_write_multi_stream_4 */
715 1.5 wdk __bus_space_write_multi(8,64) /* bus_space_write_multi_stream_8 */
716 1.5 wdk
717 1.5 wdk __bus_space_write_region(2,16) /* bus_space_write_region_stream_2 */
718 1.5 wdk __bus_space_write_region(4,32) /* bus_space_write_region_stream_4 */
719 1.5 wdk __bus_space_write_region(8,64) /* bus_space_write_region_stream_8 */
720 1.5 wdk
721 1.5 wdk __bus_space_set_multi(2,16) /* bus_space_set_multi_stream_2 */
722 1.5 wdk __bus_space_set_multi(4,32) /* bus_space_set_multi_stream_4 */
723 1.5 wdk __bus_space_set_multi(8,64) /* bus_space_set_multi_stream_8 */
724 1.5 wdk
725 1.5 wdk __bus_space_set_region(2,16) /* bus_space_set_region_stream_2 */
726 1.5 wdk __bus_space_set_region(4,32) /* bus_space_set_region_stream_4 */
727 1.5 wdk __bus_space_set_region(8, 64) /* bus_space_set_region_stream_8 */
728 1.5 wdk
729 1.5 wdk #undef __bus_space_read
730 1.5 wdk #undef __bus_space_write
731 1.5 wdk #undef __bus_space_read_stream
732 1.5 wdk #undef __bus_space_write_stream
733 1.5 wdk #undef __bus_space_read_multi
734 1.5 wdk #undef __bus_space_read_region
735 1.5 wdk #undef __bus_space_write_multi
736 1.5 wdk #undef __bus_space_write_region
737 1.5 wdk #undef __bus_space_set_multi
738 1.5 wdk #undef __bus_space_set_region
739 1.5 wdk #undef __bus_space_copy_region
740 1.5 wdk
741 1.5 wdk #undef __BS_TYPENAME
742 1.5 wdk #undef __BS_OFFSET
743 1.5 wdk #undef __BS_FUNCTION
744 1.5 wdk #undef __BS_ADDR
745 1.1 wdk
746 1.1 wdk /*
747 1.1 wdk * Bus read/write barrier methods.
748 1.1 wdk *
749 1.20 dsl * void bus_space_barrier(bus_space_tag_t tag,
750 1.1 wdk * bus_space_handle_t bsh, bus_size_t offset,
751 1.20 dsl * bus_size_t len, int flags);
752 1.1 wdk *
753 1.1 wdk * On the MIPS, we just flush the write buffer.
754 1.1 wdk */
755 1.1 wdk #define bus_space_barrier(t, h, o, l, f) \
756 1.16 tsutsui ((void)((void)(t), (void)(h), (void)(o), (void)(l), (void)(f), \
757 1.16 tsutsui wbflush()))
758 1.1 wdk
759 1.1 wdk #define BUS_SPACE_BARRIER_READ 0x01
760 1.1 wdk #define BUS_SPACE_BARRIER_WRITE 0x02
761 1.1 wdk
762 1.1 wdk /*
763 1.1 wdk * Flags used in various bus DMA methods.
764 1.1 wdk */
765 1.10 kent #define BUS_DMA_WAITOK 0x000 /* safe to sleep (pseudo-flag) */
766 1.10 kent #define BUS_DMA_NOWAIT 0x001 /* not safe to sleep */
767 1.10 kent #define BUS_DMA_ALLOCNOW 0x002 /* perform resource allocation now */
768 1.10 kent #define BUS_DMA_COHERENT 0x004 /* hint: map memory DMA coherent */
769 1.6 thorpej #define BUS_DMA_STREAMING 0x008 /* hint: sequential, unidirectional */
770 1.10 kent #define BUS_DMA_BUS1 0x010 /* placeholders for bus functions... */
771 1.10 kent #define BUS_DMA_BUS2 0x020
772 1.10 kent #define BUS_DMA_BUS3 0x040
773 1.10 kent #define BUS_DMA_BUS4 0x080
774 1.6 thorpej #define BUS_DMA_READ 0x100 /* mapping is device -> memory only */
775 1.6 thorpej #define BUS_DMA_WRITE 0x200 /* mapping is memory -> device only */
776 1.10 kent #define BUS_DMA_NOCACHE 0x400 /* hint: map non-cached memory */
777 1.1 wdk
778 1.9 simonb #define MIPSCO_DMAMAP_COHERENT 0x10000 /* no cache flush necessary on sync */
779 1.1 wdk
780 1.1 wdk /* Forwards needed by prototypes below. */
781 1.1 wdk struct mbuf;
782 1.1 wdk struct uio;
783 1.1 wdk
784 1.1 wdk /*
785 1.1 wdk * Operations performed by bus_dmamap_sync().
786 1.1 wdk */
787 1.1 wdk #define BUS_DMASYNC_PREREAD 0x01 /* pre-read synchronization */
788 1.1 wdk #define BUS_DMASYNC_POSTREAD 0x02 /* post-read synchronization */
789 1.1 wdk #define BUS_DMASYNC_PREWRITE 0x04 /* pre-write synchronization */
790 1.1 wdk #define BUS_DMASYNC_POSTWRITE 0x08 /* post-write synchronization */
791 1.1 wdk
792 1.1 wdk typedef struct mipsco_bus_dma_tag *bus_dma_tag_t;
793 1.1 wdk typedef struct mipsco_bus_dmamap *bus_dmamap_t;
794 1.11 fvdl
795 1.11 fvdl #define BUS_DMA_TAG_VALID(t) ((t) != (bus_dma_tag_t)0)
796 1.1 wdk
797 1.1 wdk /*
798 1.1 wdk * bus_dma_segment_t
799 1.1 wdk *
800 1.1 wdk * Describes a single contiguous DMA transaction. Values
801 1.1 wdk * are suitable for programming into DMA registers.
802 1.1 wdk */
803 1.1 wdk struct mipsco_bus_dma_segment {
804 1.1 wdk /*
805 1.1 wdk * PUBLIC MEMBERS: these are used by device drivers.
806 1.1 wdk */
807 1.1 wdk bus_addr_t ds_addr; /* DMA address */
808 1.1 wdk bus_size_t ds_len; /* length of transfer */
809 1.1 wdk };
810 1.1 wdk typedef struct mipsco_bus_dma_segment bus_dma_segment_t;
811 1.1 wdk
812 1.1 wdk /*
813 1.1 wdk * bus_dma_tag_t
814 1.1 wdk *
815 1.1 wdk * A machine-dependent opaque type describing the implementation of
816 1.1 wdk * DMA for a given bus.
817 1.1 wdk */
818 1.1 wdk
819 1.1 wdk struct mipsco_bus_dma_tag {
820 1.1 wdk /*
821 1.1 wdk * DMA mapping methods.
822 1.1 wdk */
823 1.20 dsl int (*_dmamap_create)(bus_dma_tag_t, bus_size_t, int,
824 1.20 dsl bus_size_t, bus_size_t, int, bus_dmamap_t *);
825 1.20 dsl void (*_dmamap_destroy)(bus_dma_tag_t, bus_dmamap_t);
826 1.20 dsl int (*_dmamap_load)(bus_dma_tag_t, bus_dmamap_t, void *,
827 1.20 dsl bus_size_t, struct proc *, int);
828 1.20 dsl int (*_dmamap_load_mbuf)(bus_dma_tag_t, bus_dmamap_t,
829 1.20 dsl struct mbuf *, int);
830 1.20 dsl int (*_dmamap_load_uio)(bus_dma_tag_t, bus_dmamap_t,
831 1.20 dsl struct uio *, int);
832 1.20 dsl int (*_dmamap_load_raw)(bus_dma_tag_t, bus_dmamap_t,
833 1.20 dsl bus_dma_segment_t *, int, bus_size_t, int);
834 1.20 dsl void (*_dmamap_unload)(bus_dma_tag_t, bus_dmamap_t);
835 1.20 dsl void (*_dmamap_sync)(bus_dma_tag_t, bus_dmamap_t,
836 1.20 dsl bus_addr_t, bus_size_t, int);
837 1.1 wdk
838 1.1 wdk /*
839 1.1 wdk * DMA memory utility functions.
840 1.1 wdk */
841 1.20 dsl int (*_dmamem_alloc)(bus_dma_tag_t, bus_size_t, bus_size_t,
842 1.20 dsl bus_size_t, bus_dma_segment_t *, int, int *, int);
843 1.20 dsl void (*_dmamem_free)(bus_dma_tag_t,
844 1.20 dsl bus_dma_segment_t *, int);
845 1.20 dsl int (*_dmamem_map)(bus_dma_tag_t, bus_dma_segment_t *,
846 1.20 dsl int, size_t, void **, int);
847 1.20 dsl void (*_dmamem_unmap)(bus_dma_tag_t, void *, size_t);
848 1.20 dsl paddr_t (*_dmamem_mmap)(bus_dma_tag_t, bus_dma_segment_t *,
849 1.20 dsl int, off_t, int, int);
850 1.1 wdk };
851 1.1 wdk
852 1.1 wdk #define bus_dmamap_create(t, s, n, m, b, f, p) \
853 1.1 wdk (*(t)->_dmamap_create)((t), (s), (n), (m), (b), (f), (p))
854 1.1 wdk #define bus_dmamap_destroy(t, p) \
855 1.1 wdk (*(t)->_dmamap_destroy)((t), (p))
856 1.1 wdk #define bus_dmamap_load(t, m, b, s, p, f) \
857 1.1 wdk (*(t)->_dmamap_load)((t), (m), (b), (s), (p), (f))
858 1.1 wdk #define bus_dmamap_load_mbuf(t, m, b, f) \
859 1.1 wdk (*(t)->_dmamap_load_mbuf)((t), (m), (b), (f))
860 1.1 wdk #define bus_dmamap_load_uio(t, m, u, f) \
861 1.1 wdk (*(t)->_dmamap_load_uio)((t), (m), (u), (f))
862 1.1 wdk #define bus_dmamap_load_raw(t, m, sg, n, s, f) \
863 1.1 wdk (*(t)->_dmamap_load_raw)((t), (m), (sg), (n), (s), (f))
864 1.1 wdk #define bus_dmamap_unload(t, p) \
865 1.1 wdk (*(t)->_dmamap_unload)((t), (p))
866 1.1 wdk #define bus_dmamap_sync(t, p, o, l, ops) \
867 1.1 wdk (*(t)->_dmamap_sync)((t), (p), (o), (l), (ops))
868 1.1 wdk #define bus_dmamem_alloc(t, s, a, b, sg, n, r, f) \
869 1.1 wdk (*(t)->_dmamem_alloc)((t), (s), (a), (b), (sg), (n), (r), (f))
870 1.1 wdk #define bus_dmamem_free(t, sg, n) \
871 1.1 wdk (*(t)->_dmamem_free)((t), (sg), (n))
872 1.1 wdk #define bus_dmamem_map(t, sg, n, s, k, f) \
873 1.1 wdk (*(t)->_dmamem_map)((t), (sg), (n), (s), (k), (f))
874 1.1 wdk #define bus_dmamem_unmap(t, k, s) \
875 1.1 wdk (*(t)->_dmamem_unmap)((t), (k), (s))
876 1.1 wdk #define bus_dmamem_mmap(t, sg, n, o, p, f) \
877 1.1 wdk (*(t)->_dmamem_mmap)((t), (sg), (n), (o), (p), (f))
878 1.1 wdk
879 1.17 mrg #define bus_dmatag_subregion(t, mna, mxa, nt, f) EOPNOTSUPP
880 1.17 mrg #define bus_dmatag_destroy(t)
881 1.17 mrg
882 1.1 wdk /*
883 1.1 wdk * bus_dmamap_t
884 1.1 wdk *
885 1.1 wdk * Describes a DMA mapping.
886 1.1 wdk */
887 1.1 wdk struct mipsco_bus_dmamap {
888 1.1 wdk /*
889 1.1 wdk * PRIVATE MEMBERS: not for use by machine-independent code.
890 1.1 wdk */
891 1.1 wdk bus_size_t _dm_size; /* largest DMA transfer mappable */
892 1.1 wdk int _dm_segcnt; /* number of segs this map can map */
893 1.12 matt bus_size_t _dm_maxmaxsegsz; /* fixed largest possible segment */
894 1.1 wdk bus_size_t _dm_boundary; /* don't cross this */
895 1.1 wdk int _dm_flags; /* misc. flags */
896 1.1 wdk
897 1.1 wdk /*
898 1.1 wdk * Private cookie to be used by the DMA back-end.
899 1.1 wdk */
900 1.1 wdk void *_dm_cookie;
901 1.1 wdk
902 1.1 wdk /*
903 1.1 wdk * PUBLIC MEMBERS: these are used by machine-independent code.
904 1.1 wdk */
905 1.12 matt bus_size_t dm_maxsegsz; /* largest possible segment */
906 1.1 wdk bus_size_t dm_mapsize; /* size of the mapping */
907 1.1 wdk int dm_nsegs; /* # valid segments in mapping */
908 1.1 wdk bus_dma_segment_t dm_segs[1]; /* segments; variable length */
909 1.1 wdk };
910 1.1 wdk
911 1.1 wdk #ifdef _MIPSCO_BUS_DMA_PRIVATE
912 1.20 dsl int _bus_dmamap_create(bus_dma_tag_t, bus_size_t, int, bus_size_t,
913 1.20 dsl bus_size_t, int, bus_dmamap_t *);
914 1.20 dsl void _bus_dmamap_destroy(bus_dma_tag_t, bus_dmamap_t);
915 1.20 dsl int _bus_dmamap_load(bus_dma_tag_t, bus_dmamap_t, void *,
916 1.20 dsl bus_size_t, struct proc *, int);
917 1.20 dsl int _bus_dmamap_load_mbuf(bus_dma_tag_t, bus_dmamap_t,
918 1.20 dsl struct mbuf *, int);
919 1.20 dsl int _bus_dmamap_load_uio(bus_dma_tag_t, bus_dmamap_t,
920 1.20 dsl struct uio *, int);
921 1.20 dsl int _bus_dmamap_load_raw(bus_dma_tag_t, bus_dmamap_t,
922 1.20 dsl bus_dma_segment_t *, int, bus_size_t, int);
923 1.20 dsl void _bus_dmamap_unload(bus_dma_tag_t, bus_dmamap_t);
924 1.20 dsl void _bus_dmamap_sync(bus_dma_tag_t, bus_dmamap_t, bus_addr_t,
925 1.20 dsl bus_size_t, int);
926 1.1 wdk
927 1.20 dsl int _bus_dmamem_alloc(bus_dma_tag_t tag, bus_size_t size,
928 1.1 wdk bus_size_t alignment, bus_size_t boundary,
929 1.20 dsl bus_dma_segment_t *segs, int nsegs, int *rsegs, int flags);
930 1.20 dsl int _bus_dmamem_alloc_range(bus_dma_tag_t tag, bus_size_t size,
931 1.1 wdk bus_size_t alignment, bus_size_t boundary,
932 1.1 wdk bus_dma_segment_t *segs, int nsegs, int *rsegs, int flags,
933 1.20 dsl paddr_t low, paddr_t high);
934 1.20 dsl void _bus_dmamem_free(bus_dma_tag_t tag, bus_dma_segment_t *segs,
935 1.20 dsl int nsegs);
936 1.20 dsl int _bus_dmamem_map(bus_dma_tag_t tag, bus_dma_segment_t *segs,
937 1.20 dsl int nsegs, size_t size, void **kvap, int flags);
938 1.20 dsl void _bus_dmamem_unmap(bus_dma_tag_t tag, void *kva,
939 1.20 dsl size_t size);
940 1.20 dsl paddr_t _bus_dmamem_mmap(bus_dma_tag_t tag, bus_dma_segment_t *segs,
941 1.20 dsl int nsegs, off_t off, int prot, int flags);
942 1.1 wdk
943 1.20 dsl int _bus_dmamem_alloc_range(bus_dma_tag_t tag, bus_size_t size,
944 1.1 wdk bus_size_t alignment, bus_size_t boundary,
945 1.1 wdk bus_dma_segment_t *segs, int nsegs, int *rsegs, int flags,
946 1.20 dsl paddr_t low, paddr_t high);
947 1.1 wdk #endif /* _MIPSCO_BUS_DMA_PRIVATE */
948 1.1 wdk
949 1.20 dsl void _bus_dma_tag_init(bus_dma_tag_t tag);
950 1.1 wdk
951 1.1 wdk #endif /* _KERNEL */
952 1.1 wdk #endif /* _MIPSCO_BUS_H_ */
953